summaryrefslogtreecommitdiff
path: root/include/linux
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2026-08-25 09:38:50 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2026-08-25 09:38:50 -0700
commit93e4b3076b5f2d853462b9777d083c77fc0b7b23 (patch)
tree9e4eb974354d490ba5b74f05dfb1a3f5e4dc5469 /include/linux
parent5f5ef9c407cfdc524a1aaeb4196d933f61ecf21a (diff)
parent8992f32c57607bdfaf5de2a2cd26b3b71f3a9d55 (diff)
downloadlinux-93e4b3076b5f2d853462b9777d083c77fc0b7b23.tar.gz
linux-93e4b3076b5f2d853462b9777d083c77fc0b7b23.zip
Merge tag 'char-misc-7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc/IIO/etc driver updates from Greg KH: "Here is the big set of char, misc, iio, counter, fpga, and other small driver subsystems for 7.3-rc1. Overall, due to some driver removals we only added a bit more code than removed, which was a nice change. Highlights in this merge request are: - Loads of IIO driver updates and additions - binder driver updates (more on that below...) - Removal of the SGI XP and GRU drivers as they are not used anymore and turn out to be pretty insecure overall - Removal of the obsolete ibmasm driver as it's not being used anymore - Coresight driver updates and additions - Mei driver udpates - Counter driver updates - FPGA driver updates - ICC driver updates - lots and lots of other tiny driver updates to resolve reported issues All of these have been in linux-next for a while" * tag 'char-misc-7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (513 commits) iio: chemical: atlas-sensor: use iio_trigger_poll_nested() to fix remove UAF iio: adc: pac1921: fix wrong channel used in trigger handler read iio: light: gp2ap002: re-enable irq if runtime suspend fails iio: light: gp2ap002: Fix unbalanced runtime PM on repeated event writes iio: light: apds9306: fix PM reference leak in apds9306_read_data() iio: gyro: mpu3050: fix sign of raw angular velocity readings iio: srf04: fix pm_runtime handling on probe error path iio: adc: ad4080: configure backend data size iio: adc: adi-axi-adc: add data size support for AD408X backend iio: chemical: atlas-sensor: fix PM reference leak in buffer postenable iio: dac: ad5446: fix OF module device table iio: light: opt4001: Fix reversed GENMASK() arguments in fault count mask iio: light: opt4001: Reject integration times with a non-zero seconds part iio: light: opt4001: Fix incompatible pointer type passed to div_u64_rem() iio: light: opt4001: Fix power down clearing bits of the wrong register iio: light: opt4060: Fix incorrect register name in threshold read error message iio: light: opt4060: Fix pointer type passed to div_u64_rem() iio: light: opt4060: Reject integration times with a non-zero seconds part iio: light: ltrf216a: fix runtime PM reference leak in error path iio: pressure: dps310: fix NULL pointer dereference on ACPI probe ...
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/firmware/intel/stratix10-smc.h63
-rw-r--r--include/linux/firmware/intel/stratix10-svc-client.h12
-rw-r--r--include/linux/greybus/greybus_id.h4
-rw-r--r--include/linux/iio/common/inv_sensors_timestamp.h40
-rw-r--r--include/linux/iio/types.h21
-rw-r--r--include/linux/kstrtox.h3
-rw-r--r--include/linux/math64.h18
-rw-r--r--include/linux/mhi.h17
-rw-r--r--include/linux/mhi_ep.h2
-rw-r--r--include/linux/misc/tsi.h72
-rw-r--r--include/linux/most.h37
11 files changed, 247 insertions, 42 deletions
diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h
index 9224974fffc4..366309260121 100644
--- a/include/linux/firmware/intel/stratix10-smc.h
+++ b/include/linux/firmware/intel/stratix10-smc.h
@@ -434,6 +434,29 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_STATUS)
/**
+ * Request INTEL_SIP_SMC_RSU_GET_DEVICE_INFO
+ *
+ * Sync call used by service driver at EL1 to query QSPI device info from FW
+ *
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_RSU_GET_DEVICE_INFO
+ * a1-7 not used
+ *
+ * Return status
+ * a0 INTEL_SIP_SMC_STATUS_OK
+ * a1 erasesize0 | size0
+ * a2 erasesize1 | size1
+ * a3 erasesize2 | size2
+ * a4 erasesize3 | size3
+ * Or
+ *
+ * a0 INTEL_SIP_SMC_RSU_ERROR
+ */
+#define INTEL_SIP_SMC_FUNCID_RSU_GET_DEVICE_INFO 22
+#define INTEL_SIP_SMC_RSU_GET_DEVICE_INFO \
+ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_GET_DEVICE_INFO)
+
+/**
* Request INTEL_SIP_SMC_SERVICE_COMPLETED
* Sync call to check if the secure world have completed service request
* or not.
@@ -497,7 +520,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
* a3 not used
*/
#define INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD 60
- #define INTEL_SIP_SMC_MBOX_SEND_CMD \
+#define INTEL_SIP_SMC_MBOX_SEND_CMD \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD)
/**
@@ -702,6 +725,44 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
INTEL_SIP_SMC_ASYNC_VAL(INTEL_SIP_SMC_ASYNC_FUNC_ID_POLL)
/**
+ * Request INTEL_SIP_SMC_ASYNC_HWMON_READTEMP
+ * Async call to request temperature
+ *
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_ASYNC_HWMON_READTEMP
+ * a1 transaction job id
+ * a2 Temperature Channel
+ * a3-a17 not used
+ *
+ * Return status
+ * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_REJECTED
+ * or INTEL_SIP_SMC_STATUS_BUSY
+ * a1-a17 not used
+ */
+#define INTEL_SIP_SMC_ASYNC_FUNC_ID_HWMON_READTEMP 0xE8
+#define INTEL_SIP_SMC_ASYNC_HWMON_READTEMP \
+ INTEL_SIP_SMC_ASYNC_VAL(INTEL_SIP_SMC_ASYNC_FUNC_ID_HWMON_READTEMP)
+
+/**
+ * Request INTEL_SIP_SMC_ASYNC_HWMON_READVOLT
+ * Async call to request voltage
+ *
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_ASYNC_HWMON_READVOLT
+ * a1 transaction job id
+ * a2 Voltage Channel
+ * a3-a17 not used
+ *
+ * Return status
+ * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_REJECTED
+ * or INTEL_SIP_SMC_STATUS_BUSY
+ * a1-a17 not used
+ */
+#define INTEL_SIP_SMC_ASYNC_FUNC_ID_HWMON_READVOLT 0xE9
+#define INTEL_SIP_SMC_ASYNC_HWMON_READVOLT \
+ INTEL_SIP_SMC_ASYNC_VAL(INTEL_SIP_SMC_ASYNC_FUNC_ID_HWMON_READVOLT)
+
+/**
* Request INTEL_SIP_SMC_ASYNC_RSU_GET_SPT
* Async call to get RSU SPT from SDM.
* Call register usage:
diff --git a/include/linux/firmware/intel/stratix10-svc-client.h b/include/linux/firmware/intel/stratix10-svc-client.h
index 3edd93502bf8..af13dacdf5ac 100644
--- a/include/linux/firmware/intel/stratix10-svc-client.h
+++ b/include/linux/firmware/intel/stratix10-svc-client.h
@@ -128,6 +128,10 @@ struct stratix10_svc_chan;
* @COMMAND_RSU_DCMF_STATUS: query firmware for the DCMF status
* return status is SVC_STATUS_OK or SVC_STATUS_ERROR
*
+ * @COMMAND_RSU_GET_DEVICE_INFO: query firmware for QSPI device info;
+ * return status is SVC_STATUS_OK, SVC_STATUS_ERROR, or SVC_STATUS_NO_SUPPORT
+ * (unsupported command / firmware compatibility path in the service layer).
+ *
* @COMMAND_RSU_GET_SPT_TABLE: query firmware for SPT table
* return status is SVC_STATUS_OK or SVC_STATUS_ERROR
*
@@ -174,6 +178,7 @@ enum stratix10_svc_command_code {
COMMAND_RSU_MAX_RETRY,
COMMAND_RSU_DCMF_VERSION,
COMMAND_RSU_DCMF_STATUS,
+ COMMAND_RSU_GET_DEVICE_INFO,
COMMAND_FIRMWARE_VERSION,
COMMAND_RSU_GET_SPT_TABLE,
/* for FCS */
@@ -224,7 +229,12 @@ struct stratix10_svc_command_config_type {
/**
* struct stratix10_svc_cb_data - callback data structure from service layer
* @status: the status of sent command
- * @kaddr1: address of 1st completed data block
+ * @kaddr1: address of 1st completed data block, or command-specific payload.
+ * For COMMAND_RSU_GET_DEVICE_INFO on SVC_STATUS_OK or SVC_STATUS_ERROR,
+ * points to struct arm_smccc_1_2_regs filled by the SMC/HVC return
+ * registers (a0 status, a1-a4 packed device words per
+ * INTEL_SIP_SMC_RSU_GET_DEVICE_INFO). On SVC_STATUS_NO_SUPPORT (older
+ * firmware that does not handle this command), kaddr1 is NULL.
* @kaddr2: address of 2nd completed data block
* @kaddr3: address of 3rd completed data block
*/
diff --git a/include/linux/greybus/greybus_id.h b/include/linux/greybus/greybus_id.h
index f4c8440093e4..72f330a35569 100644
--- a/include/linux/greybus/greybus_id.h
+++ b/include/linux/greybus/greybus_id.h
@@ -1,14 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* FIXME
- * move this to include/linux/mod_devicetable.h when merging
+ * move this to include/linux/device-id/greybus.h when merging
*/
#ifndef __LINUX_GREYBUS_ID_H
#define __LINUX_GREYBUS_ID_H
#include <linux/types.h>
-#include <linux/mod_devicetable.h>
-
struct greybus_bundle_id {
__u16 match_flags;
diff --git a/include/linux/iio/common/inv_sensors_timestamp.h b/include/linux/iio/common/inv_sensors_timestamp.h
index 8d506f1e9df2..4f08204ede3b 100644
--- a/include/linux/iio/common/inv_sensors_timestamp.h
+++ b/include/linux/iio/common/inv_sensors_timestamp.h
@@ -13,9 +13,9 @@
* @init_period: chip initial period at reset in ns
*/
struct inv_sensors_timestamp_chip {
- uint32_t clock_period;
- uint32_t jitter;
- uint32_t init_period;
+ u32 clock_period;
+ u32 jitter;
+ u32 init_period;
};
/**
@@ -24,8 +24,8 @@ struct inv_sensors_timestamp_chip {
* @up: interval upper bound
*/
struct inv_sensors_timestamp_interval {
- int64_t lo;
- int64_t up;
+ s64 lo;
+ s64 up;
};
/**
@@ -35,9 +35,9 @@ struct inv_sensors_timestamp_interval {
* @values: table of all measured values, use for computing the mean
*/
struct inv_sensors_timestamp_acc {
- uint32_t val;
+ u32 val;
size_t idx;
- uint32_t values[32];
+ u32 values[32];
};
/**
@@ -46,6 +46,8 @@ struct inv_sensors_timestamp_acc {
* @min_period: minimal acceptable clock period
* @max_period: maximal acceptable clock period
* @it: interrupts interval timestamps
+ * @delta: interval timestamps between several interrupts
+ * @delta_counter: number of data samples in the delta interval
* @timestamp: store last timestamp for computing next data timestamp
* @mult: current internal period multiplier
* @new_mult: new set internal period multiplier (not yet effective)
@@ -54,13 +56,15 @@ struct inv_sensors_timestamp_acc {
*/
struct inv_sensors_timestamp {
struct inv_sensors_timestamp_chip chip;
- uint32_t min_period;
- uint32_t max_period;
+ u32 min_period;
+ u32 max_period;
struct inv_sensors_timestamp_interval it;
- int64_t timestamp;
- uint32_t mult;
- uint32_t new_mult;
- uint32_t period;
+ struct inv_sensors_timestamp_interval delta;
+ u32 delta_counter;
+ s64 timestamp;
+ u32 mult;
+ u32 new_mult;
+ u32 period;
struct inv_sensors_timestamp_acc chip_period;
};
@@ -68,19 +72,19 @@ void inv_sensors_timestamp_init(struct inv_sensors_timestamp *ts,
const struct inv_sensors_timestamp_chip *chip);
int inv_sensors_timestamp_update_odr(struct inv_sensors_timestamp *ts,
- uint32_t period, bool fifo);
+ u32 period, bool fifo);
void inv_sensors_timestamp_interrupt(struct inv_sensors_timestamp *ts,
- size_t sample_nb, int64_t timestamp);
+ size_t sample_nb, s64 timestamp);
-static inline int64_t inv_sensors_timestamp_pop(struct inv_sensors_timestamp *ts)
+static inline s64 inv_sensors_timestamp_pop(struct inv_sensors_timestamp *ts)
{
ts->timestamp += ts->period;
return ts->timestamp;
}
void inv_sensors_timestamp_apply_odr(struct inv_sensors_timestamp *ts,
- uint32_t fifo_period, size_t fifo_nb,
+ u32 fifo_period, size_t fifo_nb,
unsigned int fifo_no);
static inline void inv_sensors_timestamp_reset(struct inv_sensors_timestamp *ts)
@@ -88,6 +92,8 @@ static inline void inv_sensors_timestamp_reset(struct inv_sensors_timestamp *ts)
const struct inv_sensors_timestamp_interval interval_init = {0LL, 0LL};
ts->it = interval_init;
+ ts->delta = interval_init;
+ ts->delta_counter = 0;
ts->timestamp = 0;
}
diff --git a/include/linux/iio/types.h b/include/linux/iio/types.h
index 4e3099defc1d..d8944c9e5e90 100644
--- a/include/linux/iio/types.h
+++ b/include/linux/iio/types.h
@@ -7,6 +7,9 @@
#ifndef _IIO_TYPES_H_
#define _IIO_TYPES_H_
+#include <linux/types.h>
+#include <linux/wordpart.h>
+
#include <uapi/linux/iio/types.h>
enum iio_event_info {
@@ -34,6 +37,24 @@ enum iio_event_info {
#define IIO_VAL_FRACTIONAL_LOG2 11
#define IIO_VAL_CHAR 12
+#define IIO_VAL_DECIMAL64_BASE 32
+#define IIO_VAL_DECIMAL64_MILLI (IIO_VAL_DECIMAL64_BASE + 3)
+#define IIO_VAL_DECIMAL64_MICRO (IIO_VAL_DECIMAL64_BASE + 6)
+#define IIO_VAL_DECIMAL64_NANO (IIO_VAL_DECIMAL64_BASE + 9)
+#define IIO_VAL_DECIMAL64_PICO (IIO_VAL_DECIMAL64_BASE + 12)
+#define IIO_VAL_DECIMAL64_FEMTO (IIO_VAL_DECIMAL64_BASE + 15)
+
+static inline s64 iio_val_s64_compose(s32 val0, s32 val1)
+{
+ return (s64)(((u64)val1 << 32) | (u32)val0);
+}
+
+static inline void iio_val_s64_decompose(s64 dec64, s32 *val0, s32 *val1)
+{
+ *val0 = lower_32_bits(dec64);
+ *val1 = upper_32_bits(dec64);
+}
+
enum iio_available_type {
IIO_AVAIL_LIST,
IIO_AVAIL_RANGE,
diff --git a/include/linux/kstrtox.h b/include/linux/kstrtox.h
index 6c9282866770..b41b9736886f 100644
--- a/include/linux/kstrtox.h
+++ b/include/linux/kstrtox.h
@@ -97,6 +97,9 @@ int __must_check kstrtou8(const char *s, unsigned int base, u8 *res);
int __must_check kstrtos8(const char *s, unsigned int base, s8 *res);
int __must_check kstrtobool(const char *s, bool *res);
+int __must_check kstrtoudec64(const char *s, unsigned int scale, u64 *res);
+int __must_check kstrtodec64(const char *s, unsigned int scale, s64 *res);
+
int __must_check kstrtoull_from_user(const char __user *s, size_t count, unsigned int base, unsigned long long *res);
int __must_check kstrtoll_from_user(const char __user *s, size_t count, unsigned int base, long long *res);
int __must_check kstrtoul_from_user(const char __user *s, size_t count, unsigned int base, unsigned long *res);
diff --git a/include/linux/math64.h b/include/linux/math64.h
index cc305206d89f..99189410d4bb 100644
--- a/include/linux/math64.h
+++ b/include/linux/math64.h
@@ -58,6 +58,20 @@ static inline u64 div64_u64_rem(u64 dividend, u64 divisor, u64 *remainder)
}
/**
+ * div64_s64_rem - signed 64bit divide with 64bit divisor and remainder
+ * @dividend: signed 64bit dividend
+ * @divisor: signed 64bit divisor
+ * @remainder: pointer to signed 64bit remainder
+ *
+ * Return: sets ``*remainder``, then returns dividend / divisor
+ */
+static inline s64 div64_s64_rem(s64 dividend, s64 divisor, s64 *remainder)
+{
+ *remainder = dividend % divisor;
+ return dividend / divisor;
+}
+
+/**
* div64_u64 - unsigned 64bit divide with 64bit divisor
* @dividend: unsigned 64bit dividend
* @divisor: unsigned 64bit divisor
@@ -102,6 +116,10 @@ extern s64 div_s64_rem(s64 dividend, s32 divisor, s32 *remainder);
extern u64 div64_u64_rem(u64 dividend, u64 divisor, u64 *remainder);
#endif
+#ifndef div64_s64_rem
+extern s64 div64_s64_rem(s64 dividend, s64 divisor, s64 *remainder);
+#endif
+
#ifndef div64_u64
extern u64 div64_u64(u64 dividend, u64 divisor);
#endif
diff --git a/include/linux/mhi.h b/include/linux/mhi.h
index 4b86ae6f6a82..8616bacd8675 100644
--- a/include/linux/mhi.h
+++ b/include/linux/mhi.h
@@ -117,8 +117,8 @@ struct image_info {
/**
* struct mhi_link_info - BW requirement
- * target_link_speed - Link speed as defined by TLS bits in LinkControl reg
- * target_link_width - Link width as defined by NLW bits in LinkStatus reg
+ * @target_link_speed: Link speed as defined by TLS bits in LinkControl reg
+ * @target_link_width: Link width as defined by NLW bits in LinkStatus reg
*/
struct mhi_link_info {
unsigned int target_link_speed;
@@ -173,6 +173,7 @@ enum mhi_state {
MHI_STATE_M3_FAST = 0x6,
MHI_STATE_BHI = 0x7,
MHI_STATE_SYS_ERR = 0xFF,
+ /* private: */
MHI_STATE_MAX,
};
@@ -227,12 +228,12 @@ enum mhi_db_brst_mode {
* @type: Channel type
* @ee_mask: Execution Environment mask for this channel
* @pollcfg: Polling configuration for burst mode. 0 is default. milliseconds
- for UL channels, multiple of 8 ring elements for DL channels
+ * for UL channels, multiple of 8 ring elements for DL channels
* @doorbell: Doorbell mode
* @lpm_notify: The channel master requires low power mode notifications
* @offload_channel: The client manages the channel completely
* @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition
- * @wake-capable: Channel capable of waking up the system
+ * @wake_capable: Channel capable of waking up the system
*/
struct mhi_channel_config {
char *name;
@@ -350,7 +351,9 @@ struct mhi_controller_config {
* @dev_state: MHI device state
* @dev_wake: Device wakeup count
* @pending_pkts: Pending packets for the controller
- * @M0, M2, M3: Counters to track number of device MHI state changes
+ * @M0: Counter to track number of device MHI state changes
+ * @M2: Counter to track number of device MHI state changes
+ * @M3: Counter to track number of device MHI state changes
* @transition_list: List of MHI state transitions
* @transition_lock: Lock for protecting MHI state transition list
* @wlock: Lock for protecting device wakeup
@@ -375,6 +378,7 @@ struct mhi_controller_config {
* @bounce_buf: Use of bounce buffer
* @fbc_download: MHI host needs to do complete image transfer (optional)
* @wake_set: Device wakeup set flag
+ * @no_m3: Device doesn't support M3 state
* @irq_flags: irq flags passed to request_irq (optional)
* @mru: the default MRU for the MHI device
*
@@ -460,6 +464,7 @@ struct mhi_controller {
bool bounce_buf;
bool fbc_download;
bool wake_set;
+ bool no_m3;
unsigned long irq_flags;
u32 mru;
};
@@ -507,6 +512,7 @@ struct mhi_result {
/**
* struct mhi_driver - Structure representing a MHI client driver
+ * @id_table: table of MHI channel names that a driver supports
* @probe: CB function for client driver probe function
* @remove: CB function for client driver remove function
* @ul_xfer_cb: CB function for UL data transfer
@@ -538,6 +544,7 @@ struct mhi_controller *mhi_alloc_controller(void);
/**
* mhi_free_controller - Free the MHI Controller structure
+ * @mhi_cntrl: MHI controller to free
* Free the mhi_controller structure which was previously allocated
*/
void mhi_free_controller(struct mhi_controller *mhi_cntrl);
diff --git a/include/linux/mhi_ep.h b/include/linux/mhi_ep.h
index 7b40fc8cbe77..f6383a57a872 100644
--- a/include/linux/mhi_ep.h
+++ b/include/linux/mhi_ep.h
@@ -107,6 +107,7 @@ struct mhi_ep_buf_info {
* @write_sync: CB function for writing to host memory synchronously
* @read_async: CB function for reading from host memory asynchronously
* @write_async: CB function for writing to host memory asynchronously
+ * @flush_async: CB function for flushing asynchronous read/writes
* @mhi_state: MHI Endpoint state
* @max_chan: Maximum channels supported by the endpoint controller
* @mru: MRU (Maximum Receive Unit) value of the endpoint controller
@@ -164,6 +165,7 @@ struct mhi_ep_cntrl {
int (*write_sync)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info);
int (*read_async)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info);
int (*write_async)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info);
+ void (*flush_async)(struct mhi_ep_cntrl *mhi_cntrl);
enum mhi_state mhi_state;
diff --git a/include/linux/misc/tsi.h b/include/linux/misc/tsi.h
new file mode 100644
index 000000000000..5273c44688f0
--- /dev/null
+++ b/include/linux/misc/tsi.h
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * AMD SBTSI shared data structure and auxiliary bus definitions.
+ *
+ * Copyright (C) 2026 Advanced Micro Devices, Inc.
+ */
+
+#ifndef _LINUX_MISC_TSI_H_
+#define _LINUX_MISC_TSI_H_
+
+#include <linux/cleanup.h>
+#include <linux/i2c.h>
+#include <linux/i3c/device.h>
+#include <linux/kref.h>
+#include <linux/miscdevice.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+
+/**
+ * struct sbtsi_data - driver private data for an AMD SB-TSI device
+ * @client: underlying I2C client
+ * @i3cdev: underlying I3C device (when using I3C bus)
+ * @sbtsi_misc_dev: miscdevice exposing ioctl interface at /dev/sbtsi-<addr>
+ * @lock: mutex protecting concurrent access to the device
+ * @kref: reference count; keeps @sbtsi_data alive while misc fds are open
+ * @dev_addr: I2C/I3C device address, used as the auxiliary device instance id
+ * and name the misc device node
+ * @ext_range_mode: sensor uses extended temperature range
+ * @read_order: if set, decimal part must be read before integer part
+ * @is_i3c: true when the device is accessed over I3C
+ * @detached: set on driver unbind; open/ioctl return -ENODEV afterward
+ */
+struct sbtsi_data {
+ union {
+ struct i2c_client *client;
+ struct i3c_device *i3cdev;
+ };
+ struct miscdevice sbtsi_misc_dev;
+ struct mutex lock; /* protects concurrent access to the device */
+ struct kref kref;
+ u8 dev_addr;
+ bool ext_range_mode;
+ bool read_order;
+ bool is_i3c;
+ bool detached;
+};
+
+DEFINE_GUARD(sbtsi, struct sbtsi_data *, mutex_lock(&_T->lock),
+ mutex_unlock(&_T->lock))
+
+/*
+ * Name of the auxiliary device published on the auxiliary bus by the core
+ * driver. The full device name is "amd-sbtsi.temp-sensor.<id>". where
+ * <id> is the auxiliary device instance id.
+ */
+#define AMD_SBTSI_ADEV "amd-sbtsi"
+#define AMD_SBTSI_AUX_HWMON "temp-sensor"
+
+/**
+ * sbtsi_xfer - Perform a register read or write transfer on an AMD SB-TSI device.
+ *
+ * @data: Pointer to the sbtsi_data structure containing the device context
+ * @reg: Register address to access.
+ * @val: Pointer to the value to read into or write from.
+ * @is_read: If true, performs a read transfer and stores the result in @val.
+ * If false, performs a write transfer using the value in @val.
+ *
+ * Returns 0 on success, or a negative error code on failure.
+ */
+int sbtsi_xfer(struct sbtsi_data *data, u8 reg, u8 *val, bool is_read);
+
+#endif /* _LINUX_MISC_TSI_H_ */
diff --git a/include/linux/most.h b/include/linux/most.h
index 232e01b7f5d2..4aeed08f816e 100644
--- a/include/linux/most.h
+++ b/include/linux/most.h
@@ -15,7 +15,7 @@ struct module;
struct interface_private;
/**
- * Interface type
+ * enum most_interface_type - Interface type
*/
enum most_interface_type {
ITYPE_LOOPBACK = 1,
@@ -30,7 +30,7 @@ enum most_interface_type {
};
/**
- * Channel direction.
+ * enum most_channel_direction - Channel direction.
*/
enum most_channel_direction {
MOST_CH_RX = 1 << 0,
@@ -38,7 +38,7 @@ enum most_channel_direction {
};
/**
- * Channel data type.
+ * enum most_channel_data_type - Channel data type.
*/
enum most_channel_data_type {
MOST_CH_CONTROL = 1 << 0,
@@ -115,6 +115,7 @@ struct most_channel_capability {
* @subbuffer_size: size of a subbuffer
* @packets_per_xact: number of MOST frames that are packet inside one USB
* packet. This is USB specific
+ * @dbr_size: DBR data buffer size (MediaLB communication only)
*
* Describes the configuration for a MOST channel. This information is
* provided from the MostCore to a HDM (like the Medusa PCIe Interface) as a
@@ -189,28 +190,31 @@ struct mbo {
};
/**
- * Interface instance description.
+ * struct most_interface - Interface instance description.
*
* Describes an interface of a MOST device the core driver is bound to.
* This structure is allocated and initialized in the HDM. MostCore may not
* modify this structure.
*
* @dev: the actual device
+ * @driver_dev: struct device for calling snd_card_new()
* @mod: module
- * @interface Interface type. \sa most_interface_type.
- * @description PRELIMINARY.
+ * @interface: Interface type. \sa most_interface_type.
+ * @description: PRELIMINARY.
* Unique description of the device instance from point of view of the
* interface in free text form (ASCII).
* It may be a hexadecimal presentation of the memory address for the MediaLB
* IP or USB device ID with USB properties for USB interface, etc.
- * @num_channels Number of channels and size of the channel_vector.
- * @channel_vector Properties of the channels.
+ * @num_channels: Number of channels and size of the channel_vector.
+ * @channel_vector: Properties of the channels.
* Array index represents channel ID by the driver.
- * @configure Callback to change data type for the channel of the
+ * @dma_alloc: Callback to interface driver to allocation DMA memory.
+ * @dma_free: Callback to interface driver to free a DMA memory allocation.
+ * @configure: Callback to change data type for the channel of the
* interface instance. May be zero if the instance of the interface is not
* configurable. Parameter channel_config describes direction and data
* type for the channel, configured by the higher level. The content of
- * @enqueue Delivers MBO to the HDM for processing.
+ * @enqueue: Delivers MBO to the HDM for processing.
* After HDM completes Rx- or Tx- operation the processed MBO shall
* be returned back to the MostCore using completion routine.
* The reason to get the MBO delivered from the MostCore after the channel
@@ -218,7 +222,7 @@ struct mbo {
* In this case the HDM shall hold MBOs and service the channel as usual.
* The HDM must be able to hold at least one MBO for each channel.
* The callback returns a negative value on error, otherwise 0.
- * @poison_channel Informs HDM about closing the channel. The HDM shall
+ * @poison_channel: Informs HDM about closing the channel. The HDM shall
* cancel all transfers and synchronously or asynchronously return
* all enqueued for this channel MBOs using the completion routine.
* The callback returns a negative value on error, otherwise 0.
@@ -226,7 +230,8 @@ struct mbo {
* means of "Message exchange over MDP/MEP"
* The call of the function request_netinfo with the parameter on_netinfo as
* NULL prohibits use of the previously obtained function pointer.
- * @priv Private field used by mostcore to store context information.
+ * @priv: Private field used by mostcore to store context information.
+ * @p: &struct interface_private pointer
*/
struct most_interface {
struct device *dev;
@@ -255,10 +260,12 @@ struct most_interface {
* struct most_component - identifies a loadable component for the mostcore
* @list: list_head
* @name: component name
+ * @mod: owning module
* @probe_channel: function for core to notify driver about channel connection
* @disconnect_channel: callback function to disconnect a certain channel
* @rx_completion: completion handler for received packets
* @tx_completion: completion handler for transmitted packets
+ * @cfg_complete: setup completion function called after the device is matched
*/
struct most_component {
struct list_head list;
@@ -278,7 +285,7 @@ struct most_component {
* most_register_interface - Registers instance of the interface.
* @iface: Pointer to the interface instance description.
*
- * Returns a pointer to the kobject of the generated instance.
+ * Returns: a pointer to the kobject of the generated instance.
*
* Note: HDM has to ensure that any reference held on the kobj is
* released before deregistering the interface.
@@ -286,8 +293,8 @@ struct most_component {
int most_register_interface(struct most_interface *iface);
/**
- * Deregisters instance of the interface.
- * @intf_instance Pointer to the interface instance description.
+ * most_deregister_interface - Deregisters instance of the interface.
+ * @iface: Pointer to the interface instance description.
*/
void most_deregister_interface(struct most_interface *iface);
void most_submit_mbo(struct mbo *mbo);