1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
|
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
*
* Freescale DIU Frame Buffer device driver
*
* Authors: Hongjun Chen <hong-jun.chen@freescale.com>
* Paul Widmer <paul.widmer@freescale.com>
* Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
* York Sun <yorksun@freescale.com>
*
* Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
*/
#ifndef __FSL_DIU_FB_H__
#define __FSL_DIU_FB_H__
#include <linux/types.h>
struct mfb_chroma_key {
int enable;
__u8 red_max;
__u8 green_max;
__u8 blue_max;
__u8 red_min;
__u8 green_min;
__u8 blue_min;
};
struct aoi_display_offset {
__s32 x_aoi_d;
__s32 y_aoi_d;
};
#define MFB_SET_CHROMA_KEY _IOW('M', 1, struct mfb_chroma_key)
#define MFB_SET_BRIGHTNESS _IOW('M', 3, __u8)
#define MFB_SET_ALPHA _IOW('M', 0, __u8)
#define MFB_GET_ALPHA _IOR('M', 0, __u8)
#define MFB_SET_AOID _IOW('M', 4, struct aoi_display_offset)
#define MFB_GET_AOID _IOR('M', 4, struct aoi_display_offset)
#define MFB_SET_PIXFMT _IOW('M', 8, __u32)
#define MFB_GET_PIXFMT _IOR('M', 8, __u32)
/*
* The MPC5121 BSP comes with a gamma_set utility that initializes the
* gamma table. Unfortunately, it uses bad values for the IOCTL commands,
* but there's nothing we can do about it now. These ioctls are only
* supported on the MPC5121.
*/
#define MFB_SET_GAMMA _IOW('M', 1, __u8)
#define MFB_GET_GAMMA _IOR('M', 1, __u8)
/*
* The original definitions of MFB_SET_PIXFMT and MFB_GET_PIXFMT used the
* wrong value for 'size' field of the ioctl. The current macros above use the
* right size, but we still need to provide backwards compatibility, at least
* for a while.
*/
#define MFB_SET_PIXFMT_OLD 0x80014d08
#define MFB_GET_PIXFMT_OLD 0x40014d08
#ifdef __KERNEL__
/*
* These are the fields of area descriptor(in DDR memory) for every plane
*/
struct diu_ad {
/* Word 0(32-bit) in DDR memory */
/* __u16 comp; */
/* __u16 pixel_s:2; */
/* __u16 palette:1; */
/* __u16 red_c:2; */
/* __u16 green_c:2; */
/* __u16 blue_c:2; */
/* __u16 alpha_c:3; */
/* __u16 byte_f:1; */
/* __u16 res0:3; */
__be32 pix_fmt; /* hard coding pixel format */
/* Word 1(32-bit) in DDR memory */
__le32 addr;
/* Word 2(32-bit) in DDR memory */
/* __u32 delta_xs:11; */
/* __u32 res1:1; */
/* __u32 delta_ys:11; */
/* __u32 res2:1; */
/* __u32 g_alpha:8; */
__le32 src_size_g_alpha;
/* Word 3(32-bit) in DDR memory */
/* __u32 delta_xi:11; */
/* __u32 res3:5; */
/* __u32 delta_yi:11; */
/* __u32 res4:3; */
/* __u32 flip:2; */
__le32 aoi_size;
/* Word 4(32-bit) in DDR memory */
/*__u32 offset_xi:11;
__u32 res5:5;
__u32 offset_yi:11;
__u32 res6:5;
*/
__le32 offset_xyi;
/* Word 5(32-bit) in DDR memory */
/*__u32 offset_xd:11;
__u32 res7:5;
__u32 offset_yd:11;
__u32 res8:5; */
__le32 offset_xyd;
/* Word 6(32-bit) in DDR memory */
__u8 ckmax_r;
__u8 ckmax_g;
__u8 ckmax_b;
__u8 res9;
/* Word 7(32-bit) in DDR memory */
__u8 ckmin_r;
__u8 ckmin_g;
__u8 ckmin_b;
__u8 res10;
/* __u32 res10:8; */
/* Word 8(32-bit) in DDR memory */
__le32 next_ad;
/* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
__u32 paddr;
} __attribute__ ((packed));
/* DIU register map */
struct diu {
__be32 desc[3];
__be32 gamma;
__be32 palette;
__be32 cursor;
__be32 curs_pos;
__be32 diu_mode;
__be32 bgnd;
__be32 bgnd_wb;
__be32 disp_size;
__be32 wb_size;
__be32 wb_mem_addr;
__be32 hsyn_para;
__be32 vsyn_para;
__be32 syn_pol;
__be32 thresholds;
__be32 int_status;
__be32 int_mask;
__be32 colorbar[8];
__be32 filling;
__be32 plut;
} __attribute__ ((packed));
/*
* Modes of operation of DIU. The DIU supports five different modes, but
* the driver only supports modes 0 and 1.
*/
#define MFB_MODE0 0 /* DIU off */
#define MFB_MODE1 1 /* All three planes output to display */
#endif /* __KERNEL__ */
#endif /* __FSL_DIU_FB_H__ */
|
