blob: 07312e7264fb63fbeb57c49ef0b3902e1819bf6e (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
|
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
*/
#ifndef _DT_BINDINGS_CLK_SUN50I_A100_R_CCU_H_
#define _DT_BINDINGS_CLK_SUN50I_A100_R_CCU_H_
#define CLK_R_APB1 2
#define CLK_R_APB1_TIMER 4
#define CLK_R_APB1_TWD 5
#define CLK_R_APB1_PWM 6
#define CLK_R_APB1_BUS_PWM 7
#define CLK_R_APB1_PPU 8
#define CLK_R_APB2_UART 9
#define CLK_R_APB2_I2C0 10
#define CLK_R_APB2_I2C1 11
#define CLK_R_APB1_IR 12
#define CLK_R_APB1_BUS_IR 13
#define CLK_R_AHB_BUS_RTC 14
#endif /* _DT_BINDINGS_CLK_SUN50I_A100_R_CCU_H_ */
|
