1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
|
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
* Copyright (c) 2014- QLogic Corporation.
* All rights reserved
* www.qlogic.com
*
* Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
*/
#ifndef __BFA_IOC_H__
#define __BFA_IOC_H__
#include "bfad_drv.h"
#include "bfa_cs.h"
#include "bfi.h"
#define BFA_DBG_FWTRC_ENTS (BFI_IOC_TRC_ENTS)
#define BFA_DBG_FWTRC_LEN \
(BFA_DBG_FWTRC_ENTS * sizeof(struct bfa_trc_s) + \
(sizeof(struct bfa_trc_mod_s) - \
BFA_TRC_MAX * sizeof(struct bfa_trc_s)))
/*
* BFA timer declarations
*/
typedef void (*bfa_timer_cbfn_t)(void *);
/*
* BFA timer data structure
*/
struct bfa_timer_s {
struct list_head qe;
bfa_timer_cbfn_t timercb;
void *arg;
int timeout; /* in millisecs */
};
/*
* Timer module structure
*/
struct bfa_timer_mod_s {
struct list_head timer_q;
};
#define BFA_TIMER_FREQ 200 /* specified in millisecs */
void bfa_timer_beat(struct bfa_timer_mod_s *mod);
void bfa_timer_begin(struct bfa_timer_mod_s *mod, struct bfa_timer_s *timer,
bfa_timer_cbfn_t timercb, void *arg,
unsigned int timeout);
void bfa_timer_stop(struct bfa_timer_s *timer);
/*
* Generic Scatter Gather Element used by driver
*/
struct bfa_sge_s {
u32 sg_len;
void *sg_addr;
};
#define bfa_sge_word_swap(__sge) do { \
((u32 *)(__sge))[0] = swab32(((u32 *)(__sge))[0]); \
((u32 *)(__sge))[1] = swab32(((u32 *)(__sge))[1]); \
((u32 *)(__sge))[2] = swab32(((u32 *)(__sge))[2]); \
} while (0)
#define bfa_swap_words(_x) ( \
((u64)(_x) << 32) | ((u64)(_x) >> 32))
#ifdef __BIG_ENDIAN
#define bfa_sge_to_be(_x)
#define bfa_sge_to_le(_x) bfa_sge_word_swap(_x)
#define bfa_sgaddr_le(_x) bfa_swap_words(_x)
#else
#define bfa_sge_to_be(_x) bfa_sge_word_swap(_x)
#define bfa_sge_to_le(_x)
#define bfa_sgaddr_le(_x) (_x)
#endif
/*
* BFA memory resources
*/
struct bfa_mem_dma_s {
struct list_head qe; /* Queue of DMA elements */
u32 mem_len; /* Total Length in Bytes */
u8 *kva; /* kernel virtual address */
u64 dma; /* dma address if DMA memory */
u8 *kva_curp; /* kva allocation cursor */
u64 dma_curp; /* dma allocation cursor */
};
#define bfa_mem_dma_t struct bfa_mem_dma_s
struct bfa_mem_kva_s {
struct list_head qe; /* Queue of KVA elements */
u32 mem_len; /* Total Length in Bytes */
u8 *kva; /* kernel virtual address */
u8 *kva_curp; /* kva allocation cursor */
};
#define bfa_mem_kva_t struct bfa_mem_kva_s
struct bfa_meminfo_s {
struct bfa_mem_dma_s dma_info;
struct bfa_mem_kva_s kva_info;
};
/* BFA memory segment setup helpers */
static inline void bfa_mem_dma_setup(struct bfa_meminfo_s *meminfo,
struct bfa_mem_dma_s *dm_ptr,
size_t seg_sz)
{
dm_ptr->mem_len = seg_sz;
if (seg_sz)
list_add_tail(&dm_ptr->qe, &meminfo->dma_info.qe);
}
static inline void bfa_mem_kva_setup(struct bfa_meminfo_s *meminfo,
struct bfa_mem_kva_s *kva_ptr,
size_t seg_sz)
{
kva_ptr->mem_len = seg_sz;
if (seg_sz)
list_add_tail(&kva_ptr->qe, &meminfo->kva_info.qe);
}
/* BFA dma memory segments iterator */
#define bfa_mem_dma_sptr(_mod, _i) (&(_mod)->dma_seg[(_i)])
#define bfa_mem_dma_seg_iter(_mod, _sptr, _nr, _i) \
for (_i = 0, _sptr = bfa_mem_dma_sptr(_mod, _i); _i < (_nr); \
_i++, _sptr = bfa_mem_dma_sptr(_mod, _i))
#define bfa_mem_kva_curp(_mod) ((_mod)->kva_seg.kva_curp)
#define bfa_mem_dma_virt(_sptr) ((_sptr)->kva_curp)
#define bfa_mem_dma_phys(_sptr) ((_sptr)->dma_curp)
#define bfa_mem_dma_len(_sptr) ((_sptr)->mem_len)
/* Get the corresponding dma buf kva for a req - from the tag */
#define bfa_mem_get_dmabuf_kva(_mod, _tag, _rqsz) \
(((u8 *)(_mod)->dma_seg[BFI_MEM_SEG_FROM_TAG(_tag, _rqsz)].kva_curp) +\
BFI_MEM_SEG_REQ_OFFSET(_tag, _rqsz) * (_rqsz))
/* Get the corresponding dma buf pa for a req - from the tag */
#define bfa_mem_get_dmabuf_pa(_mod, _tag, _rqsz) \
((_mod)->dma_seg[BFI_MEM_SEG_FROM_TAG(_tag, _rqsz)].dma_curp + \
BFI_MEM_SEG_REQ_OFFSET(_tag, _rqsz) * (_rqsz))
/*
* PCI device information required by IOC
*/
struct bfa_pcidev_s {
int pci_slot;
u8 pci_func;
u16 device_id;
u16 ssid;
void __iomem *pci_bar_kva;
};
/*
* Structure used to remember the DMA-able memory block's KVA and Physical
* Address
*/
struct bfa_dma_s {
void *kva; /* ! Kernel virtual address */
u64 pa; /* ! Physical address */
};
#define BFA_DMA_ALIGN_SZ 256
#define BFA_ROUNDUP(_l, _s) (((_l) + ((_s) - 1)) & ~((_s) - 1))
/*
* smem size for Crossbow and Catapult
*/
#define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */
#define BFI_SMEM_CT_SIZE 0x280000U /* ! 2.5MB for catapult */
#define bfa_dma_be_addr_set(dma_addr, pa) \
__bfa_dma_be_addr_set(&dma_addr, (u64)pa)
static inline void
__bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa)
{
dma_addr->a32.addr_lo = cpu_to_be32(pa);
dma_addr->a32.addr_hi = cpu_to_be32(pa >> 32);
}
#define bfa_alen_set(__alen, __len, __pa) \
__bfa_alen_set(__alen, __len, (u64)__pa)
static inline void
__bfa_alen_set(struct bfi_alen_s *alen, u32 len, u64 pa)
{
alen->al_len = cpu_to_be32(len);
bfa_dma_be_addr_set(alen->al_addr, pa);
}
struct bfa_ioc_regs_s {
void __iomem *hfn_mbox_cmd;
void __iomem *hfn_mbox;
void __iomem *lpu_mbox_cmd;
void __iomem *lpu_mbox;
void __iomem *lpu_read_stat;
void __iomem *pss_ctl_reg;
void __iomem *pss_err_status_reg;
void __iomem *app_pll_fast_ctl_reg;
void __iomem *app_pll_slow_ctl_reg;
void __iomem *ioc_sem_reg;
void __iomem *ioc_usage_sem_reg;
void __iomem *ioc_init_sem_reg;
void __iomem *ioc_usage_reg;
void __iomem *host_page_num_fn;
void __iomem *heartbeat;
void __iomem *ioc_fwstate;
void __iomem *alt_ioc_fwstate;
void __iomem *ll_halt;
void __iomem *alt_ll_halt;
void __iomem *err_set;
void __iomem *ioc_fail_sync;
void __iomem *shirq_isr_next;
void __iomem *shirq_msk_next;
void __iomem *smem_page_start;
u32 smem_pg0;
};
#define bfa_mem_read(_raddr, _off) swab32(readl(((_raddr) + (_off))))
#define bfa_mem_write(_raddr, _off, _val) \
writel(swab32((_val)), ((_raddr) + (_off)))
/*
* IOC Mailbox structures
*/
struct bfa_mbox_cmd_s {
struct list_head qe;
u32 msg[BFI_IOC_MSGSZ];
};
/*
* IOC mailbox module
*/
typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg_s *m);
struct bfa_ioc_mbox_mod_s {
struct list_head cmd_q; /* pending mbox queue */
int nmclass; /* number of handlers */
struct {
bfa_ioc_mbox_mcfunc_t cbfn; /* message handlers */
void *cbarg;
} mbhdlr[BFI_MC_MAX];
};
/*
* IOC callback function interfaces
*/
typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status);
typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa);
typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa);
typedef void (*bfa_ioc_reset_cbfn_t)(void *bfa);
struct bfa_ioc_cbfn_s {
bfa_ioc_enable_cbfn_t enable_cbfn;
bfa_ioc_disable_cbfn_t disable_cbfn;
bfa_ioc_hbfail_cbfn_t hbfail_cbfn;
bfa_ioc_reset_cbfn_t reset_cbfn;
};
/*
* IOC event notification mechanism.
*/
enum ioc_event {
IOC_E_RESET = 1, /* IOC reset request */
IOC_E_ENABLE = 2, /* IOC enable request */
IOC_E_DISABLE = 3, /* IOC disable request */
IOC_E_DETACH = 4, /* driver detach cleanup */
IOC_E_ENABLED = 5, /* f/w enabled */
IOC_E_FWRSP_GETATTR = 6, /* IOC get attribute response */
IOC_E_DISABLED = 7, /* f/w disabled */
IOC_E_PFFAILED = 8, /* failure notice by iocpf sm */
IOC_E_HBFAIL = 9, /* heartbeat failure */
IOC_E_HWERROR = 10, /* hardware error interrupt */
IOC_E_TIMEOUT = 11, /* timeout */
IOC_E_HWFAILED = 12, /* PCI mapping failure notice */
};
struct bfa_ioc_s;
typedef void (*bfa_ioc_sm_t)(struct bfa_ioc_s *fsm, enum ioc_event);
enum bfa_ioc_event_e {
BFA_IOC_E_ENABLED = 1,
BFA_IOC_E_DISABLED = 2,
BFA_IOC_E_FAILED = 3,
};
typedef void (*bfa_ioc_notify_cbfn_t)(void *, enum bfa_ioc_event_e);
struct bfa_ioc_notify_s {
struct list_head qe;
bfa_ioc_notify_cbfn_t cbfn;
void *cbarg;
};
/*
* Initialize a IOC event notification structure
*/
#define bfa_ioc_notify_init(__notify, __cbfn, __cbarg) do { \
(__notify)->cbfn = (__cbfn); \
(__notify)->cbarg = (__cbarg); \
} while (0)
/*
* IOCPF state machine events
*/
enum iocpf_event {
IOCPF_E_ENABLE = 1, /* IOCPF enable request */
IOCPF_E_DISABLE = 2, /* IOCPF disable request */
IOCPF_E_STOP = 3, /* stop on driver detach */
IOCPF_E_FWREADY = 4, /* f/w initialization done */
IOCPF_E_FWRSP_ENABLE = 5, /* enable f/w response */
IOCPF_E_FWRSP_DISABLE = 6, /* disable f/w response */
IOCPF_E_FAIL = 7, /* failure notice by ioc sm */
IOCPF_E_INITFAIL = 8, /* init fail notice by ioc sm */
IOCPF_E_GETATTRFAIL = 9, /* init fail notice by ioc sm */
IOCPF_E_SEMLOCKED = 10, /* h/w semaphore is locked */
IOCPF_E_TIMEOUT = 11, /* f/w response timeout */
IOCPF_E_SEM_ERROR = 12, /* h/w sem mapping error */
};
struct bfa_iocpf_s;
typedef void (*bfa_iocpf_sm_t)(struct bfa_iocpf_s *fsm, enum iocpf_event);
struct bfa_iocpf_s {
bfa_iocpf_sm_t fsm;
struct bfa_ioc_s *ioc;
bfa_boolean_t fw_mismatch_notified;
bfa_boolean_t auto_recover;
u32 poll_time;
};
struct bfa_ioc_s {
bfa_ioc_sm_t fsm;
struct bfa_s *bfa;
struct bfa_pcidev_s pcidev;
struct bfa_timer_mod_s *timer_mod;
struct bfa_timer_s ioc_timer;
struct bfa_timer_s sem_timer;
struct bfa_timer_s hb_timer;
u32 hb_count;
struct list_head notify_q;
void *dbg_fwsave;
int dbg_fwsave_len;
bfa_boolean_t dbg_fwsave_once;
enum bfi_pcifn_class clscode;
struct bfa_ioc_regs_s ioc_regs;
struct bfa_trc_mod_s *trcmod;
struct bfa_ioc_drv_stats_s stats;
bfa_boolean_t fcmode;
bfa_boolean_t pllinit;
bfa_boolean_t stats_busy; /* outstanding stats */
u8 port_id;
struct bfa_dma_s attr_dma;
struct bfi_ioc_attr_s *attr;
struct bfa_ioc_cbfn_s *cbfn;
struct bfa_ioc_mbox_mod_s mbox_mod;
struct bfa_ioc_hwif_s *ioc_hwif;
struct bfa_iocpf_s iocpf;
enum bfi_asic_gen asic_gen;
enum bfi_asic_mode asic_mode;
enum bfi_port_mode port0_mode;
enum bfi_port_mode port1_mode;
enum bfa_mode_s port_mode;
u8 ad_cap_bm; /* adapter cap bit mask */
u8 port_mode_cfg; /* config port mode */
int ioc_aen_seq;
};
struct bfa_ioc_hwif_s {
bfa_status_t (*ioc_pll_init) (void __iomem *rb, enum bfi_asic_mode m);
bfa_boolean_t (*ioc_firmware_lock) (struct bfa_ioc_s *ioc);
void (*ioc_firmware_unlock) (struct bfa_ioc_s *ioc);
void (*ioc_reg_init) (struct bfa_ioc_s *ioc);
void (*ioc_map_port) (struct bfa_ioc_s *ioc);
void (*ioc_isr_mode_set) (struct bfa_ioc_s *ioc,
bfa_boolean_t msix);
void (*ioc_notify_fail) (struct bfa_ioc_s *ioc);
void (*ioc_ownership_reset) (struct bfa_ioc_s *ioc);
bfa_boolean_t (*ioc_sync_start) (struct bfa_ioc_s *ioc);
void (*ioc_sync_join) (struct bfa_ioc_s *ioc);
void (*ioc_sync_leave) (struct bfa_ioc_s *ioc);
void (*ioc_sync_ack) (struct bfa_ioc_s *ioc);
bfa_boolean_t (*ioc_sync_complete) (struct bfa_ioc_s *ioc);
bfa_boolean_t (*ioc_lpu_read_stat) (struct bfa_ioc_s *ioc);
void (*ioc_set_fwstate) (struct bfa_ioc_s *ioc,
enum bfi_ioc_state fwstate);
enum bfi_ioc_state (*ioc_get_fwstate) (struct bfa_ioc_s *ioc);
void (*ioc_set_alt_fwstate) (struct bfa_ioc_s *ioc,
enum bfi_ioc_state fwstate);
enum bfi_ioc_state (*ioc_get_alt_fwstate) (struct bfa_ioc_s *ioc);
};
/*
* Queue element to wait for room in request queue. FIFO order is
* maintained when fullfilling requests.
*/
struct bfa_reqq_wait_s {
struct list_head qe;
void (*qresume) (void *cbarg);
void *cbarg;
};
typedef void (*bfa_cb_cbfn_t) (void *cbarg, bfa_boolean_t complete);
typedef void (*bfa_cb_cbfn_status_t) (void *cbarg, bfa_status_t status);
/*
* Generic BFA callback element.
*/
struct bfa_cb_qe_s {
struct list_head qe;
union {
bfa_cb_cbfn_status_t cbfn_status;
bfa_cb_cbfn_t cbfn;
};
bfa_boolean_t once;
bfa_boolean_t pre_rmv; /* set for stack based qe(s) */
bfa_status_t fw_status; /* to access fw status in comp proc */
void *cbarg;
};
/*
* ASIC block configurtion related
*/
typedef void (*bfa_ablk_cbfn_t)(void *, enum bfa_status);
struct bfa_ablk_s {
struct bfa_ioc_s *ioc;
struct bfa_ablk_cfg_s *cfg;
u16 *pcifn;
struct bfa_dma_s dma_addr;
bfa_boolean_t busy;
struct bfa_mbox_cmd_s mb;
bfa_ablk_cbfn_t cbfn;
void *cbarg;
struct bfa_ioc_notify_s ioc_notify;
struct bfa_mem_dma_s ablk_dma;
};
#define BFA_MEM_ABLK_DMA(__bfa) (&((__bfa)->modules.ablk.ablk_dma))
/*
* SFP module specific
*/
typedef void (*bfa_cb_sfp_t) (void *cbarg, bfa_status_t status);
struct bfa_sfp_s {
void *dev;
struct bfa_ioc_s *ioc;
struct bfa_trc_mod_s *trcmod;
struct sfp_mem_s *sfpmem;
bfa_cb_sfp_t cbfn;
void *cbarg;
enum bfi_sfp_mem_e memtype; /* mem access type */
u32 status;
struct bfa_mbox_cmd_s mbcmd;
u8 *dbuf_kva; /* dma buf virtual address */
u64 dbuf_pa; /* dma buf physical address */
struct bfa_ioc_notify_s ioc_notify;
enum bfa_defs_sfp_media_e *media;
enum bfa_port_speed portspeed;
bfa_cb_sfp_t state_query_cbfn;
void *state_query_cbarg;
u8 lock;
u8 data_valid; /* data in dbuf is valid */
u8 state; /* sfp state */
u8 state_query_lock;
struct bfa_mem_dma_s sfp_dma;
u8 is_elb; /* eloopback */
};
#define BFA_SFP_MOD(__bfa) (&(__bfa)->modules.sfp)
#define BFA_MEM_SFP_DMA(__bfa) (&(BFA_SFP_MOD(__bfa)->sfp_dma))
u32 bfa_sfp_meminfo(void);
void bfa_sfp_attach(struct bfa_sfp_s *sfp, struct bfa_ioc_s *ioc,
void *dev, struct bfa_trc_mod_s *trcmod);
void bfa_sfp_memclaim(struct bfa_sfp_s *diag, u8 *dm_kva, u64 dm_pa);
void bfa_sfp_intr(void *bfaarg, struct bfi_mbmsg_s *msg);
bfa_status_t bfa_sfp_show(struct bfa_sfp_s *sfp, struct sfp_mem_s *sfpmem,
bfa_cb_sfp_t cbfn, void *cbarg);
bfa_status_t bfa_sfp_media(struct bfa_sfp_s *sfp,
enum bfa_defs_sfp_media_e *media,
bfa_cb_sfp_t cbfn, void *cbarg);
bfa_status_t bfa_sfp_speed(struct bfa_sfp_s *sfp,
enum bfa_port_speed portspeed,
bfa_cb_sfp_t cbfn, void *cbarg);
/*
* Flash module specific
*/
typedef void (*bfa_cb_flash_t) (void *cbarg, bfa_status_t status);
struct bfa_flash_s {
struct bfa_ioc_s *ioc; /* back pointer to ioc */
struct bfa_trc_mod_s *trcmod;
u32 type; /* partition type */
u8 instance; /* partition instance */
u8 rsv[3];
u32 op_busy; /* operation busy flag */
u32 residue; /* residual length */
u32 offset; /* offset */
bfa_status_t status; /* status */
u8 *dbuf_kva; /* dma buf virtual address */
u64 dbuf_pa; /* dma buf physical address */
struct bfa_reqq_wait_s reqq_wait; /* to wait for room in reqq */
bfa_cb_flash_t cbfn; /* user callback function */
void *cbarg; /* user callback arg */
u8 *ubuf; /* user supplied buffer */
struct bfa_cb_qe_s hcb_qe; /* comp: BFA callback qelem */
u32 addr_off; /* partition address offset */
struct bfa_mbox_cmd_s mb; /* mailbox */
struct bfa_ioc_notify_s ioc_notify; /* ioc event notify */
struct bfa_mem_dma_s flash_dma;
};
#define BFA_FLASH(__bfa) (&(__bfa)->modules.flash)
#define BFA_MEM_FLASH_DMA(__bfa) (&(BFA_FLASH(__bfa)->flash_dma))
bfa_status_t bfa_flash_get_attr(struct bfa_flash_s *flash,
struct bfa_flash_attr_s *attr,
bfa_cb_flash_t cbfn, void *cbarg);
bfa_status_t bfa_flash_erase_part(struct bfa_flash_s *flash,
enum bfa_flash_part_type type, u8 instance,
bfa_cb_flash_t cbfn, void *cbarg);
bfa_status_t bfa_flash_update_part(struct bfa_flash_s *flash,
enum bfa_flash_part_type type, u8 instance,
void *buf, u32 len, u32 offset,
bfa_cb_flash_t cbfn, void *cbarg);
bfa_status_t bfa_flash_read_part(struct bfa_flash_s *flash,
enum bfa_flash_part_type type, u8 instance, void *buf,
u32 len, u32 offset, bfa_cb_flash_t cbfn, void *cbarg);
u32 bfa_flash_meminfo(bfa_boolean_t mincfg);
void bfa_flash_attach(struct bfa_flash_s *flash, struct bfa_ioc_s *ioc,
void *dev, struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg);
void bfa_flash_memclaim(struct bfa_flash_s *flash,
u8 *dm_kva, u64 dm_pa, bfa_boolean_t mincfg);
bfa_status_t bfa_flash_raw_read(void __iomem *pci_bar_kva,
u32 offset, char *buf, u32 len);
/*
* DIAG module specific
*/
typedef void (*bfa_cb_diag_t) (void *cbarg, bfa_status_t status);
typedef void (*bfa_cb_diag_beacon_t) (void *dev, bfa_boolean_t beacon,
bfa_boolean_t link_e2e_beacon);
/*
* Firmware ping test results
*/
struct bfa_diag_results_fwping {
u32 data; /* store the corrupted data */
u32 status;
u32 dmastatus;
u8 rsvd[4];
};
struct bfa_diag_qtest_result_s {
u32 status;
u16 count; /* successful queue test count */
u8 queue;
u8 rsvd; /* 64-bit align */
};
/*
* Firmware ping test results
*/
struct bfa_diag_fwping_s {
struct bfa_diag_results_fwping *result;
bfa_cb_diag_t cbfn;
void *cbarg;
u32 data;
u8 lock;
u8 rsv[3];
u32 status;
u32 count;
struct bfa_mbox_cmd_s mbcmd;
u8 *dbuf_kva; /* dma buf virtual address */
u64 dbuf_pa; /* dma buf physical address */
};
/*
* Temperature sensor query results
*/
struct bfa_diag_results_tempsensor_s {
u32 status;
u16 temp; /* 10-bit A/D value */
u16 brd_temp; /* 9-bit board temp */
u8 ts_junc; /* show junction tempsensor */
u8 ts_brd; /* show board tempsensor */
u8 rsvd[6]; /* keep 8 bytes alignment */
};
struct bfa_diag_tsensor_s {
bfa_cb_diag_t cbfn;
void *cbarg;
struct bfa_diag_results_tempsensor_s *temp;
u8 lock;
u8 rsv[3];
u32 status;
struct bfa_mbox_cmd_s mbcmd;
};
struct bfa_diag_sfpshow_s {
struct sfp_mem_s *sfpmem;
bfa_cb_diag_t cbfn;
void *cbarg;
u8 lock;
u8 static_data;
u8 rsv[2];
u32 status;
struct bfa_mbox_cmd_s mbcmd;
u8 *dbuf_kva; /* dma buf virtual address */
u64 dbuf_pa; /* dma buf physical address */
};
struct bfa_diag_led_s {
struct bfa_mbox_cmd_s mbcmd;
bfa_boolean_t lock; /* 1: ledtest is operating */
};
struct bfa_diag_beacon_s {
struct bfa_mbox_cmd_s mbcmd;
bfa_boolean_t state; /* port beacon state */
bfa_boolean_t link_e2e; /* link beacon state */
};
struct bfa_diag_s {
void *dev;
struct bfa_ioc_s *ioc;
struct bfa_trc_mod_s *trcmod;
struct bfa_diag_fwping_s fwping;
struct bfa_diag_tsensor_s tsensor;
struct bfa_diag_sfpshow_s sfpshow;
struct bfa_diag_led_s ledtest;
struct bfa_diag_beacon_s beacon;
void *result;
struct bfa_timer_s timer;
bfa_cb_diag_beacon_t cbfn_beacon;
bfa_cb_diag_t cbfn;
void *cbarg;
u8 block;
u8 timer_active;
u8 rsvd[2];
u32 status;
struct bfa_ioc_notify_s ioc_notify;
struct bfa_mem_dma_s diag_dma;
};
#define BFA_DIAG_MOD(__bfa) (&(__bfa)->modules.diag_mod)
#define BFA_MEM_DIAG_DMA(__bfa) (&(BFA_DIAG_MOD(__bfa)->diag_dma))
u32 bfa_diag_meminfo(void);
void bfa_diag_memclaim(struct bfa_diag_s *diag, u8 *dm_kva, u64 dm_pa);
void bfa_diag_attach(struct bfa_diag_s *diag, struct bfa_ioc_s *ioc, void *dev,
bfa_cb_diag_beacon_t cbfn_beacon,
struct bfa_trc_mod_s *trcmod);
bfa_status_t bfa_diag_reg_read(struct bfa_diag_s *diag, u32 offset,
u32 len, u32 *buf, u32 force);
bfa_status_t bfa_diag_reg_write(struct bfa_diag_s *diag, u32 offset,
u32 len, u32 value, u32 force);
bfa_status_t bfa_diag_tsensor_query(struct bfa_diag_s *diag,
struct bfa_diag_results_tempsensor_s *result,
bfa_cb_diag_t cbfn, void *cbarg);
bfa_status_t bfa_diag_fwping(struct bfa_diag_s *diag, u32 cnt,
u32 pattern, struct bfa_diag_results_fwping *result,
bfa_cb_diag_t cbfn, void *cbarg);
bfa_status_t bfa_diag_sfpshow(struct bfa_diag_s *diag,
struct sfp_mem_s *sfpmem, u8 static_data,
bfa_cb_diag_t cbfn, void *cbarg);
bfa_status_t bfa_diag_memtest(struct bfa_diag_s *diag,
struct bfa_diag_memtest_s *memtest, u32 pattern,
struct bfa_diag_memtest_result *result,
bfa_cb_diag_t cbfn, void *cbarg);
bfa_status_t bfa_diag_ledtest(struct bfa_diag_s *diag,
struct bfa_diag_ledtest_s *ledtest);
bfa_status_t bfa_diag_beacon_port(struct bfa_diag_s *diag,
bfa_boolean_t beacon, bfa_boolean_t link_e2e_beacon,
u32 sec);
/*
* PHY module specific
*/
typedef void (*bfa_cb_phy_t) (void *cbarg, bfa_status_t status);
struct bfa_phy_s {
struct bfa_ioc_s *ioc; /* back pointer to ioc */
struct bfa_trc_mod_s *trcmod; /* trace module */
u8 instance; /* port instance */
u8 op_busy; /* operation busy flag */
u8 rsv[2];
u32 residue; /* residual length */
u32 offset; /* offset */
bfa_status_t status; /* status */
u8 *dbuf_kva; /* dma buf virtual address */
u64 dbuf_pa; /* dma buf physical address */
struct bfa_reqq_wait_s reqq_wait; /* to wait for room in reqq */
bfa_cb_phy_t cbfn; /* user callback function */
void *cbarg; /* user callback arg */
u8 *ubuf; /* user supplied buffer */
struct bfa_cb_qe_s hcb_qe; /* comp: BFA callback qelem */
u32 addr_off; /* phy address offset */
struct bfa_mbox_cmd_s mb; /* mailbox */
struct bfa_ioc_notify_s ioc_notify; /* ioc event notify */
struct bfa_mem_dma_s phy_dma;
};
#define BFA_PHY(__bfa) (&(__bfa)->modules.phy)
#define BFA_MEM_PHY_DMA(__bfa) (&(BFA_PHY(__bfa)->phy_dma))
bfa_boolean_t bfa_phy_busy(struct bfa_ioc_s *ioc);
bfa_status_t bfa_phy_get_attr(struct bfa_phy_s *phy, u8 instance,
struct bfa_phy_attr_s *attr,
bfa_cb_phy_t cbfn, void *cbarg);
bfa_status_t bfa_phy_get_stats(struct bfa_phy_s *phy, u8 instance,
struct bfa_phy_stats_s *stats,
bfa_cb_phy_t cbfn, void *cbarg);
bfa_status_t bfa_phy_update(struct bfa_phy_s *phy, u8 instance,
void *buf, u32 len, u32 offset,
bfa_cb_phy_t cbfn, void *cbarg);
bfa_status_t bfa_phy_read(struct bfa_phy_s *phy, u8 instance,
void *buf, u32 len, u32 offset,
bfa_cb_phy_t cbfn, void *cbarg);
u32 bfa_phy_meminfo(bfa_boolean_t mincfg);
void bfa_phy_attach(struct bfa_phy_s *phy, struct bfa_ioc_s *ioc,
void *dev, struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg);
void bfa_phy_memclaim(struct bfa_phy_s *phy,
u8 *dm_kva, u64 dm_pa, bfa_boolean_t mincfg);
void bfa_phy_intr(void *phyarg, struct bfi_mbmsg_s *msg);
/*
* FRU module specific
*/
typedef void (*bfa_cb_fru_t) (void *cbarg, bfa_status_t status);
struct bfa_fru_s {
struct bfa_ioc_s *ioc; /* back pointer to ioc */
struct bfa_trc_mod_s *trcmod; /* trace module */
u8 op_busy; /* operation busy flag */
u8 rsv[3];
u32 residue; /* residual length */
u32 offset; /* offset */
bfa_status_t status; /* status */
u8 *dbuf_kva; /* dma buf virtual address */
u64 dbuf_pa; /* dma buf physical address */
struct bfa_reqq_wait_s reqq_wait; /* to wait for room in reqq */
bfa_cb_fru_t cbfn; /* user callback function */
void *cbarg; /* user callback arg */
u8 *ubuf; /* user supplied buffer */
struct bfa_cb_qe_s hcb_qe; /* comp: BFA callback qelem */
u32 addr_off; /* fru address offset */
struct bfa_mbox_cmd_s mb; /* mailbox */
struct bfa_ioc_notify_s ioc_notify; /* ioc event notify */
struct bfa_mem_dma_s fru_dma;
u8 trfr_cmpl;
};
#define BFA_FRU(__bfa) (&(__bfa)->modules.fru)
#define BFA_MEM_FRU_DMA(__bfa) (&(BFA_FRU(__bfa)->fru_dma))
bfa_status_t bfa_fruvpd_update(struct bfa_fru_s *fru,
void *buf, u32 len, u32 offset,
bfa_cb_fru_t cbfn, void *cbarg, u8 trfr_cmpl);
bfa_status_t bfa_fruvpd_read(struct bfa_fru_s *fru,
void *buf, u32 len, u32 offset,
bfa_cb_fru_t cbfn, void *cbarg);
bfa_status_t bfa_fruvpd_get_max_size(struct bfa_fru_s *fru, u32 *max_size);
bfa_status_t bfa_tfru_write(struct bfa_fru_s *fru,
void *buf, u32 len, u32 offset,
bfa_cb_fru_t cbfn, void *cbarg);
bfa_status_t bfa_tfru_read(struct bfa_fru_s *fru,
void *buf, u32 len, u32 offset,
bfa_cb_fru_t cbfn, void *cbarg);
u32 bfa_fru_meminfo(bfa_boolean_t mincfg);
void bfa_fru_attach(struct bfa_fru_s *fru, struct bfa_ioc_s *ioc,
void *dev, struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg);
void bfa_fru_memclaim(struct bfa_fru_s *fru,
u8 *dm_kva, u64 dm_pa, bfa_boolean_t mincfg);
void bfa_fru_intr(void *fruarg, struct bfi_mbmsg_s *msg);
/*
* Driver Config( dconf) specific
*/
#define BFI_DCONF_SIGNATURE 0xabcdabcd
#define BFI_DCONF_VERSION 1
#pragma pack(1)
struct bfa_dconf_hdr_s {
u32 signature;
u32 version;
};
struct bfa_dconf_s {
struct bfa_dconf_hdr_s hdr;
struct bfa_lunmask_cfg_s lun_mask;
struct bfa_throttle_cfg_s throttle_cfg;
};
#pragma pack()
/*
* DCONF state machine events
*/
enum bfa_dconf_event {
BFA_DCONF_SM_INIT = 1, /* dconf Init */
BFA_DCONF_SM_FLASH_COMP = 2, /* read/write to flash */
BFA_DCONF_SM_WR = 3, /* binding change, map */
BFA_DCONF_SM_TIMEOUT = 4, /* Start timer */
BFA_DCONF_SM_EXIT = 5, /* exit dconf module */
BFA_DCONF_SM_IOCDISABLE = 6, /* IOC disable event */
};
struct bfa_dconf_mod_s;
typedef void (*bfa_dconf_sm_t)(struct bfa_dconf_mod_s *fsm, enum bfa_dconf_event);
struct bfa_dconf_mod_s {
bfa_dconf_sm_t sm;
u8 instance;
bfa_boolean_t read_data_valid;
bfa_boolean_t min_cfg;
struct bfa_timer_s timer;
struct bfa_s *bfa;
void *bfad;
void *trcmod;
struct bfa_dconf_s *dconf;
struct bfa_mem_kva_s kva_seg;
};
#define BFA_DCONF_MOD(__bfa) \
(&(__bfa)->modules.dconf_mod)
#define BFA_MEM_DCONF_KVA(__bfa) (&(BFA_DCONF_MOD(__bfa)->kva_seg))
#define bfa_dconf_read_data_valid(__bfa) \
(BFA_DCONF_MOD(__bfa)->read_data_valid)
#define BFA_DCONF_UPDATE_TOV 5000 /* memtest timeout in msec */
#define bfa_dconf_get_min_cfg(__bfa) \
(BFA_DCONF_MOD(__bfa)->min_cfg)
void bfa_dconf_modinit(struct bfa_s *bfa);
void bfa_dconf_modexit(struct bfa_s *bfa);
bfa_status_t bfa_dconf_update(struct bfa_s *bfa);
/*
* IOC specfic macros
*/
#define bfa_ioc_pcifn(__ioc) ((__ioc)->pcidev.pci_func)
#define bfa_ioc_devid(__ioc) ((__ioc)->pcidev.device_id)
#define bfa_ioc_bar0(__ioc) ((__ioc)->pcidev.pci_bar_kva)
#define bfa_ioc_portid(__ioc) ((__ioc)->port_id)
#define bfa_ioc_asic_gen(__ioc) ((__ioc)->asic_gen)
#define bfa_ioc_is_cna(__ioc) \
((bfa_ioc_get_type(__ioc) == BFA_IOC_TYPE_FCoE) || \
(bfa_ioc_get_type(__ioc) == BFA_IOC_TYPE_LL))
#define bfa_ioc_fetch_stats(__ioc, __stats) \
(((__stats)->drv_stats) = (__ioc)->stats)
#define bfa_ioc_clr_stats(__ioc) \
memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats))
#define bfa_ioc_maxfrsize(__ioc) ((__ioc)->attr->maxfrsize)
#define bfa_ioc_rx_bbcredit(__ioc) ((__ioc)->attr->rx_bbcredit)
#define bfa_ioc_speed_sup(__ioc) \
((bfa_ioc_is_cna(__ioc)) ? BFA_PORT_SPEED_10GBPS : \
BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop))
#define bfa_ioc_get_nports(__ioc) \
BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop)
#define bfa_ioc_stats(_ioc, _stats) ((_ioc)->stats._stats++)
#define BFA_IOC_FWIMG_MINSZ (16 * 1024)
#define BFA_IOC_FW_SMEM_SIZE(__ioc) \
((bfa_ioc_asic_gen(__ioc) == BFI_ASIC_GEN_CB) \
? BFI_SMEM_CB_SIZE : BFI_SMEM_CT_SIZE)
#define BFA_IOC_FLASH_CHUNK_NO(off) (off / BFI_FLASH_CHUNK_SZ_WORDS)
#define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS)
#define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
/*
* IOC mailbox interface
*/
void bfa_ioc_mbox_queue(struct bfa_ioc_s *ioc, struct bfa_mbox_cmd_s *cmd);
void bfa_ioc_mbox_register(struct bfa_ioc_s *ioc,
bfa_ioc_mbox_mcfunc_t *mcfuncs);
void bfa_ioc_mbox_isr(struct bfa_ioc_s *ioc);
void bfa_ioc_mbox_send(struct bfa_ioc_s *ioc, void *ioc_msg, int len);
bfa_boolean_t bfa_ioc_msgget(struct bfa_ioc_s *ioc, void *mbmsg);
void bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc,
bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg);
/*
* IOC interfaces
*/
#define bfa_ioc_pll_init_asic(__ioc) \
((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \
(__ioc)->asic_mode))
bfa_status_t bfa_ioc_pll_init(struct bfa_ioc_s *ioc);
bfa_status_t bfa_ioc_cb_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
bfa_status_t bfa_ioc_ct_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
bfa_status_t bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
#define bfa_ioc_isr_mode_set(__ioc, __msix) do { \
if ((__ioc)->ioc_hwif->ioc_isr_mode_set) \
((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix)); \
} while (0)
#define bfa_ioc_ownership_reset(__ioc) \
((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
#define bfa_ioc_get_fcmode(__ioc) ((__ioc)->fcmode)
#define bfa_ioc_lpu_read_stat(__ioc) do { \
if ((__ioc)->ioc_hwif->ioc_lpu_read_stat) \
((__ioc)->ioc_hwif->ioc_lpu_read_stat(__ioc)); \
} while (0)
void bfa_ioc_set_cb_hwif(struct bfa_ioc_s *ioc);
void bfa_ioc_set_ct_hwif(struct bfa_ioc_s *ioc);
void bfa_ioc_set_ct2_hwif(struct bfa_ioc_s *ioc);
void bfa_ioc_ct2_poweron(struct bfa_ioc_s *ioc);
void bfa_ioc_attach(struct bfa_ioc_s *ioc, void *bfa,
struct bfa_ioc_cbfn_s *cbfn, struct bfa_timer_mod_s *timer_mod);
void bfa_ioc_detach(struct bfa_ioc_s *ioc);
void bfa_ioc_suspend(struct bfa_ioc_s *ioc);
void bfa_ioc_pci_init(struct bfa_ioc_s *ioc, struct bfa_pcidev_s *pcidev,
enum bfi_pcifn_class clscode);
void bfa_ioc_mem_claim(struct bfa_ioc_s *ioc, u8 *dm_kva, u64 dm_pa);
void bfa_ioc_enable(struct bfa_ioc_s *ioc);
void bfa_ioc_disable(struct bfa_ioc_s *ioc);
bfa_boolean_t bfa_ioc_intx_claim(struct bfa_ioc_s *ioc);
bfa_status_t bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type,
u32 boot_env);
void bfa_ioc_isr(struct bfa_ioc_s *ioc, struct bfi_mbmsg_s *msg);
void bfa_ioc_error_isr(struct bfa_ioc_s *ioc);
bfa_boolean_t bfa_ioc_is_operational(struct bfa_ioc_s *ioc);
bfa_boolean_t bfa_ioc_is_disabled(struct bfa_ioc_s *ioc);
bfa_boolean_t bfa_ioc_is_acq_addr(struct bfa_ioc_s *ioc);
bfa_boolean_t bfa_ioc_fw_mismatch(struct bfa_ioc_s *ioc);
bfa_boolean_t bfa_ioc_adapter_is_disabled(struct bfa_ioc_s *ioc);
void bfa_ioc_reset_fwstate(struct bfa_ioc_s *ioc);
enum bfa_ioc_type_e bfa_ioc_get_type(struct bfa_ioc_s *ioc);
void bfa_ioc_get_adapter_serial_num(struct bfa_ioc_s *ioc, char *serial_num);
void bfa_ioc_get_adapter_fw_ver(struct bfa_ioc_s *ioc, char *fw_ver);
void bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc_s *ioc, char *optrom_ver);
void bfa_ioc_get_adapter_model(struct bfa_ioc_s *ioc, char *model);
void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc_s *ioc,
char *manufacturer);
void bfa_ioc_get_pci_chip_rev(struct bfa_ioc_s *ioc, char *chip_rev);
enum bfa_ioc_state bfa_ioc_get_state(struct bfa_ioc_s *ioc);
void bfa_ioc_get_attr(struct bfa_ioc_s *ioc, struct bfa_ioc_attr_s *ioc_attr);
void bfa_ioc_get_adapter_attr(struct bfa_ioc_s *ioc,
struct bfa_adapter_attr_s *ad_attr);
void bfa_ioc_debug_memclaim(struct bfa_ioc_s *ioc, void *dbg_fwsave);
bfa_status_t bfa_ioc_debug_fwsave(struct bfa_ioc_s *ioc, void *trcdata,
int *trclen);
bfa_status_t bfa_ioc_debug_fwtrc(struct bfa_ioc_s *ioc, void *trcdata,
int *trclen);
bfa_status_t bfa_ioc_debug_fwcore(struct bfa_ioc_s *ioc, void *buf,
u32 *offset, int *buflen);
bfa_status_t bfa_ioc_fwsig_invalidate(struct bfa_ioc_s *ioc);
bfa_boolean_t bfa_ioc_sem_get(void __iomem *sem_reg);
void bfa_ioc_fwver_get(struct bfa_ioc_s *ioc,
struct bfi_ioc_image_hdr_s *fwhdr);
bfa_boolean_t bfa_ioc_fwver_cmp(struct bfa_ioc_s *ioc,
struct bfi_ioc_image_hdr_s *fwhdr);
void bfa_ioc_aen_post(struct bfa_ioc_s *ioc, enum bfa_ioc_aen_event event);
bfa_status_t bfa_ioc_fw_stats_get(struct bfa_ioc_s *ioc, void *stats);
bfa_status_t bfa_ioc_fw_stats_clear(struct bfa_ioc_s *ioc);
void bfa_ioc_debug_save_ftrc(struct bfa_ioc_s *ioc);
/*
* asic block configuration related APIs
*/
u32 bfa_ablk_meminfo(void);
void bfa_ablk_memclaim(struct bfa_ablk_s *ablk, u8 *dma_kva, u64 dma_pa);
void bfa_ablk_attach(struct bfa_ablk_s *ablk, struct bfa_ioc_s *ioc);
bfa_status_t bfa_ablk_query(struct bfa_ablk_s *ablk,
struct bfa_ablk_cfg_s *ablk_cfg,
bfa_ablk_cbfn_t cbfn, void *cbarg);
bfa_status_t bfa_ablk_adapter_config(struct bfa_ablk_s *ablk,
enum bfa_mode_s mode, int max_pf, int max_vf,
bfa_ablk_cbfn_t cbfn, void *cbarg);
bfa_status_t bfa_ablk_port_config(struct bfa_ablk_s *ablk, int port,
enum bfa_mode_s mode, int max_pf, int max_vf,
bfa_ablk_cbfn_t cbfn, void *cbarg);
bfa_status_t bfa_ablk_pf_create(struct bfa_ablk_s *ablk, u16 *pcifn,
u8 port, enum bfi_pcifn_class personality,
u16 bw_min, u16 bw_max, bfa_ablk_cbfn_t cbfn, void *cbarg);
bfa_status_t bfa_ablk_pf_delete(struct bfa_ablk_s *ablk, int pcifn,
bfa_ablk_cbfn_t cbfn, void *cbarg);
bfa_status_t bfa_ablk_pf_update(struct bfa_ablk_s *ablk, int pcifn,
u16 bw_min, u16 bw_max, bfa_ablk_cbfn_t cbfn, void *cbarg);
bfa_status_t bfa_ablk_optrom_en(struct bfa_ablk_s *ablk,
bfa_ablk_cbfn_t cbfn, void *cbarg);
bfa_status_t bfa_ablk_optrom_dis(struct bfa_ablk_s *ablk,
bfa_ablk_cbfn_t cbfn, void *cbarg);
bfa_status_t bfa_ioc_flash_img_get_chnk(struct bfa_ioc_s *ioc, u32 off,
u32 *fwimg);
/*
* bfa mfg wwn API functions
*/
mac_t bfa_ioc_get_mac(struct bfa_ioc_s *ioc);
mac_t bfa_ioc_get_mfg_mac(struct bfa_ioc_s *ioc);
/*
* F/W Image Size & Chunk
*/
extern u32 bfi_image_cb_size;
extern u32 bfi_image_ct_size;
extern u32 bfi_image_ct2_size;
extern u32 *bfi_image_cb;
extern u32 *bfi_image_ct;
extern u32 *bfi_image_ct2;
static inline u32 *
bfi_image_cb_get_chunk(u32 off)
{
return (u32 *)(bfi_image_cb + off);
}
static inline u32 *
bfi_image_ct_get_chunk(u32 off)
{
return (u32 *)(bfi_image_ct + off);
}
static inline u32 *
bfi_image_ct2_get_chunk(u32 off)
{
return (u32 *)(bfi_image_ct2 + off);
}
static inline u32*
bfa_cb_image_get_chunk(enum bfi_asic_gen asic_gen, u32 off)
{
switch (asic_gen) {
case BFI_ASIC_GEN_CB:
return bfi_image_cb_get_chunk(off);
break;
case BFI_ASIC_GEN_CT:
return bfi_image_ct_get_chunk(off);
break;
case BFI_ASIC_GEN_CT2:
return bfi_image_ct2_get_chunk(off);
break;
default:
return NULL;
}
}
static inline u32
bfa_cb_image_get_size(enum bfi_asic_gen asic_gen)
{
switch (asic_gen) {
case BFI_ASIC_GEN_CB:
return bfi_image_cb_size;
break;
case BFI_ASIC_GEN_CT:
return bfi_image_ct_size;
break;
case BFI_ASIC_GEN_CT2:
return bfi_image_ct2_size;
break;
default:
return 0;
}
}
/*
* CNA TRCMOD declaration
*/
/*
* !!! Only append to the enums defined here to avoid any versioning
* !!! needed between trace utility and driver version
*/
enum {
BFA_TRC_CNA_PORT = 1,
BFA_TRC_CNA_IOC = 2,
BFA_TRC_CNA_IOC_CB = 3,
BFA_TRC_CNA_IOC_CT = 4,
};
#endif /* __BFA_IOC_H__ */
|