1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
|
/*
* Marvell Armada XP pinctrl driver based on mvebu pinctrl core
*
* Copyright (C) 2012 Marvell
*
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This file supports the three variants of Armada XP SoCs that are
* available: mv78230, mv78260 and mv78460. From a pin muxing
* perspective, the mv78230 has 49 MPP pins. The mv78260 and mv78460
* both have 67 MPP pins (more GPIOs and address lines for the memory
* bus mainly). The only difference between the mv78260 and the
* mv78460 in terms of pin muxing is the addition of two functions on
* pins 43 and 56 to access the VDD of the CPU2 and 3 (mv78260 has two
* cores, mv78460 has four cores).
*/
#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/bitops.h>
#include "pinctrl-mvebu.h"
static void __iomem *mpp_base;
static int armada_xp_mpp_ctrl_get(unsigned pid, unsigned long *config)
{
return default_mpp_ctrl_get(mpp_base, pid, config);
}
static int armada_xp_mpp_ctrl_set(unsigned pid, unsigned long config)
{
return default_mpp_ctrl_set(mpp_base, pid, config);
}
enum armada_xp_variant {
V_MV78230 = BIT(0),
V_MV78260 = BIT(1),
V_MV78460 = BIT(2),
V_MV78230_PLUS = (V_MV78230 | V_MV78260 | V_MV78460),
V_MV78260_PLUS = (V_MV78260 | V_MV78460),
};
static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_MODE(0,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txclko", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d0", V_MV78230_PLUS)),
MPP_MODE(1,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd0", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d1", V_MV78230_PLUS)),
MPP_MODE(2,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd1", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d2", V_MV78230_PLUS)),
MPP_MODE(3,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd2", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d3", V_MV78230_PLUS)),
MPP_MODE(4,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd3", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d4", V_MV78230_PLUS)),
MPP_MODE(5,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txctl", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d5", V_MV78230_PLUS)),
MPP_MODE(6,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxd0", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d6", V_MV78230_PLUS)),
MPP_MODE(7,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxd1", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d7", V_MV78230_PLUS)),
MPP_MODE(8,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxd2", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d8", V_MV78230_PLUS)),
MPP_MODE(9,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxd3", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d9", V_MV78230_PLUS)),
MPP_MODE(10,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxctl", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d10", V_MV78230_PLUS)),
MPP_MODE(11,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxclk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d11", V_MV78230_PLUS)),
MPP_MODE(12,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd4", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "clkout", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d12", V_MV78230_PLUS)),
MPP_MODE(13,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd5", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txd0", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d13", V_MV78230_PLUS)),
MPP_MODE(14,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd6", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txd1", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d14", V_MV78230_PLUS)),
MPP_MODE(15,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd7", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txd2", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d15", V_MV78230_PLUS)),
MPP_MODE(16,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txclk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txd3", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d16", V_MV78230_PLUS)),
MPP_MODE(17,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "col", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txctl", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d17", V_MV78230_PLUS)),
MPP_MODE(18,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxerr", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "rxd0", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "ptp", "trig", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d18", V_MV78230_PLUS)),
MPP_MODE(19,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "crs", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "rxd1", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "ptp", "evreq", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d19", V_MV78230_PLUS)),
MPP_MODE(20,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxd4", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "rxd2", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "ptp", "clk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d20", V_MV78230_PLUS)),
MPP_MODE(21,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxd5", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "rxd3", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "mem", "bat", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d21", V_MV78230_PLUS)),
MPP_MODE(22,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxd6", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "rxctl", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "sata0", "prsnt", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d22", V_MV78230_PLUS)),
MPP_MODE(23,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxd7", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "rxclk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d23", V_MV78230_PLUS)),
MPP_MODE(24,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sata1", "prsnt", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "nf", "bootcs-re", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "rst", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "hsync", V_MV78230_PLUS)),
MPP_MODE(25,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sata0", "prsnt", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "nf", "bootcs-we", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "pclk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "vsync", V_MV78230_PLUS)),
MPP_MODE(26,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "fsync", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "clk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd", V_MV78230_PLUS)),
MPP_MODE(27,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ptp", "trig", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "dtx", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "e", V_MV78230_PLUS)),
MPP_MODE(28,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ptp", "evreq", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "drx", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "pwm", V_MV78230_PLUS)),
MPP_MODE(29,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ptp", "clk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "int0", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd", V_MV78230_PLUS)),
MPP_MODE(30,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "clk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "int1", V_MV78230_PLUS)),
MPP_MODE(31,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "cmd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "int2", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd", V_MV78230_PLUS)),
MPP_MODE(32,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "d0", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "int3", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd", V_MV78230_PLUS)),
MPP_MODE(33,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "d1", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "int4", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "mem", "bat", V_MV78230_PLUS)),
MPP_MODE(34,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "d2", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "sata0", "prsnt", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "int5", V_MV78230_PLUS)),
MPP_MODE(35,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "d3", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "sata1", "prsnt", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "int6", V_MV78230_PLUS)),
MPP_MODE(36,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "spi", "mosi", V_MV78230_PLUS)),
MPP_MODE(37,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "spi", "miso", V_MV78230_PLUS)),
MPP_MODE(38,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "spi", "sck", V_MV78230_PLUS)),
MPP_MODE(39,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "spi", "cs0", V_MV78230_PLUS)),
MPP_MODE(40,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "spi", "cs1", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart2", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "vdd", "cpu1-pd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0", V_MV78230_PLUS)),
MPP_MODE(41,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "spi", "cs2", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart2", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1", V_MV78230_PLUS)),
MPP_MODE(42,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart2", "rxd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart0", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "int7", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "tdm-1", "timer", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd", V_MV78230_PLUS)),
MPP_MODE(43,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart2", "txd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart0", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "spi", "cs3", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "pcie", "rstout", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x5, "vdd", "cpu2-3-pd", V_MV78460)),
MPP_MODE(44,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart2", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart3", "rxd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "spi", "cs4", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "mem", "bat", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2", V_MV78230_PLUS)),
MPP_MODE(45,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart2", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart3", "txd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "spi", "cs5", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "sata1", "prsnt", V_MV78230_PLUS)),
MPP_MODE(46,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart3", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart1", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "spi", "cs6", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "sata0", "prsnt", V_MV78230_PLUS)),
MPP_MODE(47,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart3", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart1", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "spi", "cs7", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "ref", "clkout", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3", V_MV78230_PLUS)),
MPP_MODE(48,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "tclk", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS)),
MPP_MODE(49,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "we3", V_MV78260_PLUS)),
MPP_MODE(50,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "we2", V_MV78260_PLUS)),
MPP_MODE(51,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad16", V_MV78260_PLUS)),
MPP_MODE(52,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad17", V_MV78260_PLUS)),
MPP_MODE(53,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad18", V_MV78260_PLUS)),
MPP_MODE(54,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad19", V_MV78260_PLUS)),
MPP_MODE(55,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad20", V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x2, "vdd", "cpu0-pd", V_MV78260_PLUS)),
MPP_MODE(56,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad21", V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x2, "vdd", "cpu1-pd", V_MV78260_PLUS)),
MPP_MODE(57,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad22", V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x2, "vdd", "cpu2-3-pd", V_MV78460)),
MPP_MODE(58,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad23", V_MV78260_PLUS)),
MPP_MODE(59,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad24", V_MV78260_PLUS)),
MPP_MODE(60,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad25", V_MV78260_PLUS)),
MPP_MODE(61,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad26", V_MV78260_PLUS)),
MPP_MODE(62,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad27", V_MV78260_PLUS)),
MPP_MODE(63,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad28", V_MV78260_PLUS)),
MPP_MODE(64,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad29", V_MV78260_PLUS)),
MPP_MODE(65,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad30", V_MV78260_PLUS)),
MPP_MODE(66,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad31", V_MV78260_PLUS)),
};
static struct mvebu_pinctrl_soc_info armada_xp_pinctrl_info;
static struct of_device_id armada_xp_pinctrl_of_match[] = {
{
.compatible = "marvell,mv78230-pinctrl",
.data = (void *) V_MV78230,
},
{
.compatible = "marvell,mv78260-pinctrl",
.data = (void *) V_MV78260,
},
{
.compatible = "marvell,mv78460-pinctrl",
.data = (void *) V_MV78460,
},
{ },
};
static struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
MPP_FUNC_CTRL(0, 48, NULL, armada_xp_mpp_ctrl),
};
static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = {
MPP_GPIO_RANGE(0, 0, 0, 32),
MPP_GPIO_RANGE(1, 32, 32, 17),
};
static struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
};
static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = {
MPP_GPIO_RANGE(0, 0, 0, 32),
MPP_GPIO_RANGE(1, 32, 32, 32),
MPP_GPIO_RANGE(2, 64, 64, 3),
};
static struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
};
static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = {
MPP_GPIO_RANGE(0, 0, 0, 32),
MPP_GPIO_RANGE(1, 32, 32, 32),
MPP_GPIO_RANGE(2, 64, 64, 3),
};
static int armada_xp_pinctrl_probe(struct platform_device *pdev)
{
struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info;
const struct of_device_id *match =
of_match_device(armada_xp_pinctrl_of_match, &pdev->dev);
struct resource *res;
if (!match)
return -ENODEV;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
mpp_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(mpp_base))
return PTR_ERR(mpp_base);
soc->variant = (unsigned) match->data & 0xff;
switch (soc->variant) {
case V_MV78230:
soc->controls = mv78230_mpp_controls;
soc->ncontrols = ARRAY_SIZE(mv78230_mpp_controls);
soc->modes = armada_xp_mpp_modes;
/* We don't necessarily want the full list of the
* armada_xp_mpp_modes, but only the first 'n' ones
* that are available on this SoC */
soc->nmodes = mv78230_mpp_controls[0].npins;
soc->gpioranges = mv78230_mpp_gpio_ranges;
soc->ngpioranges = ARRAY_SIZE(mv78230_mpp_gpio_ranges);
break;
case V_MV78260:
soc->controls = mv78260_mpp_controls;
soc->ncontrols = ARRAY_SIZE(mv78260_mpp_controls);
soc->modes = armada_xp_mpp_modes;
/* We don't necessarily want the full list of the
* armada_xp_mpp_modes, but only the first 'n' ones
* that are available on this SoC */
soc->nmodes = mv78260_mpp_controls[0].npins;
soc->gpioranges = mv78260_mpp_gpio_ranges;
soc->ngpioranges = ARRAY_SIZE(mv78260_mpp_gpio_ranges);
break;
case V_MV78460:
soc->controls = mv78460_mpp_controls;
soc->ncontrols = ARRAY_SIZE(mv78460_mpp_controls);
soc->modes = armada_xp_mpp_modes;
/* We don't necessarily want the full list of the
* armada_xp_mpp_modes, but only the first 'n' ones
* that are available on this SoC */
soc->nmodes = mv78460_mpp_controls[0].npins;
soc->gpioranges = mv78460_mpp_gpio_ranges;
soc->ngpioranges = ARRAY_SIZE(mv78460_mpp_gpio_ranges);
break;
}
pdev->dev.platform_data = soc;
return mvebu_pinctrl_probe(pdev);
}
static int armada_xp_pinctrl_remove(struct platform_device *pdev)
{
return mvebu_pinctrl_remove(pdev);
}
static struct platform_driver armada_xp_pinctrl_driver = {
.driver = {
.name = "armada-xp-pinctrl",
.owner = THIS_MODULE,
.of_match_table = armada_xp_pinctrl_of_match,
},
.probe = armada_xp_pinctrl_probe,
.remove = armada_xp_pinctrl_remove,
};
module_platform_driver(armada_xp_pinctrl_driver);
MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
MODULE_DESCRIPTION("Marvell Armada XP pinctrl driver");
MODULE_LICENSE("GPL v2");
|
