summaryrefslogtreecommitdiff
path: root/arch/powerpc/sysdev/6xx-suspend.S
blob: 21cda085d926417eed53992f711c9d843c99a7a2 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
/*
 * Enter and leave sleep state on chips with 6xx-style HID0
 * power management bits, which don't leave sleep state via reset.
 *
 * Author: Scott Wood <scottwood@freescale.com>
 *
 * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published
 * by the Free Software Foundation.
 */

#include <asm/ppc_asm.h>
#include <asm/reg.h>
#include <asm/thread_info.h>
#include <asm/asm-offsets.h>

_GLOBAL(mpc6xx_enter_standby)
	mflr	r4

	mfspr	r5, SPRN_HID0
	rlwinm	r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
	oris	r5, r5, HID0_SLEEP@h
	mtspr	SPRN_HID0, r5
	isync

	lis	r5, ret_from_standby@h
	ori	r5, r5, ret_from_standby@l
	mtlr	r5

	rlwinm	r5, r1, 0, 0, 31-THREAD_SHIFT
	lwz	r6, TI_LOCAL_FLAGS(r5)
	ori	r6, r6, _TLF_SLEEPING
	stw	r6, TI_LOCAL_FLAGS(r5)

	mfmsr	r5
	ori	r5, r5, MSR_EE
	oris	r5, r5, MSR_POW@h
	sync
	mtmsr	r5
	isync

1:	b	1b

ret_from_standby:
	mfspr	r5, SPRN_HID0
	rlwinm	r5, r5, 0, ~HID0_SLEEP
	mtspr	SPRN_HID0, r5

	mtlr	r4
	blr