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// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/jz4725b-cgu.h>
#include <dt-bindings/clock/ingenic,tcu.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ingenic,jz4725b";
cpuintc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
intc: interrupt-controller@10001000 {
compatible = "ingenic,jz4725b-intc", "ingenic,jz4740-intc";
reg = <0x10001000 0x14>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
};
ext: ext {
compatible = "fixed-clock";
#clock-cells = <0>;
};
osc32k: osc32k {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
cgu: clock-controller@10000000 {
compatible = "ingenic,jz4725b-cgu";
reg = <0x10000000 0x100>;
clocks = <&ext>, <&osc32k>;
clock-names = "ext", "osc32k";
#clock-cells = <1>;
};
tcu: timer@10002000 {
compatible = "ingenic,jz4725b-tcu", "simple-mfd";
reg = <0x10002000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x10002000 0x1000>;
#clock-cells = <1>;
clocks = <&cgu JZ4725B_CLK_RTC>,
<&cgu JZ4725B_CLK_EXT>,
<&cgu JZ4725B_CLK_PCLK>,
<&cgu JZ4725B_CLK_TCU>;
clock-names = "rtc", "ext", "pclk", "tcu";
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&intc>;
interrupts = <23>, <22>, <21>;
watchdog: watchdog@0 {
compatible = "ingenic,jz4725b-watchdog", "ingenic,jz4740-watchdog";
reg = <0x0 0xc>;
clocks = <&tcu TCU_CLK_WDT>;
clock-names = "wdt";
};
pwm: pwm@60 {
compatible = "ingenic,jz4725b-pwm";
reg = <0x60 0x40>;
#pwm-cells = <3>;
clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
<&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
<&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>;
clock-names = "timer0", "timer1", "timer2",
"timer3", "timer4", "timer5";
};
ost: timer@e0 {
compatible = "ingenic,jz4725b-ost";
reg = <0xe0 0x20>;
clocks = <&tcu TCU_CLK_OST>;
clock-names = "ost";
interrupts = <15>;
};
};
rtc_dev: rtc@10003000 {
compatible = "ingenic,jz4725b-rtc", "ingenic,jz4740-rtc";
reg = <0x10003000 0x40>;
interrupt-parent = <&intc>;
interrupts = <6>;
clocks = <&cgu JZ4725B_CLK_RTC>;
clock-names = "rtc";
};
pinctrl: pinctrl@10010000 {
compatible = "ingenic,jz4725b-pinctrl";
reg = <0x10010000 0x400>;
#address-cells = <1>;
#size-cells = <0>;
gpa: gpio@0 {
compatible = "ingenic,jz4725b-gpio";
reg = <0>;
gpio-controller;
gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&intc>;
interrupts = <16>;
};
gpb: gpio@1 {
compatible = "ingenic,jz4725b-gpio";
reg = <1>;
gpio-controller;
gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&intc>;
interrupts = <15>;
};
gpc: gpio@2 {
compatible = "ingenic,jz4725b-gpio";
reg = <2>;
gpio-controller;
gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&intc>;
interrupts = <14>;
};
gpd: gpio@3 {
compatible = "ingenic,jz4725b-gpio";
reg = <3>;
gpio-controller;
gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&intc>;
interrupts = <13>;
};
};
aic: audio-controller@10020000 {
compatible = "ingenic,jz4725b-i2s", "ingenic,jz4740-i2s";
reg = <0x10020000 0x38>;
#sound-dai-cells = <0>;
clocks = <&cgu JZ4725B_CLK_AIC>,
<&cgu JZ4725B_CLK_I2S>,
<&cgu JZ4725B_CLK_EXT>,
<&cgu JZ4725B_CLK_PLL_HALF>;
clock-names = "aic", "i2s", "ext", "pll half";
interrupt-parent = <&intc>;
interrupts = <10>;
dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
dma-names = "rx", "tx";
};
codec: audio-codec@100200a4 {
compatible = "ingenic,jz4725b-codec";
reg = <0x100200a4 0x8>;
#sound-dai-cells = <0>;
clocks = <&cgu JZ4725B_CLK_AIC>;
clock-names = "aic";
};
mmc0: mmc@10021000 {
compatible = "ingenic,jz4725b-mmc";
reg = <0x10021000 0x1000>;
clocks = <&cgu JZ4725B_CLK_MMC0>;
clock-names = "mmc";
interrupt-parent = <&intc>;
interrupts = <25>;
dmas = <&dmac 27 0xffffffff>, <&dmac 26 0xffffffff>;
dma-names = "rx", "tx";
cap-sd-highspeed;
cap-mmc-highspeed;
cap-sdio-irq;
};
mmc1: mmc@10022000 {
compatible = "ingenic,jz4725b-mmc";
reg = <0x10022000 0x1000>;
clocks = <&cgu JZ4725B_CLK_MMC1>;
clock-names = "mmc";
interrupt-parent = <&intc>;
interrupts = <24>;
dmas = <&dmac 31 0xffffffff>, <&dmac 30 0xffffffff>;
dma-names = "rx", "tx";
cap-sd-highspeed;
cap-mmc-highspeed;
cap-sdio-irq;
};
uart: serial@10030000 {
compatible = "ingenic,jz4725b-uart", "ingenic,jz4740-uart";
reg = <0x10030000 0x100>;
interrupt-parent = <&intc>;
interrupts = <9>;
clocks = <&ext>, <&cgu JZ4725B_CLK_UART>;
clock-names = "baud", "module";
};
adc: adc@10070000 {
compatible = "ingenic,jz4725b-adc";
#io-channel-cells = <1>;
reg = <0x10070000 0x30>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x10070000 0x30>;
clocks = <&cgu JZ4725B_CLK_ADC>;
clock-names = "adc";
interrupt-parent = <&intc>;
interrupts = <18>;
};
nemc: memory-controller@13010000 {
compatible = "ingenic,jz4725b-nemc", "ingenic,jz4740-nemc";
reg = <0x13010000 0x10000>;
#address-cells = <2>;
#size-cells = <1>;
ranges = <1 0 0x18000000 0x4000000>, <2 0 0x14000000 0x4000000>,
<3 0 0x0c000000 0x4000000>, <4 0 0x08000000 0x4000000>;
clocks = <&cgu JZ4725B_CLK_MCLK>;
};
dmac: dma-controller@13020000 {
compatible = "ingenic,jz4725b-dma";
reg = <0x13020000 0xd8>, <0x13020300 0x14>;
#dma-cells = <2>;
interrupt-parent = <&intc>;
interrupts = <29>;
clocks = <&cgu JZ4725B_CLK_DMA>;
};
udc: usb@13040000 {
compatible = "ingenic,jz4725b-musb", "ingenic,jz4740-musb";
reg = <0x13040000 0x10000>;
interrupt-parent = <&intc>;
interrupts = <27>;
interrupt-names = "mc";
clocks = <&cgu JZ4725B_CLK_UDC>;
clock-names = "udc";
};
lcd: lcd-controller@13050000 {
compatible = "ingenic,jz4725b-lcd";
reg = <0x13050000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <31>;
clocks = <&cgu JZ4725B_CLK_LCD>;
clock-names = "lcd_pclk";
lcd_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
port@8 {
reg = <8>;
ipu_output: endpoint {
remote-endpoint = <&ipu_input>;
};
};
};
};
ipu: ipu@13080000 {
compatible = "ingenic,jz4725b-ipu";
reg = <0x13080000 0x64>;
interrupt-parent = <&intc>;
interrupts = <30>;
clocks = <&cgu JZ4725B_CLK_IPU>;
clock-names = "ipu";
port {
ipu_input: endpoint {
remote-endpoint = <&ipu_output>;
};
};
};
bch: ecc-controller@130d0000 {
compatible = "ingenic,jz4725b-bch";
reg = <0x130d0000 0x44>;
clocks = <&cgu JZ4725B_CLK_BCH>;
};
rom: memory@1fc00000 {
compatible = "mtd-rom";
probe-type = "map_rom";
reg = <0x1fc00000 0x2000>;
bank-width = <4>;
device-width = <1>;
};
};
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