summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt
blob: 051f764bedb8d0c3f9bc147dea875cb8b9fb4af2 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
Generic CPU0 cpufreq driver

It is a generic cpufreq driver for CPU0 frequency management.  It
supports both uniprocessor (UP) and symmetric multiprocessor (SMP)
systems which share clock and voltage across all CPUs.

Both required and optional properties listed below must be defined
under node /cpus/cpu@0.

Required properties:
- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt
  for details

Optional properties:
- clock-latency: Specify the possible maximum transition latency for clock,
  in unit of nanoseconds.
- voltage-tolerance: Specify the CPU voltage tolerance in percentage.

Examples:

cpus {
	#address-cells = <1>;
	#size-cells = <0>;

	cpu@0 {
		compatible = "arm,cortex-a9";
		reg = <0>;
		next-level-cache = <&L2>;
		operating-points = <
			/* kHz    uV */
			792000  1100000
			396000  950000
			198000  850000
		>;
		clock-latency = <61036>; /* two CLK32 periods */
	};

	cpu@1 {
		compatible = "arm,cortex-a9";
		reg = <1>;
		next-level-cache = <&L2>;
	};

	cpu@2 {
		compatible = "arm,cortex-a9";
		reg = <2>;
		next-level-cache = <&L2>;
	};

	cpu@3 {
		compatible = "arm,cortex-a9";
		reg = <3>;
		next-level-cache = <&L2>;
	};
};