From f2454a1a4b2aca38d3b7887619f43291d773c1ee Mon Sep 17 00:00:00 2001 From: Jes Sorensen Date: Wed, 25 Oct 2006 05:49:53 -0400 Subject: [IA64] don't double >> PAGE_SHIFT pointer for /dev/kmem access Don't PAGE_SHIFT pointer before handing it to virt_to_page() in xlate_dev_kmem_ptr() as it results in a double shift. Spotted by Bob Montgomery. Signed-off-by: Jes Sorensen Signed-off-by: Tony Luck --- include/asm-ia64/uaccess.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-ia64/uaccess.h b/include/asm-ia64/uaccess.h index 9adb51211c22..449c8c0fa2bd 100644 --- a/include/asm-ia64/uaccess.h +++ b/include/asm-ia64/uaccess.h @@ -389,7 +389,7 @@ xlate_dev_kmem_ptr (char * p) struct page *page; char * ptr; - page = virt_to_page((unsigned long)p >> PAGE_SHIFT); + page = virt_to_page((unsigned long)p); if (PageUncached(page)) ptr = (char *)__pa(p) + __IA64_UNCACHED_OFFSET; else -- cgit v1.2.3 From fa1d19e5d9a94120f31e5783ab44758f46892d94 Mon Sep 17 00:00:00 2001 From: Troy Heber Date: Wed, 25 Oct 2006 14:46:15 -0600 Subject: [IA64] move SAL_CACHE_FLUSH check later in boot The check to see if the firmware drops interrupts during a SAL_CACHE_FLUSH is done to early in the boot. SAL_CACHE_FLUSH expects to be able to make PAL calls in virtual mode, on some cell based machines a fault occurs causing a MCA. This patch moves the check after mmu_context_init so the TLB and VHPT are properly setup. Signed-off-by Troy Heber Signed-off-by: Tony Luck --- arch/ia64/kernel/sal.c | 11 +++++++---- arch/ia64/kernel/setup.c | 2 ++ include/asm-ia64/sal.h | 1 + 3 files changed, 10 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/arch/ia64/kernel/sal.c b/arch/ia64/kernel/sal.c index 642fdc7b969d..20bad78b5073 100644 --- a/arch/ia64/kernel/sal.c +++ b/arch/ia64/kernel/sal.c @@ -223,12 +223,13 @@ static void __init sal_desc_ap_wakeup(void *p) { } */ static int sal_cache_flush_drops_interrupts; -static void __init +void __init check_sal_cache_flush (void) { unsigned long flags; int cpu; - u64 vector; + u64 vector, cache_type = 3; + struct ia64_sal_retval isrv; cpu = get_cpu(); local_irq_save(flags); @@ -243,7 +244,10 @@ check_sal_cache_flush (void) while (!ia64_get_irr(IA64_TIMER_VECTOR)) cpu_relax(); - ia64_sal_cache_flush(3); + SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0); + + if (isrv.status) + printk(KERN_ERR "SAL_CAL_FLUSH failed with %ld\n", isrv.status); if (ia64_get_irr(IA64_TIMER_VECTOR)) { vector = ia64_get_ivr(); @@ -331,7 +335,6 @@ ia64_sal_init (struct ia64_sal_systab *systab) p += SAL_DESC_SIZE(*p); } - check_sal_cache_flush(); } int diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c index c4caa8003492..d10404a41756 100644 --- a/arch/ia64/kernel/setup.c +++ b/arch/ia64/kernel/setup.c @@ -457,6 +457,8 @@ setup_arch (char **cmdline_p) cpu_init(); /* initialize the bootstrap CPU */ mmu_context_init(); /* initialize context_id bitmap */ + check_sal_cache_flush(); + #ifdef CONFIG_ACPI acpi_boot_init(); #endif diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h index 0b210abbe003..d000689d9142 100644 --- a/include/asm-ia64/sal.h +++ b/include/asm-ia64/sal.h @@ -659,6 +659,7 @@ ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second, } extern s64 ia64_sal_cache_flush (u64 cache_type); +extern void __init check_sal_cache_flush (void); /* Initialize all the processor and platform level instruction and data caches */ static inline s64 -- cgit v1.2.3