From f89f9c56e7372b2dda144f83dce61311b298c559 Mon Sep 17 00:00:00 2001 From: Sven Peter Date: Mon, 25 Oct 2021 08:22:04 +0200 Subject: mailbox: apple: Add driver for Apple mailboxes Apple SoCs such as the M1 come with various co-processors. Mailboxes are used to communicate with those. This driver adds support for two variants of those mailboxes. Signed-off-by: Sven Peter Signed-off-by: Jassi Brar --- include/linux/apple-mailbox.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 include/linux/apple-mailbox.h (limited to 'include') diff --git a/include/linux/apple-mailbox.h b/include/linux/apple-mailbox.h new file mode 100644 index 000000000000..720fbb70294a --- /dev/null +++ b/include/linux/apple-mailbox.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ +/* + * Apple mailbox message format + * + * Copyright (C) 2021 The Asahi Linux Contributors + */ + +#ifndef _LINUX_APPLE_MAILBOX_H_ +#define _LINUX_APPLE_MAILBOX_H_ + +#include + +/* encodes a single 96bit message sent over the single channel */ +struct apple_mbox_msg { + u64 msg0; + u32 msg1; +}; + +#endif -- cgit v1.2.3 From 0f2591e21b2e85c05e2aa74d4703189fd3a57526 Mon Sep 17 00:00:00 2001 From: Sudeep Holla Date: Fri, 17 Sep 2021 14:33:49 +0100 Subject: mailbox: pcc: Add pcc_mbox_chan structure to hold shared memory region info Currently PCC mailbox controller sets con_priv in each channel to hold the pointer to pcct subspace entry it corresponds to. The mailbox user will then fetch this pointer from the channel descriptor they get when they request for the channel. Using that pointer they then parse the pcct entry again to fetch all the information about shared memory region. In order to remove individual users of PCC mailbox parsing the PCCT subspace entries to fetch same information, let us consolidate the same in pcc mailbox controller by parsing all the shared memory region information into a structure that can also hold the mbox_chan pointer it represent. This can then be used as main PCC mailbox channel pointer that we can return as part of pcc_mbox_request_channel instead of standard mailbox channel pointer. Reviewed-by: Cristian Marussi Signed-off-by: Sudeep Holla Signed-off-by: Jassi Brar --- drivers/mailbox/pcc.c | 27 +++++++++++++++++++++++++++ include/acpi/pcc.h | 9 +++++++++ 2 files changed, 36 insertions(+) (limited to 'include') diff --git a/drivers/mailbox/pcc.c b/drivers/mailbox/pcc.c index 97c44c431ada..f358ced827f2 100644 --- a/drivers/mailbox/pcc.c +++ b/drivers/mailbox/pcc.c @@ -67,11 +67,13 @@ static struct mbox_chan *pcc_mbox_channels; /** * struct pcc_chan_info - PCC channel specific information * + * @chan: PCC channel information with Shared Memory Region info * @db_vaddr: cached virtual address for doorbell register * @db_ack_vaddr: cached virtual address for doorbell ack register * @db_irq: doorbell interrupt */ struct pcc_chan_info { + struct pcc_mbox_chan chan; void __iomem *db_vaddr; void __iomem *db_ack_vaddr; int db_irq; @@ -470,6 +472,27 @@ static void pcc_parse_subspace_db_reg(struct pcc_chan_info *pchan, db_reg->bit_width / 8); } +/** + * pcc_parse_subspace_shmem - Parse the PCC Shared Memory Region information + * + * @pchan: Pointer to the PCC channel info structure. + * @pcct_entry: Pointer to the ACPI subtable header. + * + */ +static void pcc_parse_subspace_shmem(struct pcc_chan_info *pchan, + struct acpi_subtable_header *pcct_entry) +{ + struct acpi_pcct_subspace *pcct_ss; + + pcct_ss = (struct acpi_pcct_subspace *)pcct_entry; + + pchan->chan.shmem_base_addr = pcct_ss->base_address; + pchan->chan.shmem_size = pcct_ss->length; + pchan->chan.latency = pcct_ss->latency; + pchan->chan.max_access_rate = pcct_ss->max_access_rate; + pchan->chan.min_turnaround_time = pcct_ss->min_turnaround_time; +} + /** * acpi_pcc_probe - Parse the ACPI tree for the PCCT. * @@ -537,6 +560,8 @@ static int __init acpi_pcc_probe(void) struct pcc_chan_info *pchan = chan_info + i; pcc_mbox_channels[i].con_priv = pcct_entry; + pchan->chan.mchan = &pcc_mbox_channels[i]; + if (pcc_mbox_ctrl.txdone_irq) { rc = pcc_parse_subspace_irq(pchan, pcct_entry); if (rc < 0) @@ -544,6 +569,8 @@ static int __init acpi_pcc_probe(void) } pcc_parse_subspace_db_reg(pchan, pcct_entry); + pcc_parse_subspace_shmem(pchan, pcct_entry); + pcct_entry = (struct acpi_subtable_header *) ((unsigned long) pcct_entry + pcct_entry->length); } diff --git a/include/acpi/pcc.h b/include/acpi/pcc.h index 4dec4ed138cd..5e510a6b8052 100644 --- a/include/acpi/pcc.h +++ b/include/acpi/pcc.h @@ -9,6 +9,15 @@ #include #include +struct pcc_mbox_chan { + struct mbox_chan *mchan; + u64 shmem_base_addr; + u64 shmem_size; + u32 latency; + u32 max_access_rate; + u16 min_turnaround_time; +}; + #define MAX_PCC_SUBSPACES 256 #ifdef CONFIG_PCC extern struct mbox_chan *pcc_mbox_request_channel(struct mbox_client *cl, -- cgit v1.2.3 From 7b6da7fe7bba1cdccdda871bf393b855e59404c3 Mon Sep 17 00:00:00 2001 From: Sudeep Holla Date: Fri, 17 Sep 2021 14:33:50 +0100 Subject: mailbox: pcc: Use PCC mailbox channel pointer instead of standard Now that we have all the shared memory region information populated in the pcc_mbox_chan, let us propagate the pointer to the same as the return value to pcc_mbox_request channel. This eliminates the need for the individual users of PCC mailbox to parse the PCCT subspace entries and fetch the shmem information. This also eliminates the need for PCC mailbox controller to set con_priv to PCCT subspace entries. This is required as con_priv is private to the controller driver to attach private data associated with the channel and not meant to be used by the mailbox client/users. Let us convert all the users of pcc_mbox_{request,free}_channel to use new interface. Cc: Jean Delvare Signed-off-by: Sudeep Holla Acked-by: Wolfram Sang Acked-by: Guenter Roeck Signed-off-by: Jassi Brar --- drivers/acpi/cppc_acpi.c | 43 ++++++++--------------- drivers/hwmon/xgene-hwmon.c | 35 +++++++------------ drivers/i2c/busses/i2c-xgene-slimpro.c | 33 +++++++----------- drivers/mailbox/pcc.c | 63 ++++++++++------------------------ include/acpi/pcc.h | 12 +++---- 5 files changed, 64 insertions(+), 122 deletions(-) (limited to 'include') diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index bd482108310c..a85c351589be 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c @@ -43,7 +43,7 @@ #include struct cppc_pcc_data { - struct mbox_chan *pcc_channel; + struct pcc_mbox_chan *pcc_channel; void __iomem *pcc_comm_addr; bool pcc_channel_acquired; unsigned int deadline_us; @@ -295,7 +295,7 @@ static int send_pcc_cmd(int pcc_ss_id, u16 cmd) pcc_ss_data->platform_owns_pcc = true; /* Ring doorbell */ - ret = mbox_send_message(pcc_ss_data->pcc_channel, &cmd); + ret = mbox_send_message(pcc_ss_data->pcc_channel->mchan, &cmd); if (ret < 0) { pr_err("Err sending PCC mbox message. ss: %d cmd:%d, ret:%d\n", pcc_ss_id, cmd, ret); @@ -308,10 +308,10 @@ static int send_pcc_cmd(int pcc_ss_id, u16 cmd) if (pcc_ss_data->pcc_mrtt) pcc_ss_data->last_cmd_cmpl_time = ktime_get(); - if (pcc_ss_data->pcc_channel->mbox->txdone_irq) - mbox_chan_txdone(pcc_ss_data->pcc_channel, ret); + if (pcc_ss_data->pcc_channel->mchan->mbox->txdone_irq) + mbox_chan_txdone(pcc_ss_data->pcc_channel->mchan, ret); else - mbox_client_txdone(pcc_ss_data->pcc_channel, ret); + mbox_client_txdone(pcc_ss_data->pcc_channel->mchan, ret); end: if (cmd == CMD_WRITE) { @@ -493,46 +493,33 @@ EXPORT_SYMBOL_GPL(acpi_get_psd_map); static int register_pcc_channel(int pcc_ss_idx) { - struct acpi_pcct_hw_reduced *cppc_ss; + struct pcc_mbox_chan *pcc_chan; u64 usecs_lat; if (pcc_ss_idx >= 0) { - pcc_data[pcc_ss_idx]->pcc_channel = - pcc_mbox_request_channel(&cppc_mbox_cl, pcc_ss_idx); + pcc_chan = pcc_mbox_request_channel(&cppc_mbox_cl, pcc_ss_idx); - if (IS_ERR(pcc_data[pcc_ss_idx]->pcc_channel)) { + if (IS_ERR(pcc_chan)) { pr_err("Failed to find PCC channel for subspace %d\n", pcc_ss_idx); return -ENODEV; } - /* - * The PCC mailbox controller driver should - * have parsed the PCCT (global table of all - * PCC channels) and stored pointers to the - * subspace communication region in con_priv. - */ - cppc_ss = (pcc_data[pcc_ss_idx]->pcc_channel)->con_priv; - - if (!cppc_ss) { - pr_err("No PCC subspace found for %d CPPC\n", - pcc_ss_idx); - return -ENODEV; - } - + pcc_data[pcc_ss_idx]->pcc_channel = pcc_chan; /* * cppc_ss->latency is just a Nominal value. In reality * the remote processor could be much slower to reply. * So add an arbitrary amount of wait on top of Nominal. */ - usecs_lat = NUM_RETRIES * cppc_ss->latency; + usecs_lat = NUM_RETRIES * pcc_chan->latency; pcc_data[pcc_ss_idx]->deadline_us = usecs_lat; - pcc_data[pcc_ss_idx]->pcc_mrtt = cppc_ss->min_turnaround_time; - pcc_data[pcc_ss_idx]->pcc_mpar = cppc_ss->max_access_rate; - pcc_data[pcc_ss_idx]->pcc_nominal = cppc_ss->latency; + pcc_data[pcc_ss_idx]->pcc_mrtt = pcc_chan->min_turnaround_time; + pcc_data[pcc_ss_idx]->pcc_mpar = pcc_chan->max_access_rate; + pcc_data[pcc_ss_idx]->pcc_nominal = pcc_chan->latency; pcc_data[pcc_ss_idx]->pcc_comm_addr = - acpi_os_ioremap(cppc_ss->base_address, cppc_ss->length); + acpi_os_ioremap(pcc_chan->shmem_base_addr, + pcc_chan->shmem_size); if (!pcc_data[pcc_ss_idx]->pcc_comm_addr) { pr_err("Failed to ioremap PCC comm region mem for %d\n", pcc_ss_idx); diff --git a/drivers/hwmon/xgene-hwmon.c b/drivers/hwmon/xgene-hwmon.c index 382ef0395d8e..30aae8642069 100644 --- a/drivers/hwmon/xgene-hwmon.c +++ b/drivers/hwmon/xgene-hwmon.c @@ -93,6 +93,7 @@ struct slimpro_resp_msg { struct xgene_hwmon_dev { struct device *dev; struct mbox_chan *mbox_chan; + struct pcc_mbox_chan *pcc_chan; struct mbox_client mbox_client; int mbox_idx; @@ -652,7 +653,7 @@ static int xgene_hwmon_probe(struct platform_device *pdev) goto out_mbox_free; } } else { - struct acpi_pcct_hw_reduced *cppc_ss; + struct pcc_mbox_chan *pcc_chan; const struct acpi_device_id *acpi_id; int version; @@ -671,26 +672,16 @@ static int xgene_hwmon_probe(struct platform_device *pdev) } cl->rx_callback = xgene_hwmon_pcc_rx_cb; - ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx); - if (IS_ERR(ctx->mbox_chan)) { + pcc_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx); + if (IS_ERR(pcc_chan)) { dev_err(&pdev->dev, "PPC channel request failed\n"); rc = -ENODEV; goto out_mbox_free; } - /* - * The PCC mailbox controller driver should - * have parsed the PCCT (global table of all - * PCC channels) and stored pointers to the - * subspace communication region in con_priv. - */ - cppc_ss = ctx->mbox_chan->con_priv; - if (!cppc_ss) { - dev_err(&pdev->dev, "PPC subspace not found\n"); - rc = -ENODEV; - goto out; - } + ctx->pcc_chan = pcc_chan; + ctx->mbox_chan = pcc_chan->mchan; if (!ctx->mbox_chan->mbox->txdone_irq) { dev_err(&pdev->dev, "PCC IRQ not supported\n"); @@ -702,16 +693,16 @@ static int xgene_hwmon_probe(struct platform_device *pdev) * This is the shared communication region * for the OS and Platform to communicate over. */ - ctx->comm_base_addr = cppc_ss->base_address; + ctx->comm_base_addr = pcc_chan->shmem_base_addr; if (ctx->comm_base_addr) { if (version == XGENE_HWMON_V2) ctx->pcc_comm_addr = (void __force *)ioremap( ctx->comm_base_addr, - cppc_ss->length); + pcc_chan->shmem_size); else ctx->pcc_comm_addr = memremap( ctx->comm_base_addr, - cppc_ss->length, + pcc_chan->shmem_size, MEMREMAP_WB); } else { dev_err(&pdev->dev, "Failed to get PCC comm region\n"); @@ -727,11 +718,11 @@ static int xgene_hwmon_probe(struct platform_device *pdev) } /* - * cppc_ss->latency is just a Nominal value. In reality + * pcc_chan->latency is just a Nominal value. In reality * the remote processor could be much slower to reply. * So add an arbitrary amount of wait on top of Nominal. */ - ctx->usecs_lat = PCC_NUM_RETRIES * cppc_ss->latency; + ctx->usecs_lat = PCC_NUM_RETRIES * pcc_chan->latency; } ctx->hwmon_dev = hwmon_device_register_with_groups(ctx->dev, @@ -757,7 +748,7 @@ out: if (acpi_disabled) mbox_free_channel(ctx->mbox_chan); else - pcc_mbox_free_channel(ctx->mbox_chan); + pcc_mbox_free_channel(ctx->pcc_chan); out_mbox_free: kfifo_free(&ctx->async_msg_fifo); @@ -773,7 +764,7 @@ static int xgene_hwmon_remove(struct platform_device *pdev) if (acpi_disabled) mbox_free_channel(ctx->mbox_chan); else - pcc_mbox_free_channel(ctx->mbox_chan); + pcc_mbox_free_channel(ctx->pcc_chan); return 0; } diff --git a/drivers/i2c/busses/i2c-xgene-slimpro.c b/drivers/i2c/busses/i2c-xgene-slimpro.c index bba08cbce6e1..1a19ebad60ad 100644 --- a/drivers/i2c/busses/i2c-xgene-slimpro.c +++ b/drivers/i2c/busses/i2c-xgene-slimpro.c @@ -103,6 +103,7 @@ struct slimpro_i2c_dev { struct i2c_adapter adapter; struct device *dev; struct mbox_chan *mbox_chan; + struct pcc_mbox_chan *pcc_chan; struct mbox_client mbox_client; int mbox_idx; struct completion rd_complete; @@ -466,7 +467,7 @@ static int xgene_slimpro_i2c_probe(struct platform_device *pdev) return PTR_ERR(ctx->mbox_chan); } } else { - struct acpi_pcct_hw_reduced *cppc_ss; + struct pcc_mbox_chan *pcc_chan; const struct acpi_device_id *acpi_id; int version = XGENE_SLIMPRO_I2C_V1; @@ -483,24 +484,14 @@ static int xgene_slimpro_i2c_probe(struct platform_device *pdev) cl->tx_block = false; cl->rx_callback = slimpro_i2c_pcc_rx_cb; - ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx); - if (IS_ERR(ctx->mbox_chan)) { + pcc_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx); + if (IS_ERR(pcc_chan)) { dev_err(&pdev->dev, "PCC mailbox channel request failed\n"); - return PTR_ERR(ctx->mbox_chan); + return PTR_ERR(ctx->pcc_chan); } - /* - * The PCC mailbox controller driver should - * have parsed the PCCT (global table of all - * PCC channels) and stored pointers to the - * subspace communication region in con_priv. - */ - cppc_ss = ctx->mbox_chan->con_priv; - if (!cppc_ss) { - dev_err(&pdev->dev, "PPC subspace not found\n"); - rc = -ENOENT; - goto mbox_err; - } + ctx->pcc_chan = pcc_chan; + ctx->mbox_chan = pcc_chan->mchan; if (!ctx->mbox_chan->mbox->txdone_irq) { dev_err(&pdev->dev, "PCC IRQ not supported\n"); @@ -512,17 +503,17 @@ static int xgene_slimpro_i2c_probe(struct platform_device *pdev) * This is the shared communication region * for the OS and Platform to communicate over. */ - ctx->comm_base_addr = cppc_ss->base_address; + ctx->comm_base_addr = pcc_chan->shmem_base_addr; if (ctx->comm_base_addr) { if (version == XGENE_SLIMPRO_I2C_V2) ctx->pcc_comm_addr = memremap( ctx->comm_base_addr, - cppc_ss->length, + pcc_chan->shmem_size, MEMREMAP_WT); else ctx->pcc_comm_addr = memremap( ctx->comm_base_addr, - cppc_ss->length, + pcc_chan->shmem_size, MEMREMAP_WB); } else { dev_err(&pdev->dev, "Failed to get PCC comm region\n"); @@ -561,7 +552,7 @@ mbox_err: if (acpi_disabled) mbox_free_channel(ctx->mbox_chan); else - pcc_mbox_free_channel(ctx->mbox_chan); + pcc_mbox_free_channel(ctx->pcc_chan); return rc; } @@ -575,7 +566,7 @@ static int xgene_slimpro_i2c_remove(struct platform_device *pdev) if (acpi_disabled) mbox_free_channel(ctx->mbox_chan); else - pcc_mbox_free_channel(ctx->mbox_chan); + pcc_mbox_free_channel(ctx->pcc_chan); return 0; } diff --git a/drivers/mailbox/pcc.c b/drivers/mailbox/pcc.c index f358ced827f2..453a58fda3a4 100644 --- a/drivers/mailbox/pcc.c +++ b/drivers/mailbox/pcc.c @@ -79,24 +79,9 @@ struct pcc_chan_info { int db_irq; }; +#define to_pcc_chan_info(c) container_of(c, struct pcc_chan_info, chan) static struct pcc_chan_info *chan_info; - static struct mbox_controller pcc_mbox_ctrl = {}; -/** - * get_pcc_channel - Given a PCC subspace idx, get - * the respective mbox_channel. - * @id: PCC subspace index. - * - * Return: ERR_PTR(errno) if error, else pointer - * to mbox channel. - */ -static struct mbox_chan *get_pcc_channel(int id) -{ - if (id < 0 || id >= pcc_mbox_ctrl.num_chans) - return ERR_PTR(-ENOENT); - - return &pcc_mbox_channels[id]; -} /* * PCC can be used with perf critical drivers such as CPPC @@ -239,31 +224,25 @@ static irqreturn_t pcc_mbox_irq(int irq, void *p) * ACPI package. This is used to lookup the array of PCC * subspaces as parsed by the PCC Mailbox controller. * - * Return: Pointer to the Mailbox Channel if successful or - * ERR_PTR. + * Return: Pointer to the PCC Mailbox Channel if successful or ERR_PTR. */ -struct mbox_chan *pcc_mbox_request_channel(struct mbox_client *cl, - int subspace_id) +struct pcc_mbox_chan * +pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id) { struct pcc_chan_info *pchan; struct device *dev = pcc_mbox_ctrl.dev; struct mbox_chan *chan; unsigned long flags; - /* - * Each PCC Subspace is a Mailbox Channel. - * The PCC Clients get their PCC Subspace ID - * from their own tables and pass it here. - * This returns a pointer to the PCC subspace - * for the Client to operate on. - */ - chan = get_pcc_channel(subspace_id); + if (subspace_id < 0 || subspace_id >= pcc_mbox_ctrl.num_chans) + return ERR_PTR(-ENOENT); + pchan = chan_info + subspace_id; + chan = pchan->chan.mchan; if (IS_ERR(chan) || chan->cl) { dev_err(dev, "Channel not found for idx: %d\n", subspace_id); return ERR_PTR(-EBUSY); } - pchan = chan_info + subspace_id; spin_lock_irqsave(&chan->lock, flags); chan->msg_free = 0; @@ -285,38 +264,32 @@ struct mbox_chan *pcc_mbox_request_channel(struct mbox_client *cl, if (unlikely(rc)) { dev_err(dev, "failed to register PCC interrupt %d\n", pchan->db_irq); - pcc_mbox_free_channel(chan); - chan = ERR_PTR(rc); + pcc_mbox_free_channel(&pchan->chan); + return ERR_PTR(rc); } } - return chan; + return &pchan->chan; } EXPORT_SYMBOL_GPL(pcc_mbox_request_channel); /** * pcc_mbox_free_channel - Clients call this to free their Channel. * - * @chan: Pointer to the mailbox channel as returned by - * pcc_mbox_request_channel() + * @pchan: Pointer to the PCC mailbox channel as returned by + * pcc_mbox_request_channel() */ -void pcc_mbox_free_channel(struct mbox_chan *chan) +void pcc_mbox_free_channel(struct pcc_mbox_chan *pchan) { - u32 id = chan - pcc_mbox_channels; - struct pcc_chan_info *pchan; + struct pcc_chan_info *pchan_info = to_pcc_chan_info(pchan); + struct mbox_chan *chan = pchan->mchan; unsigned long flags; if (!chan || !chan->cl) return; - if (id >= pcc_mbox_ctrl.num_chans) { - pr_debug("pcc_mbox_free_channel: Invalid mbox_chan passed\n"); - return; - } - - pchan = chan_info + id; - if (pchan->db_irq > 0) - devm_free_irq(chan->mbox->dev, pchan->db_irq, chan); + if (pchan_info->db_irq > 0) + devm_free_irq(chan->mbox->dev, pchan_info->db_irq, chan); spin_lock_irqsave(&chan->lock, flags); chan->cl = NULL; diff --git a/include/acpi/pcc.h b/include/acpi/pcc.h index 5e510a6b8052..73e806fe7ce7 100644 --- a/include/acpi/pcc.h +++ b/include/acpi/pcc.h @@ -20,16 +20,16 @@ struct pcc_mbox_chan { #define MAX_PCC_SUBSPACES 256 #ifdef CONFIG_PCC -extern struct mbox_chan *pcc_mbox_request_channel(struct mbox_client *cl, - int subspace_id); -extern void pcc_mbox_free_channel(struct mbox_chan *chan); +extern struct pcc_mbox_chan * +pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id); +extern void pcc_mbox_free_channel(struct pcc_mbox_chan *chan); #else -static inline struct mbox_chan *pcc_mbox_request_channel(struct mbox_client *cl, - int subspace_id) +static inline struct pcc_mbox_chan * +pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id) { return ERR_PTR(-ENODEV); } -static inline void pcc_mbox_free_channel(struct mbox_chan *chan) { } +static inline void pcc_mbox_free_channel(struct pcc_mbox_chan *chan) { } #endif #endif /* _PCC_H */ -- cgit v1.2.3 From 97961f78e8bc7f50ff7113fec030af6fa5f004d0 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Fri, 22 Oct 2021 18:18:56 +0800 Subject: mailbox: imx: support i.MX8ULP S4 MU Like i.MX8 SCU, i.MX8ULP S4 also has vendor specific protocol. - bind SCU/S4 MU part to share one tx/rx/init API to make code simple. - S4 msg max size is very large, so alloc the space at driver probe, not use local on stack variable. - S4 MU has 8 TR and 4 RR which is different with i.MX8 MU, so adapt code to reflect this. Tested on i.MX8MP, i.MX8ULP Signed-off-by: Peng Fan Signed-off-by: Jassi Brar --- drivers/mailbox/imx-mailbox.c | 124 ++++++++++++++++++++++++++++------------ include/linux/firmware/imx/s4.h | 20 +++++++ 2 files changed, 107 insertions(+), 37 deletions(-) create mode 100644 include/linux/firmware/imx/s4.h (limited to 'include') diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c index 0ce75c6b36b6..ffe36a6bef9e 100644 --- a/drivers/mailbox/imx-mailbox.c +++ b/drivers/mailbox/imx-mailbox.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -18,6 +19,8 @@ #define IMX_MU_CHANS 16 /* TX0/RX0/RXDB[0-3] */ #define IMX_MU_SCU_CHANS 6 +/* TX0/RX0 */ +#define IMX_MU_S4_CHANS 2 #define IMX_MU_CHAN_NAME_SIZE 20 enum imx_mu_chan_type { @@ -47,6 +50,11 @@ struct imx_sc_rpc_msg_max { u32 data[7]; }; +struct imx_s4_rpc_msg_max { + struct imx_s4_rpc_msg hdr; + u32 data[254]; +}; + struct imx_mu_con_priv { unsigned int idx; char irq_desc[IMX_MU_CHAN_NAME_SIZE]; @@ -58,6 +66,7 @@ struct imx_mu_con_priv { struct imx_mu_priv { struct device *dev; void __iomem *base; + void *msg; spinlock_t xcr_lock; /* control register lock */ struct mbox_controller mbox; @@ -75,7 +84,8 @@ struct imx_mu_priv { enum imx_mu_type { IMX_MU_V1, - IMX_MU_V2, + IMX_MU_V2 = BIT(1), + IMX_MU_V2_S4 = BIT(15), }; struct imx_mu_dcfg { @@ -89,18 +99,18 @@ struct imx_mu_dcfg { u32 xCR[4]; /* Control Registers */ }; -#define IMX_MU_xSR_GIPn(type, x) (type == IMX_MU_V2 ? BIT(x) : BIT(28 + (3 - (x)))) -#define IMX_MU_xSR_RFn(type, x) (type == IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x)))) -#define IMX_MU_xSR_TEn(type, x) (type == IMX_MU_V2 ? BIT(x) : BIT(20 + (3 - (x)))) +#define IMX_MU_xSR_GIPn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(28 + (3 - (x)))) +#define IMX_MU_xSR_RFn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x)))) +#define IMX_MU_xSR_TEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(20 + (3 - (x)))) /* General Purpose Interrupt Enable */ -#define IMX_MU_xCR_GIEn(type, x) (type == IMX_MU_V2 ? BIT(x) : BIT(28 + (3 - (x)))) +#define IMX_MU_xCR_GIEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(28 + (3 - (x)))) /* Receive Interrupt Enable */ -#define IMX_MU_xCR_RIEn(type, x) (type == IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x)))) +#define IMX_MU_xCR_RIEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x)))) /* Transmit Interrupt Enable */ -#define IMX_MU_xCR_TIEn(type, x) (type == IMX_MU_V2 ? BIT(x) : BIT(20 + (3 - (x)))) +#define IMX_MU_xCR_TIEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(20 + (3 - (x)))) /* General Purpose Interrupt Request */ -#define IMX_MU_xCR_GIRn(type, x) (type == IMX_MU_V2 ? BIT(x) : BIT(16 + (3 - (x)))) +#define IMX_MU_xCR_GIRn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(16 + (3 - (x)))) static struct imx_mu_priv *to_imx_mu_priv(struct mbox_controller *mbox) @@ -167,14 +177,22 @@ static int imx_mu_generic_rx(struct imx_mu_priv *priv, return 0; } -static int imx_mu_scu_tx(struct imx_mu_priv *priv, - struct imx_mu_con_priv *cp, - void *data) +static int imx_mu_specific_tx(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp, void *data) { - struct imx_sc_rpc_msg_max *msg = data; u32 *arg = data; int i, ret; u32 xsr; + u32 size, max_size, num_tr; + + if (priv->dcfg->type & IMX_MU_V2_S4) { + size = ((struct imx_s4_rpc_msg_max *)data)->hdr.size; + max_size = sizeof(struct imx_s4_rpc_msg_max); + num_tr = 8; + } else { + size = ((struct imx_sc_rpc_msg_max *)data)->hdr.size; + max_size = sizeof(struct imx_sc_rpc_msg_max); + num_tr = 4; + } switch (cp->type) { case IMX_MU_TYPE_TX: @@ -183,27 +201,27 @@ static int imx_mu_scu_tx(struct imx_mu_priv *priv, * sizeof yields bytes. */ - if (msg->hdr.size > sizeof(*msg) / 4) { + if (size > max_size / 4) { /* * The real message size can be different to - * struct imx_sc_rpc_msg_max size + * struct imx_sc_rpc_msg_max/imx_s4_rpc_msg_max size */ - dev_err(priv->dev, "Maximal message size (%zu bytes) exceeded on TX; got: %i bytes\n", sizeof(*msg), msg->hdr.size << 2); + dev_err(priv->dev, "Maximal message size (%u bytes) exceeded on TX; got: %i bytes\n", max_size, size << 2); return -EINVAL; } - for (i = 0; i < 4 && i < msg->hdr.size; i++) - imx_mu_write(priv, *arg++, priv->dcfg->xTR + (i % 4) * 4); - for (; i < msg->hdr.size; i++) { + for (i = 0; i < num_tr && i < size; i++) + imx_mu_write(priv, *arg++, priv->dcfg->xTR + (i % num_tr) * 4); + for (; i < size; i++) { ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_TSR], xsr, - xsr & IMX_MU_xSR_TEn(priv->dcfg->type, i % 4), + xsr & IMX_MU_xSR_TEn(priv->dcfg->type, i % num_tr), 0, 100); if (ret) { dev_err(priv->dev, "Send data index: %d timeout\n", i); return ret; } - imx_mu_write(priv, *arg++, priv->dcfg->xTR + (i % 4) * 4); + imx_mu_write(priv, *arg++, priv->dcfg->xTR + (i % num_tr) * 4); } imx_mu_xcr_rmw(priv, IMX_MU_TCR, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx), 0); @@ -216,23 +234,32 @@ static int imx_mu_scu_tx(struct imx_mu_priv *priv, return 0; } -static int imx_mu_scu_rx(struct imx_mu_priv *priv, - struct imx_mu_con_priv *cp) +static int imx_mu_specific_rx(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp) { - struct imx_sc_rpc_msg_max msg; - u32 *data = (u32 *)&msg; + u32 *data; int i, ret; u32 xsr; + u32 size, max_size; + + data = (u32 *)priv->msg; imx_mu_xcr_rmw(priv, IMX_MU_RCR, 0, IMX_MU_xCR_RIEn(priv->dcfg->type, 0)); *data++ = imx_mu_read(priv, priv->dcfg->xRR); - if (msg.hdr.size > sizeof(msg) / 4) { - dev_err(priv->dev, "Maximal message size (%zu bytes) exceeded on RX; got: %i bytes\n", sizeof(msg), msg.hdr.size << 2); + if (priv->dcfg->type & IMX_MU_V2_S4) { + size = ((struct imx_s4_rpc_msg_max *)priv->msg)->hdr.size; + max_size = sizeof(struct imx_s4_rpc_msg_max); + } else { + size = ((struct imx_sc_rpc_msg_max *)priv->msg)->hdr.size; + max_size = sizeof(struct imx_sc_rpc_msg_max); + } + + if (size > max_size / 4) { + dev_err(priv->dev, "Maximal message size (%u bytes) exceeded on RX; got: %i bytes\n", max_size, size << 2); return -EINVAL; } - for (i = 1; i < msg.hdr.size; i++) { + for (i = 1; i < size; i++) { ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_RSR], xsr, xsr & IMX_MU_xSR_RFn(priv->dcfg->type, i % 4), 0, 100); if (ret) { @@ -243,7 +270,7 @@ static int imx_mu_scu_rx(struct imx_mu_priv *priv, } imx_mu_xcr_rmw(priv, IMX_MU_RCR, IMX_MU_xCR_RIEn(priv->dcfg->type, 0), 0); - mbox_chan_received_data(cp->chan, (void *)&msg); + mbox_chan_received_data(cp->chan, (void *)priv->msg); return 0; } @@ -394,8 +421,8 @@ static const struct mbox_chan_ops imx_mu_ops = { .shutdown = imx_mu_shutdown, }; -static struct mbox_chan *imx_mu_scu_xlate(struct mbox_controller *mbox, - const struct of_phandle_args *sp) +static struct mbox_chan *imx_mu_specific_xlate(struct mbox_controller *mbox, + const struct of_phandle_args *sp) { u32 type, idx, chan; @@ -478,11 +505,12 @@ static void imx_mu_init_generic(struct imx_mu_priv *priv) imx_mu_write(priv, 0, priv->dcfg->xCR[i]); } -static void imx_mu_init_scu(struct imx_mu_priv *priv) +static void imx_mu_init_specific(struct imx_mu_priv *priv) { unsigned int i; + int num_chans = priv->dcfg->type & IMX_MU_V2_S4 ? IMX_MU_S4_CHANS : IMX_MU_SCU_CHANS; - for (i = 0; i < IMX_MU_SCU_CHANS; i++) { + for (i = 0; i < num_chans; i++) { struct imx_mu_con_priv *cp = &priv->con_priv[i]; cp->idx = i < 2 ? 0 : i - 2; @@ -493,8 +521,8 @@ static void imx_mu_init_scu(struct imx_mu_priv *priv) "imx_mu_chan[%i-%i]", cp->type, cp->idx); } - priv->mbox.num_chans = IMX_MU_SCU_CHANS; - priv->mbox.of_xlate = imx_mu_scu_xlate; + priv->mbox.num_chans = num_chans; + priv->mbox.of_xlate = imx_mu_specific_xlate; /* Set default MU configuration */ for (i = 0; i < IMX_MU_xCR_MAX; i++) @@ -508,6 +536,7 @@ static int imx_mu_probe(struct platform_device *pdev) struct imx_mu_priv *priv; const struct imx_mu_dcfg *dcfg; int ret; + u32 size; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -528,6 +557,15 @@ static int imx_mu_probe(struct platform_device *pdev) return -EINVAL; priv->dcfg = dcfg; + if (priv->dcfg->type & IMX_MU_V2_S4) + size = sizeof(struct imx_s4_rpc_msg_max); + else + size = sizeof(struct imx_sc_rpc_msg_max); + + priv->msg = devm_kzalloc(dev, size, GFP_KERNEL); + if (IS_ERR(priv->msg)) + return PTR_ERR(priv->msg); + priv->clk = devm_clk_get(dev, NULL); if (IS_ERR(priv->clk)) { if (PTR_ERR(priv->clk) != -ENOENT) @@ -623,10 +661,21 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp = { .xCR = {0x110, 0x114, 0x120, 0x128}, }; +static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp_s4 = { + .tx = imx_mu_specific_tx, + .rx = imx_mu_specific_rx, + .init = imx_mu_init_specific, + .type = IMX_MU_V2 | IMX_MU_V2_S4, + .xTR = 0x200, + .xRR = 0x280, + .xSR = {0xC, 0x118, 0x124, 0x12C}, + .xCR = {0x110, 0x114, 0x120, 0x128}, +}; + static const struct imx_mu_dcfg imx_mu_cfg_imx8_scu = { - .tx = imx_mu_scu_tx, - .rx = imx_mu_scu_rx, - .init = imx_mu_init_scu, + .tx = imx_mu_specific_tx, + .rx = imx_mu_specific_rx, + .init = imx_mu_init_specific, .xTR = 0x0, .xRR = 0x10, .xSR = {0x20, 0x20, 0x20, 0x20}, @@ -637,6 +686,7 @@ static const struct of_device_id imx_mu_dt_ids[] = { { .compatible = "fsl,imx7ulp-mu", .data = &imx_mu_cfg_imx7ulp }, { .compatible = "fsl,imx6sx-mu", .data = &imx_mu_cfg_imx6sx }, { .compatible = "fsl,imx8ulp-mu", .data = &imx_mu_cfg_imx8ulp }, + { .compatible = "fsl,imx8ulp-mu-s4", .data = &imx_mu_cfg_imx8ulp_s4 }, { .compatible = "fsl,imx8-mu-scu", .data = &imx_mu_cfg_imx8_scu }, { }, }; diff --git a/include/linux/firmware/imx/s4.h b/include/linux/firmware/imx/s4.h new file mode 100644 index 000000000000..9e34923ae1d6 --- /dev/null +++ b/include/linux/firmware/imx/s4.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2021 NXP + * + * Header file for the IPC implementation. + */ + +#ifndef _S4_IPC_H +#define _S4_IPC_H + +struct imx_s4_ipc; + +struct imx_s4_rpc_msg { + uint8_t ver; + uint8_t size; + uint8_t cmd; + uint8_t tag; +} __packed; + +#endif /* _S4_IPC_H */ -- cgit v1.2.3