From e2fccf5c15157218f0b6488168f98183f82c1eda Mon Sep 17 00:00:00 2001 From: Markus Pargmann Date: Mon, 14 Dec 2015 14:53:50 +0100 Subject: mfd: fsl-imx25-tsadc: Register touchscreen ADC driver This is the core driver for imx25 touchscreen/adc driver. The module has one shared ADC and two different conversion queues which use the ADC. The two queues are identical. Both can be used for general purpose ADC but one is meant to be used for touchscreens. This driver is the core which manages the central components and registers of the TSC/ADC unit. It manages the IRQs and forwards them to the correct components. Signed-off-by: Markus Pargmann Signed-off-by: Denis Carikli [ensure correct ADC clock depending on the IPG clock] Signed-off-by: Juergen Borleis Acked-by: Jonathan Cameron Signed-off-by: Lee Jones --- include/linux/mfd/imx25-tsadc.h | 140 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 140 insertions(+) create mode 100644 include/linux/mfd/imx25-tsadc.h (limited to 'include/linux') diff --git a/include/linux/mfd/imx25-tsadc.h b/include/linux/mfd/imx25-tsadc.h new file mode 100644 index 000000000000..7fe4b8c3baac --- /dev/null +++ b/include/linux/mfd/imx25-tsadc.h @@ -0,0 +1,140 @@ +#ifndef _LINUX_INCLUDE_MFD_IMX25_TSADC_H_ +#define _LINUX_INCLUDE_MFD_IMX25_TSADC_H_ + +struct regmap; +struct clk; + +struct mx25_tsadc { + struct regmap *regs; + struct irq_domain *domain; + struct clk *clk; +}; + +#define MX25_TSC_TGCR 0x00 +#define MX25_TSC_TGSR 0x04 +#define MX25_TSC_TICR 0x08 + +/* The same register layout for TC and GC queue */ +#define MX25_ADCQ_FIFO 0x00 +#define MX25_ADCQ_CR 0x04 +#define MX25_ADCQ_SR 0x08 +#define MX25_ADCQ_MR 0x0c +#define MX25_ADCQ_ITEM_7_0 0x20 +#define MX25_ADCQ_ITEM_15_8 0x24 +#define MX25_ADCQ_CFG(n) (0x40 + ((n) * 0x4)) + +#define MX25_ADCQ_MR_MASK 0xffffffff + +/* TGCR */ +#define MX25_TGCR_PDBTIME(x) ((x) << 25) +#define MX25_TGCR_PDBTIME_MASK GENMASK(31, 25) +#define MX25_TGCR_PDBEN BIT(24) +#define MX25_TGCR_PDEN BIT(23) +#define MX25_TGCR_ADCCLKCFG(x) ((x) << 16) +#define MX25_TGCR_GET_ADCCLK(x) (((x) >> 16) & 0x1f) +#define MX25_TGCR_INTREFEN BIT(10) +#define MX25_TGCR_POWERMODE_MASK GENMASK(9, 8) +#define MX25_TGCR_POWERMODE_SAVE (1 << 8) +#define MX25_TGCR_POWERMODE_ON (2 << 8) +#define MX25_TGCR_STLC BIT(5) +#define MX25_TGCR_SLPC BIT(4) +#define MX25_TGCR_FUNC_RST BIT(2) +#define MX25_TGCR_TSC_RST BIT(1) +#define MX25_TGCR_CLK_EN BIT(0) + +/* TGSR */ +#define MX25_TGSR_SLP_INT BIT(2) +#define MX25_TGSR_GCQ_INT BIT(1) +#define MX25_TGSR_TCQ_INT BIT(0) + +/* ADCQ_ITEM_* */ +#define _MX25_ADCQ_ITEM(item, x) ((x) << ((item) * 4)) +#define MX25_ADCQ_ITEM(item, x) ((item) >= 8 ? \ + _MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x))) + +/* ADCQ_FIFO (TCQFIFO and GCQFIFO) */ +#define MX25_ADCQ_FIFO_DATA(x) (((x) >> 4) & 0xfff) +#define MX25_ADCQ_FIFO_ID(x) ((x) & 0xf) + +/* ADCQ_CR (TCQR and GCQR) */ +#define MX25_ADCQ_CR_PDCFG_LEVEL BIT(19) +#define MX25_ADCQ_CR_PDMSK BIT(18) +#define MX25_ADCQ_CR_FRST BIT(17) +#define MX25_ADCQ_CR_QRST BIT(16) +#define MX25_ADCQ_CR_RWAIT_MASK GENMASK(15, 12) +#define MX25_ADCQ_CR_RWAIT(x) ((x) << 12) +#define MX25_ADCQ_CR_WMRK_MASK GENMASK(11, 8) +#define MX25_ADCQ_CR_WMRK(x) ((x) << 8) +#define MX25_ADCQ_CR_LITEMID_MASK (0xf << 4) +#define MX25_ADCQ_CR_LITEMID(x) ((x) << 4) +#define MX25_ADCQ_CR_RPT BIT(3) +#define MX25_ADCQ_CR_FQS BIT(2) +#define MX25_ADCQ_CR_QSM_MASK GENMASK(1, 0) +#define MX25_ADCQ_CR_QSM_PD 0x1 +#define MX25_ADCQ_CR_QSM_FQS 0x2 +#define MX25_ADCQ_CR_QSM_FQS_PD 0x3 + +/* ADCQ_SR (TCQSR and GCQSR) */ +#define MX25_ADCQ_SR_FDRY BIT(15) +#define MX25_ADCQ_SR_FULL BIT(14) +#define MX25_ADCQ_SR_EMPT BIT(13) +#define MX25_ADCQ_SR_FDN(x) (((x) >> 8) & 0x1f) +#define MX25_ADCQ_SR_FRR BIT(6) +#define MX25_ADCQ_SR_FUR BIT(5) +#define MX25_ADCQ_SR_FOR BIT(4) +#define MX25_ADCQ_SR_EOQ BIT(1) +#define MX25_ADCQ_SR_PD BIT(0) + +/* ADCQ_MR (TCQMR and GCQMR) */ +#define MX25_ADCQ_MR_FDRY_DMA BIT(31) +#define MX25_ADCQ_MR_FER_DMA BIT(22) +#define MX25_ADCQ_MR_FUR_DMA BIT(21) +#define MX25_ADCQ_MR_FOR_DMA BIT(20) +#define MX25_ADCQ_MR_EOQ_DMA BIT(17) +#define MX25_ADCQ_MR_PD_DMA BIT(16) +#define MX25_ADCQ_MR_FDRY_IRQ BIT(15) +#define MX25_ADCQ_MR_FER_IRQ BIT(6) +#define MX25_ADCQ_MR_FUR_IRQ BIT(5) +#define MX25_ADCQ_MR_FOR_IRQ BIT(4) +#define MX25_ADCQ_MR_EOQ_IRQ BIT(1) +#define MX25_ADCQ_MR_PD_IRQ BIT(0) + +/* ADCQ_CFG (TICR, TCC0-7,GCC0-7) */ +#define MX25_ADCQ_CFG_SETTLING_TIME(x) ((x) << 24) +#define MX25_ADCQ_CFG_IGS (1 << 20) +#define MX25_ADCQ_CFG_NOS_MASK GENMASK(19, 16) +#define MX25_ADCQ_CFG_NOS(x) (((x) - 1) << 16) +#define MX25_ADCQ_CFG_WIPER (1 << 15) +#define MX25_ADCQ_CFG_YNLR (1 << 14) +#define MX25_ADCQ_CFG_YPLL_HIGH (0 << 12) +#define MX25_ADCQ_CFG_YPLL_OFF (1 << 12) +#define MX25_ADCQ_CFG_YPLL_LOW (3 << 12) +#define MX25_ADCQ_CFG_XNUR_HIGH (0 << 10) +#define MX25_ADCQ_CFG_XNUR_OFF (1 << 10) +#define MX25_ADCQ_CFG_XNUR_LOW (3 << 10) +#define MX25_ADCQ_CFG_XPUL_HIGH (0 << 9) +#define MX25_ADCQ_CFG_XPUL_OFF (1 << 9) +#define MX25_ADCQ_CFG_REFP(sel) ((sel) << 7) +#define MX25_ADCQ_CFG_REFP_YP MX25_ADCQ_CFG_REFP(0) +#define MX25_ADCQ_CFG_REFP_XP MX25_ADCQ_CFG_REFP(1) +#define MX25_ADCQ_CFG_REFP_EXT MX25_ADCQ_CFG_REFP(2) +#define MX25_ADCQ_CFG_REFP_INT MX25_ADCQ_CFG_REFP(3) +#define MX25_ADCQ_CFG_REFP_MASK GENMASK(8, 7) +#define MX25_ADCQ_CFG_IN(sel) ((sel) << 4) +#define MX25_ADCQ_CFG_IN_XP MX25_ADCQ_CFG_IN(0) +#define MX25_ADCQ_CFG_IN_YP MX25_ADCQ_CFG_IN(1) +#define MX25_ADCQ_CFG_IN_XN MX25_ADCQ_CFG_IN(2) +#define MX25_ADCQ_CFG_IN_YN MX25_ADCQ_CFG_IN(3) +#define MX25_ADCQ_CFG_IN_WIPER MX25_ADCQ_CFG_IN(4) +#define MX25_ADCQ_CFG_IN_AUX0 MX25_ADCQ_CFG_IN(5) +#define MX25_ADCQ_CFG_IN_AUX1 MX25_ADCQ_CFG_IN(6) +#define MX25_ADCQ_CFG_IN_AUX2 MX25_ADCQ_CFG_IN(7) +#define MX25_ADCQ_CFG_REFN(sel) ((sel) << 2) +#define MX25_ADCQ_CFG_REFN_XN MX25_ADCQ_CFG_REFN(0) +#define MX25_ADCQ_CFG_REFN_YN MX25_ADCQ_CFG_REFN(1) +#define MX25_ADCQ_CFG_REFN_NGND MX25_ADCQ_CFG_REFN(2) +#define MX25_ADCQ_CFG_REFN_NGND2 MX25_ADCQ_CFG_REFN(3) +#define MX25_ADCQ_CFG_REFN_MASK GENMASK(3, 2) +#define MX25_ADCQ_CFG_PENIACK (1 << 1) + +#endif /* _LINUX_INCLUDE_MFD_IMX25_TSADC_H_ */ -- cgit v1.2.3 From 4fd411514291ae75053003e33a6a4a56f97467d0 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 12 Feb 2016 10:02:42 +0800 Subject: mfd: axp20x: Split the driver into core and i2c bits The axp20x driver assumes the device is i2c based. This is not the case with later chips, which use a proprietary 2 wire serial bus by Allwinner called "Reduced Serial Bus". This patch follows the example of mfd/wm831x and splits it into an interface independent core, and an i2c specific glue layer. MFD_AXP20X and the new MFD_AXP20X_I2C are changed to tristate symbols, allowing the driver to be built as modules. Whitespace and other style errors in the moved i2c specific code have been fixed. Included but unused header files are removed as well. Signed-off-by: Chen-Yu Tsai Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 14 +++--- drivers/mfd/Makefile | 1 + drivers/mfd/axp20x-i2c.c | 104 +++++++++++++++++++++++++++++++++++++++++++++ drivers/mfd/axp20x.c | 90 +++++++-------------------------------- include/linux/mfd/axp20x.h | 33 +++++++++++++- 5 files changed, 161 insertions(+), 81 deletions(-) create mode 100644 drivers/mfd/axp20x-i2c.c (limited to 'include/linux') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 9ca66de0c1c1..0037b9c933d9 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -91,14 +91,18 @@ config MFD_BCM590XX Support for the BCM590xx PMUs from Broadcom config MFD_AXP20X - bool "X-Powers AXP20X" + tristate select MFD_CORE - select REGMAP_I2C select REGMAP_IRQ - depends on I2C=y + +config MFD_AXP20X_I2C + tristate "X-Powers AXP series PMICs with I2C" + select MFD_AXP20X + select REGMAP_I2C + depends on I2C help - If you say Y here you get support for the X-Powers AXP202, AXP209 and - AXP288 power management IC (PMIC). + If you say Y here you get support for the X-Powers AXP series power + management ICs (PMICs) controlled with I2C. This driver include only the core APIs. You have to select individual components like regulators or the PEK (Power Enable Key) under the corresponding menus. diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 0f230a6103f8..dba4f99d9044 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -111,6 +111,7 @@ obj-$(CONFIG_PMIC_DA9052) += da9052-core.o obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o obj-$(CONFIG_MFD_AXP20X) += axp20x.o +obj-$(CONFIG_MFD_AXP20X_I2C) += axp20x-i2c.o obj-$(CONFIG_MFD_LP3943) += lp3943.o obj-$(CONFIG_MFD_LP8788) += lp8788.o lp8788-irq.o diff --git a/drivers/mfd/axp20x-i2c.c b/drivers/mfd/axp20x-i2c.c new file mode 100644 index 000000000000..b1b865822c07 --- /dev/null +++ b/drivers/mfd/axp20x-i2c.c @@ -0,0 +1,104 @@ +/* + * I2C driver for the X-Powers' Power Management ICs + * + * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC + * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature + * as well as configurable GPIOs. + * + * This driver supports the I2C variants. + * + * Copyright (C) 2014 Carlo Caione + * + * Author: Carlo Caione + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static int axp20x_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct axp20x_dev *axp20x; + int ret; + + axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL); + if (!axp20x) + return -ENOMEM; + + axp20x->dev = &i2c->dev; + axp20x->irq = i2c->irq; + dev_set_drvdata(axp20x->dev, axp20x); + + ret = axp20x_match_device(axp20x); + if (ret) + return ret; + + axp20x->regmap = devm_regmap_init_i2c(i2c, axp20x->regmap_cfg); + if (IS_ERR(axp20x->regmap)) { + ret = PTR_ERR(axp20x->regmap); + dev_err(&i2c->dev, "regmap init failed: %d\n", ret); + return ret; + } + + return axp20x_device_probe(axp20x); +} + +static int axp20x_i2c_remove(struct i2c_client *i2c) +{ + struct axp20x_dev *axp20x = i2c_get_clientdata(i2c); + + return axp20x_device_remove(axp20x); +} + +static const struct of_device_id axp20x_i2c_of_match[] = { + { .compatible = "x-powers,axp152", .data = (void *)AXP152_ID }, + { .compatible = "x-powers,axp202", .data = (void *)AXP202_ID }, + { .compatible = "x-powers,axp209", .data = (void *)AXP209_ID }, + { .compatible = "x-powers,axp221", .data = (void *)AXP221_ID }, + { }, +}; +MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match); + +/* + * This is useless for OF-enabled devices, but it is needed by I2C subsystem + */ +static const struct i2c_device_id axp20x_i2c_id[] = { + { }, +}; +MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id); + +static const struct acpi_device_id axp20x_i2c_acpi_match[] = { + { + .id = "INT33F4", + .driver_data = AXP288_ID, + }, + { }, +}; +MODULE_DEVICE_TABLE(acpi, axp20x_i2c_acpi_match); + +static struct i2c_driver axp20x_i2c_driver = { + .driver = { + .name = "axp20x-i2c", + .of_match_table = of_match_ptr(axp20x_i2c_of_match), + .acpi_match_table = ACPI_PTR(axp20x_i2c_acpi_match), + }, + .probe = axp20x_i2c_probe, + .remove = axp20x_i2c_remove, + .id_table = axp20x_i2c_id, +}; + +module_i2c_driver(axp20x_i2c_driver); + +MODULE_DESCRIPTION("PMIC MFD I2C driver for AXP20X"); +MODULE_AUTHOR("Carlo Caione "); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index cec51e689d1d..8e569bcfe3bc 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -1,10 +1,12 @@ /* - * axp20x.c - MFD core driver for the X-Powers' Power Management ICs + * MFD core driver for the X-Powers' Power Management ICs * * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature * as well as configurable GPIOs. * + * This file contains the interface independent core functions. + * * Copyright (C) 2014 Carlo Caione * * Author: Carlo Caione @@ -15,18 +17,15 @@ */ #include -#include #include #include #include #include #include -#include #include #include #include #include -#include #include #define AXP20X_OFF 0x80 @@ -378,32 +377,6 @@ static const struct regmap_irq axp288_regmap_irqs[] = { INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), }; -static const struct of_device_id axp20x_of_match[] = { - { .compatible = "x-powers,axp152", .data = (void *) AXP152_ID }, - { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID }, - { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID }, - { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID }, - { }, -}; -MODULE_DEVICE_TABLE(of, axp20x_of_match); - -/* - * This is useless for OF-enabled devices, but it is needed by I2C subsystem - */ -static const struct i2c_device_id axp20x_i2c_id[] = { - { }, -}; -MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id); - -static const struct acpi_device_id axp20x_acpi_match[] = { - { - .id = "INT33F4", - .driver_data = AXP288_ID, - }, - { }, -}; -MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match); - static const struct regmap_irq_chip axp152_regmap_irq_chip = { .name = "axp152_irq_chip", .status_base = AXP152_IRQ1_STATE, @@ -608,7 +581,7 @@ static void axp20x_power_off(void) AXP20X_OFF); } -static int axp20x_match_device(struct axp20x_dev *axp20x) +int axp20x_match_device(struct axp20x_dev *axp20x) { struct device *dev = axp20x->dev; const struct acpi_device_id *acpi_id; @@ -665,38 +638,18 @@ static int axp20x_match_device(struct axp20x_dev *axp20x) return 0; } +EXPORT_SYMBOL(axp20x_match_device); -static int axp20x_i2c_probe(struct i2c_client *i2c, - const struct i2c_device_id *id) +int axp20x_device_probe(struct axp20x_dev *axp20x) { - struct axp20x_dev *axp20x; int ret; - axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL); - if (!axp20x) - return -ENOMEM; - - axp20x->i2c_client = i2c; - axp20x->dev = &i2c->dev; - dev_set_drvdata(axp20x->dev, axp20x); - - ret = axp20x_match_device(axp20x); - if (ret) - return ret; - - axp20x->regmap = devm_regmap_init_i2c(i2c, axp20x->regmap_cfg); - if (IS_ERR(axp20x->regmap)) { - ret = PTR_ERR(axp20x->regmap); - dev_err(&i2c->dev, "regmap init failed: %d\n", ret); - return ret; - } - - ret = regmap_add_irq_chip(axp20x->regmap, i2c->irq, + ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, IRQF_ONESHOT | IRQF_SHARED, -1, axp20x->regmap_irq_chip, &axp20x->regmap_irqc); if (ret) { - dev_err(&i2c->dev, "failed to add irq chip: %d\n", ret); + dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret); return ret; } @@ -704,8 +657,8 @@ static int axp20x_i2c_probe(struct i2c_client *i2c, axp20x->nr_cells, NULL, 0, NULL); if (ret) { - dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret); - regmap_del_irq_chip(i2c->irq, axp20x->regmap_irqc); + dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); + regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); return ret; } @@ -714,38 +667,25 @@ static int axp20x_i2c_probe(struct i2c_client *i2c, pm_power_off = axp20x_power_off; } - dev_info(&i2c->dev, "AXP20X driver loaded\n"); + dev_info(axp20x->dev, "AXP20X driver loaded\n"); return 0; } +EXPORT_SYMBOL(axp20x_device_probe); -static int axp20x_i2c_remove(struct i2c_client *i2c) +int axp20x_device_remove(struct axp20x_dev *axp20x) { - struct axp20x_dev *axp20x = i2c_get_clientdata(i2c); - if (axp20x == axp20x_pm_power_off) { axp20x_pm_power_off = NULL; pm_power_off = NULL; } mfd_remove_devices(axp20x->dev); - regmap_del_irq_chip(axp20x->i2c_client->irq, axp20x->regmap_irqc); + regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); return 0; } - -static struct i2c_driver axp20x_i2c_driver = { - .driver = { - .name = "axp20x", - .of_match_table = of_match_ptr(axp20x_of_match), - .acpi_match_table = ACPI_PTR(axp20x_acpi_match), - }, - .probe = axp20x_i2c_probe, - .remove = axp20x_i2c_remove, - .id_table = axp20x_i2c_id, -}; - -module_i2c_driver(axp20x_i2c_driver); +EXPORT_SYMBOL(axp20x_device_remove); MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); MODULE_AUTHOR("Carlo Caione "); diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h index b24c771cebd5..00697c6ad8b0 100644 --- a/include/linux/mfd/axp20x.h +++ b/include/linux/mfd/axp20x.h @@ -396,7 +396,7 @@ enum axp288_irqs { struct axp20x_dev { struct device *dev; - struct i2c_client *i2c_client; + int irq; struct regmap *regmap; struct regmap_irq_chip_data *regmap_irqc; long variant; @@ -462,4 +462,35 @@ static inline int axp20x_read_variable_width(struct regmap *regmap, return result; } +/** + * axp20x_match_device(): Setup axp20x variant related fields + * + * @axp20x: axp20x device to setup (.dev field must be set) + * @dev: device associated with this axp20x device + * + * This lets the axp20x core configure the mfd cells and register maps + * for later use. + */ +int axp20x_match_device(struct axp20x_dev *axp20x); + +/** + * axp20x_device_probe(): Probe a configured axp20x device + * + * @axp20x: axp20x device to probe (must be configured) + * + * This function lets the axp20x core register the axp20x mfd devices + * and irqchip. The axp20x device passed in must be fully configured + * with axp20x_match_device, its irq set, and regmap created. + */ +int axp20x_device_probe(struct axp20x_dev *axp20x); + +/** + * axp20x_device_probe(): Remove a axp20x device + * + * @axp20x: axp20x device to remove + * + * This tells the axp20x core to remove the associated mfd devices + */ +int axp20x_device_remove(struct axp20x_dev *axp20x); + #endif /* __LINUX_MFD_AXP20X_H */ -- cgit v1.2.3 From 02071f0f797c989b342f46fbdf472ddb1c2cdee9 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 12 Feb 2016 10:02:44 +0800 Subject: mfd: axp20x: Add support for RSB based AXP223 PMIC The AXP223 is a new PMIC commonly paired with Allwinner A23/A33 SoCs. It is functionally identical to AXP221; only the regulator default voltage/status and the external host interface are different. Signed-off-by: Chen-Yu Tsai Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 11 +++++++ drivers/mfd/Makefile | 1 + drivers/mfd/axp20x-rsb.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++ drivers/mfd/axp20x.c | 2 ++ include/linux/mfd/axp20x.h | 1 + 5 files changed, 95 insertions(+) create mode 100644 drivers/mfd/axp20x-rsb.c (limited to 'include/linux') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 0037b9c933d9..ae3990b5a2bf 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -107,6 +107,17 @@ config MFD_AXP20X_I2C components like regulators or the PEK (Power Enable Key) under the corresponding menus. +config MFD_AXP20X_RSB + tristate "X-Powers AXP series PMICs with RSB" + select MFD_AXP20X + depends on SUNXI_RSB + help + If you say Y here you get support for the X-Powers AXP series power + management ICs (PMICs) controlled with RSB. + This driver include only the core APIs. You have to select individual + components like regulators or the PEK (Power Enable Key) under the + corresponding menus. + config MFD_CROS_EC tristate "ChromeOS Embedded Controller" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index dba4f99d9044..c69ea744fd1a 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -112,6 +112,7 @@ obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o obj-$(CONFIG_MFD_AXP20X) += axp20x.o obj-$(CONFIG_MFD_AXP20X_I2C) += axp20x-i2c.o +obj-$(CONFIG_MFD_AXP20X_RSB) += axp20x-rsb.o obj-$(CONFIG_MFD_LP3943) += lp3943.o obj-$(CONFIG_MFD_LP8788) += lp8788.o lp8788-irq.o diff --git a/drivers/mfd/axp20x-rsb.c b/drivers/mfd/axp20x-rsb.c new file mode 100644 index 000000000000..28c20247c112 --- /dev/null +++ b/drivers/mfd/axp20x-rsb.c @@ -0,0 +1,80 @@ +/* + * RSB driver for the X-Powers' Power Management ICs + * + * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC + * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature + * as well as configurable GPIOs. + * + * This driver supports the RSB variants. + * + * Copyright (C) 2015 Chen-Yu Tsai + * + * Author: Chen-Yu Tsai + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static int axp20x_rsb_probe(struct sunxi_rsb_device *rdev) +{ + struct axp20x_dev *axp20x; + int ret; + + axp20x = devm_kzalloc(&rdev->dev, sizeof(*axp20x), GFP_KERNEL); + if (!axp20x) + return -ENOMEM; + + axp20x->dev = &rdev->dev; + axp20x->irq = rdev->irq; + dev_set_drvdata(&rdev->dev, axp20x); + + ret = axp20x_match_device(axp20x); + if (ret) + return ret; + + axp20x->regmap = devm_regmap_init_sunxi_rsb(rdev, axp20x->regmap_cfg); + if (IS_ERR(axp20x->regmap)) { + ret = PTR_ERR(axp20x->regmap); + dev_err(&rdev->dev, "regmap init failed: %d\n", ret); + return ret; + } + + return axp20x_device_probe(axp20x); +} + +static int axp20x_rsb_remove(struct sunxi_rsb_device *rdev) +{ + struct axp20x_dev *axp20x = sunxi_rsb_device_get_drvdata(rdev); + + return axp20x_device_remove(axp20x); +} + +static const struct of_device_id axp20x_rsb_of_match[] = { + { .compatible = "x-powers,axp223", .data = (void *)AXP223_ID }, + { }, +}; +MODULE_DEVICE_TABLE(of, axp20x_rsb_of_match); + +static struct sunxi_rsb_driver axp20x_rsb_driver = { + .driver = { + .name = "axp20x-rsb", + .of_match_table = of_match_ptr(axp20x_rsb_of_match), + }, + .probe = axp20x_rsb_probe, + .remove = axp20x_rsb_remove, +}; +module_sunxi_rsb_driver(axp20x_rsb_driver); + +MODULE_DESCRIPTION("PMIC MFD sunXi RSB driver for AXP20X"); +MODULE_AUTHOR("Chen-Yu Tsai "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 3054ea4b95e8..a57d6e940610 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -35,6 +35,7 @@ static const char * const axp20x_model_names[] = { "AXP202", "AXP209", "AXP221", + "AXP223", "AXP288", }; @@ -618,6 +619,7 @@ int axp20x_match_device(struct axp20x_dev *axp20x) axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; break; case AXP221_ID: + case AXP223_ID: axp20x->nr_cells = ARRAY_SIZE(axp22x_cells); axp20x->cells = axp22x_cells; axp20x->regmap_cfg = &axp22x_regmap_config; diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h index 00697c6ad8b0..d82e7d51372b 100644 --- a/include/linux/mfd/axp20x.h +++ b/include/linux/mfd/axp20x.h @@ -18,6 +18,7 @@ enum { AXP202_ID, AXP209_ID, AXP221_ID, + AXP223_ID, AXP288_ID, NR_AXP20X_VARIANTS, }; -- cgit v1.2.3 From b45b719ee03162eb54772c30a6474d57b41b6b54 Mon Sep 17 00:00:00 2001 From: "Andrew F. Davis" Date: Mon, 25 Jan 2016 09:50:11 -0600 Subject: mfd: tps65086: Add driver for the TPS65086 PMIC Add support for the TPS65912 device. It provides communication through I2C and contains the following components: - Regulators - Load switches - GPO controller Signed-off-by: Andrew F. Davis Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 13 ++++ drivers/mfd/Makefile | 1 + drivers/mfd/tps65086.c | 149 +++++++++++++++++++++++++++++++++++++++++++ include/linux/mfd/tps65086.h | 117 +++++++++++++++++++++++++++++++++ 4 files changed, 280 insertions(+) create mode 100644 drivers/mfd/tps65086.c create mode 100644 include/linux/mfd/tps65086.h (limited to 'include/linux') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index f47965834a6b..97d94068cb4d 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1130,6 +1130,19 @@ config TPS6507X This driver can also be built as a module. If so, the module will be called tps6507x. +config MFD_TPS65086 + tristate "TI TPS65086 Power Management Integrated Chips (PMICs)" + select REGMAP + select REGMAP_IRQ + select REGMAP_I2C + depends on I2C + help + If you say yes here you get support for the TPS65086 series of + Power Management chips. + This driver provides common support for accessing the device, + additional drivers must be enabled in order to use the + functionality of the device. + config TPS65911_COMPARATOR tristate diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index b7a3cd9adaee..d2ddcf45ccd1 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -70,6 +70,7 @@ obj-$(CONFIG_MFD_WM8994) += wm8994.o obj-$(CONFIG_TPS6105X) += tps6105x.o obj-$(CONFIG_TPS65010) += tps65010.o obj-$(CONFIG_TPS6507X) += tps6507x.o +obj-$(CONFIG_MFD_TPS65086) += tps65086.o obj-$(CONFIG_MFD_TPS65217) += tps65217.o obj-$(CONFIG_MFD_TPS65218) += tps65218.o obj-$(CONFIG_MFD_TPS65910) += tps65910.o diff --git a/drivers/mfd/tps65086.c b/drivers/mfd/tps65086.c new file mode 100644 index 000000000000..43119a6867fe --- /dev/null +++ b/drivers/mfd/tps65086.c @@ -0,0 +1,149 @@ +/* + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ + * Andrew F. Davis + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether expressed or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License version 2 for more details. + * + * Based on the TPS65912 driver + */ + +#include +#include +#include +#include + +#include + +static const struct mfd_cell tps65086_cells[] = { + { .name = "tps65086-regulator", }, + { .name = "tps65086-gpio", }, +}; + +static const struct regmap_range tps65086_yes_ranges[] = { + regmap_reg_range(TPS65086_IRQ, TPS65086_IRQ), + regmap_reg_range(TPS65086_PMICSTAT, TPS65086_SHUTDNSRC), + regmap_reg_range(TPS65086_GPOCTRL, TPS65086_GPOCTRL), + regmap_reg_range(TPS65086_PG_STATUS1, TPS65086_OC_STATUS), +}; + +static const struct regmap_access_table tps65086_volatile_table = { + .yes_ranges = tps65086_yes_ranges, + .n_yes_ranges = ARRAY_SIZE(tps65086_yes_ranges), +}; + +static const struct regmap_config tps65086_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .cache_type = REGCACHE_RBTREE, + .volatile_table = &tps65086_volatile_table, +}; + +static const struct regmap_irq tps65086_irqs[] = { + REGMAP_IRQ_REG(TPS65086_IRQ_DIETEMP, 0, TPS65086_IRQ_DIETEMP_MASK), + REGMAP_IRQ_REG(TPS65086_IRQ_SHUTDN, 0, TPS65086_IRQ_SHUTDN_MASK), + REGMAP_IRQ_REG(TPS65086_IRQ_FAULT, 0, TPS65086_IRQ_FAULT_MASK), +}; + +static struct regmap_irq_chip tps65086_irq_chip = { + .name = "tps65086", + .status_base = TPS65086_IRQ, + .mask_base = TPS65086_IRQ_MASK, + .ack_base = TPS65086_IRQ, + .init_ack_masked = true, + .num_regs = 1, + .irqs = tps65086_irqs, + .num_irqs = ARRAY_SIZE(tps65086_irqs), +}; + +static const struct of_device_id tps65086_of_match_table[] = { + { .compatible = "ti,tps65086", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, tps65086_of_match_table); + +static int tps65086_probe(struct i2c_client *client, + const struct i2c_device_id *ids) +{ + struct tps65086 *tps; + unsigned int version; + int ret; + + tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); + if (!tps) + return -ENOMEM; + + i2c_set_clientdata(client, tps); + tps->dev = &client->dev; + tps->irq = client->irq; + + tps->regmap = devm_regmap_init_i2c(client, &tps65086_regmap_config); + if (IS_ERR(tps->regmap)) { + dev_err(tps->dev, "Failed to initialize register map\n"); + return PTR_ERR(tps->regmap); + } + + ret = regmap_read(tps->regmap, TPS65086_DEVICEID, &version); + if (ret) { + dev_err(tps->dev, "Failed to read revision register\n"); + return ret; + } + + dev_info(tps->dev, "Device: TPS65086%01lX, OTP: %c, Rev: %ld\n", + (version & TPS65086_DEVICEID_PART_MASK), + (char)((version & TPS65086_DEVICEID_OTP_MASK) >> 4) + 'A', + (version & TPS65086_DEVICEID_REV_MASK) >> 6); + + ret = regmap_add_irq_chip(tps->regmap, tps->irq, IRQF_ONESHOT, 0, + &tps65086_irq_chip, &tps->irq_data); + if (ret) { + dev_err(tps->dev, "Failed to register IRQ chip\n"); + return ret; + } + + ret = mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, tps65086_cells, + ARRAY_SIZE(tps65086_cells), NULL, 0, + regmap_irq_get_domain(tps->irq_data)); + if (ret) { + regmap_del_irq_chip(tps->irq, tps->irq_data); + return ret; + } + + return 0; +} + +static int tps65086_remove(struct i2c_client *client) +{ + struct tps65086 *tps = i2c_get_clientdata(client); + + regmap_del_irq_chip(tps->irq, tps->irq_data); + + return 0; +} + +static const struct i2c_device_id tps65086_id_table[] = { + { "tps65086", 0 }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(i2c, tps65086_id_table); + +static struct i2c_driver tps65086_driver = { + .driver = { + .name = "tps65086", + .of_match_table = tps65086_of_match_table, + }, + .probe = tps65086_probe, + .remove = tps65086_remove, + .id_table = tps65086_id_table, +}; +module_i2c_driver(tps65086_driver); + +MODULE_AUTHOR("Andrew F. Davis "); +MODULE_DESCRIPTION("TPS65086 PMIC Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/mfd/tps65086.h b/include/linux/mfd/tps65086.h new file mode 100644 index 000000000000..a228ae4c88d9 --- /dev/null +++ b/include/linux/mfd/tps65086.h @@ -0,0 +1,117 @@ +/* + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ + * Andrew F. Davis + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether expressed or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License version 2 for more details. + * + * Based on the TPS65912 driver + */ + +#ifndef __LINUX_MFD_TPS65086_H +#define __LINUX_MFD_TPS65086_H + +#include +#include + +/* List of registers for TPS65086 */ +#define TPS65086_DEVICEID 0x01 +#define TPS65086_IRQ 0x02 +#define TPS65086_IRQ_MASK 0x03 +#define TPS65086_PMICSTAT 0x04 +#define TPS65086_SHUTDNSRC 0x05 +#define TPS65086_BUCK1CTRL 0x20 +#define TPS65086_BUCK2CTRL 0x21 +#define TPS65086_BUCK3DECAY 0x22 +#define TPS65086_BUCK3VID 0x23 +#define TPS65086_BUCK3SLPCTRL 0x24 +#define TPS65086_BUCK4CTRL 0x25 +#define TPS65086_BUCK5CTRL 0x26 +#define TPS65086_BUCK6CTRL 0x27 +#define TPS65086_LDOA2CTRL 0x28 +#define TPS65086_LDOA3CTRL 0x29 +#define TPS65086_DISCHCTRL1 0x40 +#define TPS65086_DISCHCTRL2 0x41 +#define TPS65086_DISCHCTRL3 0x42 +#define TPS65086_PG_DELAY1 0x43 +#define TPS65086_FORCESHUTDN 0x91 +#define TPS65086_BUCK1SLPCTRL 0x92 +#define TPS65086_BUCK2SLPCTRL 0x93 +#define TPS65086_BUCK4VID 0x94 +#define TPS65086_BUCK4SLPVID 0x95 +#define TPS65086_BUCK5VID 0x96 +#define TPS65086_BUCK5SLPVID 0x97 +#define TPS65086_BUCK6VID 0x98 +#define TPS65086_BUCK6SLPVID 0x99 +#define TPS65086_LDOA2VID 0x9A +#define TPS65086_LDOA3VID 0x9B +#define TPS65086_BUCK123CTRL 0x9C +#define TPS65086_PG_DELAY2 0x9D +#define TPS65086_PIN_EN_MASK1 0x9E +#define TPS65086_PIN_EN_MASK2 0x9F +#define TPS65086_SWVTT_EN 0x9F +#define TPS65086_PIN_EN_OVR1 0xA0 +#define TPS65086_PIN_EN_OVR2 0xA1 +#define TPS65086_GPOCTRL 0xA1 +#define TPS65086_PWR_FAULT_MASK1 0xA2 +#define TPS65086_PWR_FAULT_MASK2 0xA3 +#define TPS65086_GPO1PG_CTRL1 0xA4 +#define TPS65086_GPO1PG_CTRL2 0xA5 +#define TPS65086_GPO4PG_CTRL1 0xA6 +#define TPS65086_GPO4PG_CTRL2 0xA7 +#define TPS65086_GPO2PG_CTRL1 0xA8 +#define TPS65086_GPO2PG_CTRL2 0xA9 +#define TPS65086_GPO3PG_CTRL1 0xAA +#define TPS65086_GPO3PG_CTRL2 0xAB +#define TPS65086_LDOA1CTRL 0xAE +#define TPS65086_PG_STATUS1 0xB0 +#define TPS65086_PG_STATUS2 0xB1 +#define TPS65086_PWR_FAULT_STATUS1 0xB2 +#define TPS65086_PWR_FAULT_STATUS2 0xB3 +#define TPS65086_TEMPCRIT 0xB4 +#define TPS65086_TEMPHOT 0xB5 +#define TPS65086_OC_STATUS 0xB6 + +/* IRQ Register field definitions */ +#define TPS65086_IRQ_DIETEMP_MASK BIT(0) +#define TPS65086_IRQ_SHUTDN_MASK BIT(3) +#define TPS65086_IRQ_FAULT_MASK BIT(7) + +/* DEVICEID Register field definitions */ +#define TPS65086_DEVICEID_PART_MASK GENMASK(3, 0) +#define TPS65086_DEVICEID_OTP_MASK GENMASK(5, 4) +#define TPS65086_DEVICEID_REV_MASK GENMASK(7, 6) + +/* VID Masks */ +#define BUCK_VID_MASK GENMASK(7, 1) +#define VDOA1_VID_MASK GENMASK(4, 1) +#define VDOA23_VID_MASK GENMASK(3, 0) + +/* Define the TPS65086 IRQ numbers */ +enum tps65086_irqs { + TPS65086_IRQ_DIETEMP, + TPS65086_IRQ_SHUTDN, + TPS65086_IRQ_FAULT, +}; + +/** + * struct tps65086 - state holder for the tps65086 driver + * + * Device data may be used to access the TPS65086 chip + */ +struct tps65086 { + struct device *dev; + struct regmap *regmap; + + /* IRQ Data */ + int irq; + struct regmap_irq_chip_data *irq_data; +}; + +#endif /* __LINUX_MFD_TPS65086_H */ -- cgit v1.2.3 From f4bcf5a29d57fe515b8eb6c612090376086b5f79 Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Fri, 5 Feb 2016 14:32:56 +0100 Subject: mfd: cros_ec: Small kerneldoc fix s/cros_ec_register/cros_ec_query_all Signed-off-by: Tomeu Vizoso Signed-off-by: Lee Jones --- include/linux/mfd/cros_ec.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/linux') diff --git a/include/linux/mfd/cros_ec.h b/include/linux/mfd/cros_ec.h index 494682ce4bf3..a677c2bd485c 100644 --- a/include/linux/mfd/cros_ec.h +++ b/include/linux/mfd/cros_ec.h @@ -245,7 +245,7 @@ int cros_ec_remove(struct cros_ec_device *ec_dev); int cros_ec_register(struct cros_ec_device *ec_dev); /** - * cros_ec_register - Query the protocol version supported by the ChromeOS EC + * cros_ec_query_all - Query the protocol version supported by the ChromeOS EC * * @ec_dev: Device to register * @return 0 if ok, -ve on error -- cgit v1.2.3 From feec4799ac4d214abd62e2bdfccb3ca9c5801d2f Mon Sep 17 00:00:00 2001 From: John Crispin Date: Wed, 27 Jan 2016 12:47:36 +0100 Subject: mfd: mt6397: int_con and int_status may vary in location MT6323 has the INT_CON and INT_STATUS located at a different position. Make the registers locations configurable. Signed-off-by: John Crispin Signed-off-by: Lee Jones --- drivers/mfd/mt6397-core.c | 27 +++++++++++++++++---------- include/linux/mfd/mt6397/core.h | 2 ++ 2 files changed, 19 insertions(+), 10 deletions(-) (limited to 'include/linux') diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c index 1749c1c9f405..75ad0fe656f7 100644 --- a/drivers/mfd/mt6397-core.c +++ b/drivers/mfd/mt6397-core.c @@ -69,8 +69,10 @@ static void mt6397_irq_sync_unlock(struct irq_data *data) { struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data); - regmap_write(mt6397->regmap, MT6397_INT_CON0, mt6397->irq_masks_cur[0]); - regmap_write(mt6397->regmap, MT6397_INT_CON1, mt6397->irq_masks_cur[1]); + regmap_write(mt6397->regmap, mt6397->int_con[0], + mt6397->irq_masks_cur[0]); + regmap_write(mt6397->regmap, mt6397->int_con[1], + mt6397->irq_masks_cur[1]); mutex_unlock(&mt6397->irqlock); } @@ -147,8 +149,8 @@ static irqreturn_t mt6397_irq_thread(int irq, void *data) { struct mt6397_chip *mt6397 = data; - mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS0, 0); - mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS1, 16); + mt6397_irq_handle_reg(mt6397, mt6397->int_status[0], 0); + mt6397_irq_handle_reg(mt6397, mt6397->int_status[1], 16); return IRQ_HANDLED; } @@ -177,8 +179,8 @@ static int mt6397_irq_init(struct mt6397_chip *mt6397) mutex_init(&mt6397->irqlock); /* Mask all interrupt sources */ - regmap_write(mt6397->regmap, MT6397_INT_CON0, 0x0); - regmap_write(mt6397->regmap, MT6397_INT_CON1, 0x0); + regmap_write(mt6397->regmap, mt6397->int_con[0], 0x0); + regmap_write(mt6397->regmap, mt6397->int_con[1], 0x0); mt6397->irq_domain = irq_domain_add_linear(mt6397->dev->of_node, MT6397_IRQ_NR, &mt6397_irq_domain_ops, mt6397); @@ -203,8 +205,8 @@ static int mt6397_irq_suspend(struct device *dev) { struct mt6397_chip *chip = dev_get_drvdata(dev); - regmap_write(chip->regmap, MT6397_INT_CON0, chip->wake_mask[0]); - regmap_write(chip->regmap, MT6397_INT_CON1, chip->wake_mask[1]); + regmap_write(chip->regmap, chip->int_con[0], chip->wake_mask[0]); + regmap_write(chip->regmap, chip->int_con[1], chip->wake_mask[1]); enable_irq_wake(chip->irq); @@ -215,8 +217,8 @@ static int mt6397_irq_resume(struct device *dev) { struct mt6397_chip *chip = dev_get_drvdata(dev); - regmap_write(chip->regmap, MT6397_INT_CON0, chip->irq_masks_cur[0]); - regmap_write(chip->regmap, MT6397_INT_CON1, chip->irq_masks_cur[1]); + regmap_write(chip->regmap, chip->int_con[0], chip->irq_masks_cur[0]); + regmap_write(chip->regmap, chip->int_con[1], chip->irq_masks_cur[1]); disable_irq_wake(chip->irq); @@ -237,6 +239,11 @@ static int mt6397_probe(struct platform_device *pdev) return -ENOMEM; mt6397->dev = &pdev->dev; + mt6397->int_con[0] = MT6397_INT_CON0; + mt6397->int_con[1] = MT6397_INT_CON1; + mt6397->int_status[0] = MT6397_INT_STATUS0; + mt6397->int_status[1] = MT6397_INT_STATUS1; + /* * mt6397 MFD is child device of soc pmic wrapper. * Regmap is set from its parent. diff --git a/include/linux/mfd/mt6397/core.h b/include/linux/mfd/mt6397/core.h index 45b8e8aa1fbf..d678f526e498 100644 --- a/include/linux/mfd/mt6397/core.h +++ b/include/linux/mfd/mt6397/core.h @@ -60,6 +60,8 @@ struct mt6397_chip { u16 wake_mask[2]; u16 irq_masks_cur[2]; u16 irq_masks_cache[2]; + u16 int_con[2]; + u16 int_status[2]; }; #endif /* __MFD_MT6397_CORE_H__ */ -- cgit v1.2.3 From 44760cf3bf0a29da8f5cc271698c8772b8f79673 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Wed, 27 Jan 2016 12:47:38 +0100 Subject: mfd: mt6397: Add MT6323 support to MT6397 driver Signed-off-by: John Crispin Signed-off-by: Lee Jones --- drivers/mfd/mt6397-core.c | 20 ++ include/linux/mfd/mt6323/core.h | 36 ++++ include/linux/mfd/mt6323/registers.h | 408 +++++++++++++++++++++++++++++++++++ 3 files changed, 464 insertions(+) create mode 100644 include/linux/mfd/mt6323/core.h create mode 100644 include/linux/mfd/mt6323/registers.h (limited to 'include/linux') diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c index aa91606f9a30..8234cd34e438 100644 --- a/drivers/mfd/mt6397-core.c +++ b/drivers/mfd/mt6397-core.c @@ -19,11 +19,14 @@ #include #include #include +#include #include +#include #define MT6397_RTC_BASE 0xe000 #define MT6397_RTC_SIZE 0x3e +#define MT6323_CID_CODE 0x23 #define MT6391_CID_CODE 0x91 #define MT6397_CID_CODE 0x97 @@ -40,6 +43,13 @@ static const struct resource mt6397_rtc_resources[] = { }, }; +static const struct mfd_cell mt6323_devs[] = { + { + .name = "mt6323-regulator", + .of_compatible = "mediatek,mt6323-regulator" + }, +}; + static const struct mfd_cell mt6397_devs[] = { { .name = "mt6397-rtc", @@ -261,6 +271,15 @@ static int mt6397_probe(struct platform_device *pdev) } switch (id & 0xff) { + case MT6323_CID_CODE: + pmic->int_con[0] = MT6323_INT_CON0; + pmic->int_con[1] = MT6323_INT_CON1; + pmic->int_status[0] = MT6323_INT_STATUS0; + pmic->int_status[1] = MT6323_INT_STATUS1; + ret = mfd_add_devices(&pdev->dev, -1, mt6323_devs, + ARRAY_SIZE(mt6323_devs), NULL, 0, NULL); + break; + case MT6397_CID_CODE: case MT6391_CID_CODE: pmic->int_con[0] = MT6397_INT_CON0; @@ -302,6 +321,7 @@ static int mt6397_remove(struct platform_device *pdev) static const struct of_device_id mt6397_of_match[] = { { .compatible = "mediatek,mt6397" }, + { .compatible = "mediatek,mt6323" }, { } }; MODULE_DEVICE_TABLE(of, mt6397_of_match); diff --git a/include/linux/mfd/mt6323/core.h b/include/linux/mfd/mt6323/core.h new file mode 100644 index 000000000000..06d0ec3b1f8f --- /dev/null +++ b/include/linux/mfd/mt6323/core.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2016 Chen Zhong + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __MFD_MT6323_CORE_H__ +#define __MFD_MT6323_CORE_H__ + +enum MT6323_IRQ_STATUS_numbers { + MT6323_IRQ_STATUS_SPKL_AB = 0, + MT6323_IRQ_STATUS_SPKL, + MT6323_IRQ_STATUS_BAT_L, + MT6323_IRQ_STATUS_BAT_H, + MT6323_IRQ_STATUS_WATCHDOG, + MT6323_IRQ_STATUS_PWRKEY, + MT6323_IRQ_STATUS_THR_L, + MT6323_IRQ_STATUS_THR_H, + MT6323_IRQ_STATUS_VBATON_UNDET, + MT6323_IRQ_STATUS_BVALID_DET, + MT6323_IRQ_STATUS_CHRDET, + MT6323_IRQ_STATUS_OV, + MT6323_IRQ_STATUS_LDO = 16, + MT6323_IRQ_STATUS_FCHRKEY, + MT6323_IRQ_STATUS_ACCDET, + MT6323_IRQ_STATUS_AUDIO, + MT6323_IRQ_STATUS_RTC, + MT6323_IRQ_STATUS_VPROC, + MT6323_IRQ_STATUS_VSYS, + MT6323_IRQ_STATUS_VPA, + MT6323_IRQ_STATUS_NR, +}; + +#endif /* __MFD_MT6323_CORE_H__ */ diff --git a/include/linux/mfd/mt6323/registers.h b/include/linux/mfd/mt6323/registers.h new file mode 100644 index 000000000000..160f3c0e2589 --- /dev/null +++ b/include/linux/mfd/mt6323/registers.h @@ -0,0 +1,408 @@ +/* + * Copyright (c) 2016 Chen Zhong + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __MFD_MT6323_REGISTERS_H__ +#define __MFD_MT6323_REGISTERS_H__ + +/* PMIC Registers */ +#define MT6323_CHR_CON0 0x0000 +#define MT6323_CHR_CON1 0x0002 +#define MT6323_CHR_CON2 0x0004 +#define MT6323_CHR_CON3 0x0006 +#define MT6323_CHR_CON4 0x0008 +#define MT6323_CHR_CON5 0x000A +#define MT6323_CHR_CON6 0x000C +#define MT6323_CHR_CON7 0x000E +#define MT6323_CHR_CON8 0x0010 +#define MT6323_CHR_CON9 0x0012 +#define MT6323_CHR_CON10 0x0014 +#define MT6323_CHR_CON11 0x0016 +#define MT6323_CHR_CON12 0x0018 +#define MT6323_CHR_CON13 0x001A +#define MT6323_CHR_CON14 0x001C +#define MT6323_CHR_CON15 0x001E +#define MT6323_CHR_CON16 0x0020 +#define MT6323_CHR_CON17 0x0022 +#define MT6323_CHR_CON18 0x0024 +#define MT6323_CHR_CON19 0x0026 +#define MT6323_CHR_CON20 0x0028 +#define MT6323_CHR_CON21 0x002A +#define MT6323_CHR_CON22 0x002C +#define MT6323_CHR_CON23 0x002E +#define MT6323_CHR_CON24 0x0030 +#define MT6323_CHR_CON25 0x0032 +#define MT6323_CHR_CON26 0x0034 +#define MT6323_CHR_CON27 0x0036 +#define MT6323_CHR_CON28 0x0038 +#define MT6323_CHR_CON29 0x003A +#define MT6323_STRUP_CON0 0x003C +#define MT6323_STRUP_CON2 0x003E +#define MT6323_STRUP_CON3 0x0040 +#define MT6323_STRUP_CON4 0x0042 +#define MT6323_STRUP_CON5 0x0044 +#define MT6323_STRUP_CON6 0x0046 +#define MT6323_STRUP_CON7 0x0048 +#define MT6323_STRUP_CON8 0x004A +#define MT6323_STRUP_CON9 0x004C +#define MT6323_STRUP_CON10 0x004E +#define MT6323_STRUP_CON11 0x0050 +#define MT6323_SPK_CON0 0x0052 +#define MT6323_SPK_CON1 0x0054 +#define MT6323_SPK_CON2 0x0056 +#define MT6323_SPK_CON6 0x005E +#define MT6323_SPK_CON7 0x0060 +#define MT6323_SPK_CON8 0x0062 +#define MT6323_SPK_CON9 0x0064 +#define MT6323_SPK_CON10 0x0066 +#define MT6323_SPK_CON11 0x0068 +#define MT6323_SPK_CON12 0x006A +#define MT6323_CID 0x0100 +#define MT6323_TOP_CKPDN0 0x0102 +#define MT6323_TOP_CKPDN0_SET 0x0104 +#define MT6323_TOP_CKPDN0_CLR 0x0106 +#define MT6323_TOP_CKPDN1 0x0108 +#define MT6323_TOP_CKPDN1_SET 0x010A +#define MT6323_TOP_CKPDN1_CLR 0x010C +#define MT6323_TOP_CKPDN2 0x010E +#define MT6323_TOP_CKPDN2_SET 0x0110 +#define MT6323_TOP_CKPDN2_CLR 0x0112 +#define MT6323_TOP_RST_CON 0x0114 +#define MT6323_TOP_RST_CON_SET 0x0116 +#define MT6323_TOP_RST_CON_CLR 0x0118 +#define MT6323_TOP_RST_MISC 0x011A +#define MT6323_TOP_RST_MISC_SET 0x011C +#define MT6323_TOP_RST_MISC_CLR 0x011E +#define MT6323_TOP_CKCON0 0x0120 +#define MT6323_TOP_CKCON0_SET 0x0122 +#define MT6323_TOP_CKCON0_CLR 0x0124 +#define MT6323_TOP_CKCON1 0x0126 +#define MT6323_TOP_CKCON1_SET 0x0128 +#define MT6323_TOP_CKCON1_CLR 0x012A +#define MT6323_TOP_CKTST0 0x012C +#define MT6323_TOP_CKTST1 0x012E +#define MT6323_TOP_CKTST2 0x0130 +#define MT6323_TEST_OUT 0x0132 +#define MT6323_TEST_CON0 0x0134 +#define MT6323_TEST_CON1 0x0136 +#define MT6323_EN_STATUS0 0x0138 +#define MT6323_EN_STATUS1 0x013A +#define MT6323_OCSTATUS0 0x013C +#define MT6323_OCSTATUS1 0x013E +#define MT6323_PGSTATUS 0x0140 +#define MT6323_CHRSTATUS 0x0142 +#define MT6323_TDSEL_CON 0x0144 +#define MT6323_RDSEL_CON 0x0146 +#define MT6323_SMT_CON0 0x0148 +#define MT6323_SMT_CON1 0x014A +#define MT6323_SMT_CON2 0x014C +#define MT6323_SMT_CON3 0x014E +#define MT6323_SMT_CON4 0x0150 +#define MT6323_DRV_CON0 0x0152 +#define MT6323_DRV_CON1 0x0154 +#define MT6323_DRV_CON2 0x0156 +#define MT6323_DRV_CON3 0x0158 +#define MT6323_DRV_CON4 0x015A +#define MT6323_SIMLS1_CON 0x015C +#define MT6323_SIMLS2_CON 0x015E +#define MT6323_INT_CON0 0x0160 +#define MT6323_INT_CON0_SET 0x0162 +#define MT6323_INT_CON0_CLR 0x0164 +#define MT6323_INT_CON1 0x0166 +#define MT6323_INT_CON1_SET 0x0168 +#define MT6323_INT_CON1_CLR 0x016A +#define MT6323_INT_MISC_CON 0x016C +#define MT6323_INT_MISC_CON_SET 0x016E +#define MT6323_INT_MISC_CON_CLR 0x0170 +#define MT6323_INT_STATUS0 0x0172 +#define MT6323_INT_STATUS1 0x0174 +#define MT6323_OC_GEAR_0 0x0176 +#define MT6323_OC_GEAR_1 0x0178 +#define MT6323_OC_GEAR_2 0x017A +#define MT6323_OC_CTL_VPROC 0x017C +#define MT6323_OC_CTL_VSYS 0x017E +#define MT6323_OC_CTL_VPA 0x0180 +#define MT6323_FQMTR_CON0 0x0182 +#define MT6323_FQMTR_CON1 0x0184 +#define MT6323_FQMTR_CON2 0x0186 +#define MT6323_RG_SPI_CON 0x0188 +#define MT6323_DEW_DIO_EN 0x018A +#define MT6323_DEW_READ_TEST 0x018C +#define MT6323_DEW_WRITE_TEST 0x018E +#define MT6323_DEW_CRC_SWRST 0x0190 +#define MT6323_DEW_CRC_EN 0x0192 +#define MT6323_DEW_CRC_VAL 0x0194 +#define MT6323_DEW_DBG_MON_SEL 0x0196 +#define MT6323_DEW_CIPHER_KEY_SEL 0x0198 +#define MT6323_DEW_CIPHER_IV_SEL 0x019A +#define MT6323_DEW_CIPHER_EN 0x019C +#define MT6323_DEW_CIPHER_RDY 0x019E +#define MT6323_DEW_CIPHER_MODE 0x01A0 +#define MT6323_DEW_CIPHER_SWRST 0x01A2 +#define MT6323_DEW_RDDMY_NO 0x01A4 +#define MT6323_DEW_RDATA_DLY_SEL 0x01A6 +#define MT6323_BUCK_CON0 0x0200 +#define MT6323_BUCK_CON1 0x0202 +#define MT6323_BUCK_CON2 0x0204 +#define MT6323_BUCK_CON3 0x0206 +#define MT6323_BUCK_CON4 0x0208 +#define MT6323_BUCK_CON5 0x020A +#define MT6323_VPROC_CON0 0x020C +#define MT6323_VPROC_CON1 0x020E +#define MT6323_VPROC_CON2 0x0210 +#define MT6323_VPROC_CON3 0x0212 +#define MT6323_VPROC_CON4 0x0214 +#define MT6323_VPROC_CON5 0x0216 +#define MT6323_VPROC_CON7 0x021A +#define MT6323_VPROC_CON8 0x021C +#define MT6323_VPROC_CON9 0x021E +#define MT6323_VPROC_CON10 0x0220 +#define MT6323_VPROC_CON11 0x0222 +#define MT6323_VPROC_CON12 0x0224 +#define MT6323_VPROC_CON13 0x0226 +#define MT6323_VPROC_CON14 0x0228 +#define MT6323_VPROC_CON15 0x022A +#define MT6323_VPROC_CON18 0x0230 +#define MT6323_VSYS_CON0 0x0232 +#define MT6323_VSYS_CON1 0x0234 +#define MT6323_VSYS_CON2 0x0236 +#define MT6323_VSYS_CON3 0x0238 +#define MT6323_VSYS_CON4 0x023A +#define MT6323_VSYS_CON5 0x023C +#define MT6323_VSYS_CON7 0x0240 +#define MT6323_VSYS_CON8 0x0242 +#define MT6323_VSYS_CON9 0x0244 +#define MT6323_VSYS_CON10 0x0246 +#define MT6323_VSYS_CON11 0x0248 +#define MT6323_VSYS_CON12 0x024A +#define MT6323_VSYS_CON13 0x024C +#define MT6323_VSYS_CON14 0x024E +#define MT6323_VSYS_CON15 0x0250 +#define MT6323_VSYS_CON18 0x0256 +#define MT6323_VPA_CON0 0x0300 +#define MT6323_VPA_CON1 0x0302 +#define MT6323_VPA_CON2 0x0304 +#define MT6323_VPA_CON3 0x0306 +#define MT6323_VPA_CON4 0x0308 +#define MT6323_VPA_CON5 0x030A +#define MT6323_VPA_CON7 0x030E +#define MT6323_VPA_CON8 0x0310 +#define MT6323_VPA_CON9 0x0312 +#define MT6323_VPA_CON10 0x0314 +#define MT6323_VPA_CON11 0x0316 +#define MT6323_VPA_CON12 0x0318 +#define MT6323_VPA_CON14 0x031C +#define MT6323_VPA_CON16 0x0320 +#define MT6323_VPA_CON17 0x0322 +#define MT6323_VPA_CON18 0x0324 +#define MT6323_VPA_CON19 0x0326 +#define MT6323_VPA_CON20 0x0328 +#define MT6323_BUCK_K_CON0 0x032A +#define MT6323_BUCK_K_CON1 0x032C +#define MT6323_BUCK_K_CON2 0x032E +#define MT6323_ISINK0_CON0 0x0330 +#define MT6323_ISINK0_CON1 0x0332 +#define MT6323_ISINK0_CON2 0x0334 +#define MT6323_ISINK0_CON3 0x0336 +#define MT6323_ISINK1_CON0 0x0338 +#define MT6323_ISINK1_CON1 0x033A +#define MT6323_ISINK1_CON2 0x033C +#define MT6323_ISINK1_CON3 0x033E +#define MT6323_ISINK2_CON0 0x0340 +#define MT6323_ISINK2_CON1 0x0342 +#define MT6323_ISINK2_CON2 0x0344 +#define MT6323_ISINK2_CON3 0x0346 +#define MT6323_ISINK3_CON0 0x0348 +#define MT6323_ISINK3_CON1 0x034A +#define MT6323_ISINK3_CON2 0x034C +#define MT6323_ISINK3_CON3 0x034E +#define MT6323_ISINK_ANA0 0x0350 +#define MT6323_ISINK_ANA1 0x0352 +#define MT6323_ISINK_PHASE_DLY 0x0354 +#define MT6323_ISINK_EN_CTRL 0x0356 +#define MT6323_ANALDO_CON0 0x0400 +#define MT6323_ANALDO_CON1 0x0402 +#define MT6323_ANALDO_CON2 0x0404 +#define MT6323_ANALDO_CON3 0x0406 +#define MT6323_ANALDO_CON4 0x0408 +#define MT6323_ANALDO_CON5 0x040A +#define MT6323_ANALDO_CON6 0x040C +#define MT6323_ANALDO_CON7 0x040E +#define MT6323_ANALDO_CON8 0x0410 +#define MT6323_ANALDO_CON10 0x0412 +#define MT6323_ANALDO_CON15 0x0414 +#define MT6323_ANALDO_CON16 0x0416 +#define MT6323_ANALDO_CON17 0x0418 +#define MT6323_ANALDO_CON18 0x041A +#define MT6323_ANALDO_CON19 0x041C +#define MT6323_ANALDO_CON20 0x041E +#define MT6323_ANALDO_CON21 0x0420 +#define MT6323_DIGLDO_CON0 0x0500 +#define MT6323_DIGLDO_CON2 0x0502 +#define MT6323_DIGLDO_CON3 0x0504 +#define MT6323_DIGLDO_CON5 0x0506 +#define MT6323_DIGLDO_CON6 0x0508 +#define MT6323_DIGLDO_CON7 0x050A +#define MT6323_DIGLDO_CON8 0x050C +#define MT6323_DIGLDO_CON9 0x050E +#define MT6323_DIGLDO_CON10 0x0510 +#define MT6323_DIGLDO_CON11 0x0512 +#define MT6323_DIGLDO_CON12 0x0514 +#define MT6323_DIGLDO_CON13 0x0516 +#define MT6323_DIGLDO_CON14 0x0518 +#define MT6323_DIGLDO_CON15 0x051A +#define MT6323_DIGLDO_CON16 0x051C +#define MT6323_DIGLDO_CON17 0x051E +#define MT6323_DIGLDO_CON18 0x0520 +#define MT6323_DIGLDO_CON19 0x0522 +#define MT6323_DIGLDO_CON20 0x0524 +#define MT6323_DIGLDO_CON21 0x0526 +#define MT6323_DIGLDO_CON23 0x0528 +#define MT6323_DIGLDO_CON24 0x052A +#define MT6323_DIGLDO_CON26 0x052C +#define MT6323_DIGLDO_CON27 0x052E +#define MT6323_DIGLDO_CON28 0x0530 +#define MT6323_DIGLDO_CON29 0x0532 +#define MT6323_DIGLDO_CON30 0x0534 +#define MT6323_DIGLDO_CON31 0x0536 +#define MT6323_DIGLDO_CON32 0x0538 +#define MT6323_DIGLDO_CON33 0x053A +#define MT6323_DIGLDO_CON34 0x053C +#define MT6323_DIGLDO_CON35 0x053E +#define MT6323_DIGLDO_CON36 0x0540 +#define MT6323_DIGLDO_CON39 0x0542 +#define MT6323_DIGLDO_CON40 0x0544 +#define MT6323_DIGLDO_CON41 0x0546 +#define MT6323_DIGLDO_CON42 0x0548 +#define MT6323_DIGLDO_CON43 0x054A +#define MT6323_DIGLDO_CON44 0x054C +#define MT6323_DIGLDO_CON45 0x054E +#define MT6323_DIGLDO_CON46 0x0550 +#define MT6323_DIGLDO_CON47 0x0552 +#define MT6323_DIGLDO_CON48 0x0554 +#define MT6323_DIGLDO_CON49 0x0556 +#define MT6323_DIGLDO_CON50 0x0558 +#define MT6323_DIGLDO_CON51 0x055A +#define MT6323_DIGLDO_CON52 0x055C +#define MT6323_DIGLDO_CON53 0x055E +#define MT6323_DIGLDO_CON54 0x0560 +#define MT6323_EFUSE_CON0 0x0600 +#define MT6323_EFUSE_CON1 0x0602 +#define MT6323_EFUSE_CON2 0x0604 +#define MT6323_EFUSE_CON3 0x0606 +#define MT6323_EFUSE_CON4 0x0608 +#define MT6323_EFUSE_CON5 0x060A +#define MT6323_EFUSE_CON6 0x060C +#define MT6323_EFUSE_VAL_0_15 0x060E +#define MT6323_EFUSE_VAL_16_31 0x0610 +#define MT6323_EFUSE_VAL_32_47 0x0612 +#define MT6323_EFUSE_VAL_48_63 0x0614 +#define MT6323_EFUSE_VAL_64_79 0x0616 +#define MT6323_EFUSE_VAL_80_95 0x0618 +#define MT6323_EFUSE_VAL_96_111 0x061A +#define MT6323_EFUSE_VAL_112_127 0x061C +#define MT6323_EFUSE_VAL_128_143 0x061E +#define MT6323_EFUSE_VAL_144_159 0x0620 +#define MT6323_EFUSE_VAL_160_175 0x0622 +#define MT6323_EFUSE_VAL_176_191 0x0624 +#define MT6323_EFUSE_DOUT_0_15 0x0626 +#define MT6323_EFUSE_DOUT_16_31 0x0628 +#define MT6323_EFUSE_DOUT_32_47 0x062A +#define MT6323_EFUSE_DOUT_48_63 0x062C +#define MT6323_EFUSE_DOUT_64_79 0x062E +#define MT6323_EFUSE_DOUT_80_95 0x0630 +#define MT6323_EFUSE_DOUT_96_111 0x0632 +#define MT6323_EFUSE_DOUT_112_127 0x0634 +#define MT6323_EFUSE_DOUT_128_143 0x0636 +#define MT6323_EFUSE_DOUT_144_159 0x0638 +#define MT6323_EFUSE_DOUT_160_175 0x063A +#define MT6323_EFUSE_DOUT_176_191 0x063C +#define MT6323_EFUSE_CON7 0x063E +#define MT6323_EFUSE_CON8 0x0640 +#define MT6323_EFUSE_CON9 0x0642 +#define MT6323_RTC_MIX_CON0 0x0644 +#define MT6323_RTC_MIX_CON1 0x0646 +#define MT6323_AUDTOP_CON0 0x0700 +#define MT6323_AUDTOP_CON1 0x0702 +#define MT6323_AUDTOP_CON2 0x0704 +#define MT6323_AUDTOP_CON3 0x0706 +#define MT6323_AUDTOP_CON4 0x0708 +#define MT6323_AUDTOP_CON5 0x070A +#define MT6323_AUDTOP_CON6 0x070C +#define MT6323_AUDTOP_CON7 0x070E +#define MT6323_AUDTOP_CON8 0x0710 +#define MT6323_AUDTOP_CON9 0x0712 +#define MT6323_AUXADC_ADC0 0x0714 +#define MT6323_AUXADC_ADC1 0x0716 +#define MT6323_AUXADC_ADC2 0x0718 +#define MT6323_AUXADC_ADC3 0x071A +#define MT6323_AUXADC_ADC4 0x071C +#define MT6323_AUXADC_ADC5 0x071E +#define MT6323_AUXADC_ADC6 0x0720 +#define MT6323_AUXADC_ADC7 0x0722 +#define MT6323_AUXADC_ADC8 0x0724 +#define MT6323_AUXADC_ADC9 0x0726 +#define MT6323_AUXADC_ADC10 0x0728 +#define MT6323_AUXADC_ADC11 0x072A +#define MT6323_AUXADC_ADC12 0x072C +#define MT6323_AUXADC_ADC13 0x072E +#define MT6323_AUXADC_ADC14 0x0730 +#define MT6323_AUXADC_ADC15 0x0732 +#define MT6323_AUXADC_ADC16 0x0734 +#define MT6323_AUXADC_ADC17 0x0736 +#define MT6323_AUXADC_ADC18 0x0738 +#define MT6323_AUXADC_ADC19 0x073A +#define MT6323_AUXADC_ADC20 0x073C +#define MT6323_AUXADC_RSV1 0x073E +#define MT6323_AUXADC_RSV2 0x0740 +#define MT6323_AUXADC_CON0 0x0742 +#define MT6323_AUXADC_CON1 0x0744 +#define MT6323_AUXADC_CON2 0x0746 +#define MT6323_AUXADC_CON3 0x0748 +#define MT6323_AUXADC_CON4 0x074A +#define MT6323_AUXADC_CON5 0x074C +#define MT6323_AUXADC_CON6 0x074E +#define MT6323_AUXADC_CON7 0x0750 +#define MT6323_AUXADC_CON8 0x0752 +#define MT6323_AUXADC_CON9 0x0754 +#define MT6323_AUXADC_CON10 0x0756 +#define MT6323_AUXADC_CON11 0x0758 +#define MT6323_AUXADC_CON12 0x075A +#define MT6323_AUXADC_CON13 0x075C +#define MT6323_AUXADC_CON14 0x075E +#define MT6323_AUXADC_CON15 0x0760 +#define MT6323_AUXADC_CON16 0x0762 +#define MT6323_AUXADC_CON17 0x0764 +#define MT6323_AUXADC_CON18 0x0766 +#define MT6323_AUXADC_CON19 0x0768 +#define MT6323_AUXADC_CON20 0x076A +#define MT6323_AUXADC_CON21 0x076C +#define MT6323_AUXADC_CON22 0x076E +#define MT6323_AUXADC_CON23 0x0770 +#define MT6323_AUXADC_CON24 0x0772 +#define MT6323_AUXADC_CON25 0x0774 +#define MT6323_AUXADC_CON26 0x0776 +#define MT6323_AUXADC_CON27 0x0778 +#define MT6323_ACCDET_CON0 0x077A +#define MT6323_ACCDET_CON1 0x077C +#define MT6323_ACCDET_CON2 0x077E +#define MT6323_ACCDET_CON3 0x0780 +#define MT6323_ACCDET_CON4 0x0782 +#define MT6323_ACCDET_CON5 0x0784 +#define MT6323_ACCDET_CON6 0x0786 +#define MT6323_ACCDET_CON7 0x0788 +#define MT6323_ACCDET_CON8 0x078A +#define MT6323_ACCDET_CON9 0x078C +#define MT6323_ACCDET_CON10 0x078E +#define MT6323_ACCDET_CON11 0x0790 +#define MT6323_ACCDET_CON12 0x0792 +#define MT6323_ACCDET_CON13 0x0794 +#define MT6323_ACCDET_CON14 0x0796 +#define MT6323_ACCDET_CON15 0x0798 +#define MT6323_ACCDET_CON16 0x079A + +#endif /* __MFD_MT6323_REGISTERS_H__ */ -- cgit v1.2.3 From a862dc3ea793256a1364991f52e68198a2c5f27d Mon Sep 17 00:00:00 2001 From: "Maciej S. Szmigiero" Date: Sun, 31 Jan 2016 22:58:41 +0100 Subject: mfd: rc5t583: Set regmap config reg counts properly Regmap config max_register field should contain number of device last register, however num_reg_defaults_raw field should be set to register count instead (usually one register more than max_register). rc5t583 driver had both of these fields set to the same value, fix this by introducing separate defines for max register number and total count of registers. Signed-off-by: Maciej S. Szmigiero Signed-off-by: Lee Jones --- drivers/mfd/rc5t583.c | 4 ++-- include/linux/mfd/rc5t583.h | 5 +++-- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'include/linux') diff --git a/drivers/mfd/rc5t583.c b/drivers/mfd/rc5t583.c index e10f02f5d551..fc2b2d93f354 100644 --- a/drivers/mfd/rc5t583.c +++ b/drivers/mfd/rc5t583.c @@ -241,8 +241,8 @@ static const struct regmap_config rc5t583_regmap_config = { .reg_bits = 8, .val_bits = 8, .volatile_reg = volatile_reg, - .max_register = RC5T583_MAX_REGS, - .num_reg_defaults_raw = RC5T583_MAX_REGS, + .max_register = RC5T583_MAX_REG, + .num_reg_defaults_raw = RC5T583_NUM_REGS, .cache_type = REGCACHE_RBTREE, }; diff --git a/include/linux/mfd/rc5t583.h b/include/linux/mfd/rc5t583.h index fd413ccab915..8d0a392e0a7f 100644 --- a/include/linux/mfd/rc5t583.h +++ b/include/linux/mfd/rc5t583.h @@ -28,8 +28,6 @@ #include #include -#define RC5T583_MAX_REGS 0xF8 - /* Maximum number of main interrupts */ #define MAX_MAIN_INTERRUPT 5 #define RC5T583_MAX_GPEDGE_REG 2 @@ -169,6 +167,9 @@ #define RC5T583_RTC_AY_MONTH 0xF3 #define RC5T583_RTC_AY_YEAR 0xF4 +#define RC5T583_MAX_REG 0xF7 +#define RC5T583_NUM_REGS (RC5T583_MAX_REG + 1) + /* RICOH_RC5T583 IRQ definitions */ enum { RC5T583_IRQ_ONKEY, -- cgit v1.2.3 From e9b7ba7954fa8df6e021ee4bef084ed10eba2c2b Mon Sep 17 00:00:00 2001 From: "Maciej S. Szmigiero" Date: Sun, 31 Jan 2016 22:56:59 +0100 Subject: mfd: as3711: Set regmap config reg counts properly Regmap config max_register field should contain number of device last register, however num_reg_defaults_raw field should be set to register count instead (usually one register more than max_register). as3711 driver had both of these fields set to the same value, fix this by introducing separate defines for max register number and total count of registers. Signed-off-by: Maciej S. Szmigiero Signed-off-by: Lee Jones --- drivers/mfd/as3711.c | 4 ++-- include/linux/mfd/as3711.h | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'include/linux') diff --git a/drivers/mfd/as3711.c b/drivers/mfd/as3711.c index 94d67a6e1eb7..09e1483b99bc 100644 --- a/drivers/mfd/as3711.c +++ b/drivers/mfd/as3711.c @@ -108,8 +108,8 @@ static const struct regmap_config as3711_regmap_config = { .volatile_reg = as3711_volatile_reg, .readable_reg = as3711_readable_reg, .precious_reg = as3711_precious_reg, - .max_register = AS3711_MAX_REGS, - .num_reg_defaults_raw = AS3711_MAX_REGS, + .max_register = AS3711_MAX_REG, + .num_reg_defaults_raw = AS3711_NUM_REGS, .cache_type = REGCACHE_RBTREE, }; diff --git a/include/linux/mfd/as3711.h b/include/linux/mfd/as3711.h index 38452ce1e892..34cc85864be5 100644 --- a/include/linux/mfd/as3711.h +++ b/include/linux/mfd/as3711.h @@ -51,7 +51,8 @@ #define AS3711_ASIC_ID_1 0x90 #define AS3711_ASIC_ID_2 0x91 -#define AS3711_MAX_REGS 0x92 +#define AS3711_MAX_REG AS3711_ASIC_ID_2 +#define AS3711_NUM_REGS (AS3711_MAX_REG + 1) /* Regulators */ enum { -- cgit v1.2.3 From 8c037e0c8eaa7dcb3a190b9be841ee81edb865ff Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Fri, 29 Jan 2016 09:42:19 +0100 Subject: mfd: syscon: Return ENOTSUPP instead of ENOSYS when disabled When CONFIG_MFD_SYSCON is disabled, have the function stubs return ENOTSUPP to indicate the syscon functionality is not available. There are currently no callers that depend on the ENOSYS return value. This patchfixes a checkpatch warning: WARNING: ENOSYS means 'invalid syscall nr' and nothing else Signed-off-by: Philipp Zabel Signed-off-by: Lee Jones --- include/linux/mfd/syscon.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'include/linux') diff --git a/include/linux/mfd/syscon.h b/include/linux/mfd/syscon.h index 75e543b78f53..1088149be0c9 100644 --- a/include/linux/mfd/syscon.h +++ b/include/linux/mfd/syscon.h @@ -29,24 +29,24 @@ extern struct regmap *syscon_regmap_lookup_by_phandle( #else static inline struct regmap *syscon_node_to_regmap(struct device_node *np) { - return ERR_PTR(-ENOSYS); + return ERR_PTR(-ENOTSUPP); } static inline struct regmap *syscon_regmap_lookup_by_compatible(const char *s) { - return ERR_PTR(-ENOSYS); + return ERR_PTR(-ENOTSUPP); } static inline struct regmap *syscon_regmap_lookup_by_pdevname(const char *s) { - return ERR_PTR(-ENOSYS); + return ERR_PTR(-ENOTSUPP); } static inline struct regmap *syscon_regmap_lookup_by_phandle( struct device_node *np, const char *property) { - return ERR_PTR(-ENOSYS); + return ERR_PTR(-ENOTSUPP); } #endif -- cgit v1.2.3 From 5c1488906f852473b4d7837c3e33e411e0eb6910 Mon Sep 17 00:00:00 2001 From: "Maciej S. Szmigiero" Date: Sun, 31 Jan 2016 23:00:06 +0100 Subject: mfd: tps65090: Set regmap config reg counts properly Regmap config max_register field should contain number of device last register, however num_reg_defaults_raw field should be set to register count instead (usually one register more than max_register). tps65090 driver had both of these fields set to the same value, fix this by introducing separate defines for max register number and total count of registers. Signed-off-by: Maciej S. Szmigiero Signed-off-by: Lee Jones --- drivers/mfd/tps65090.c | 5 ++--- include/linux/mfd/tps65090.h | 5 +++++ 2 files changed, 7 insertions(+), 3 deletions(-) (limited to 'include/linux') diff --git a/drivers/mfd/tps65090.c b/drivers/mfd/tps65090.c index f88085ad9772..d7ec318c40c3 100644 --- a/drivers/mfd/tps65090.c +++ b/drivers/mfd/tps65090.c @@ -30,7 +30,6 @@ #include #define NUM_INT_REG 2 -#define TOTAL_NUM_REG 0x18 #define TPS65090_INT1_MASK_VAC_STATUS_CHANGE 1 #define TPS65090_INT1_MASK_VSYS_STATUS_CHANGE 2 @@ -161,8 +160,8 @@ static bool is_volatile_reg(struct device *dev, unsigned int reg) static const struct regmap_config tps65090_regmap_config = { .reg_bits = 8, .val_bits = 8, - .max_register = TOTAL_NUM_REG, - .num_reg_defaults_raw = TOTAL_NUM_REG, + .max_register = TPS65090_MAX_REG, + .num_reg_defaults_raw = TPS65090_NUM_REGS, .cache_type = REGCACHE_RBTREE, .volatile_reg = is_volatile_reg, }; diff --git a/include/linux/mfd/tps65090.h b/include/linux/mfd/tps65090.h index 0bf2708df150..67d144b3b8f9 100644 --- a/include/linux/mfd/tps65090.h +++ b/include/linux/mfd/tps65090.h @@ -77,6 +77,11 @@ enum { #define TPS65090_REG_CG_CTRL5 0x09 #define TPS65090_REG_CG_STATUS1 0x0a #define TPS65090_REG_CG_STATUS2 0x0b +#define TPS65090_REG_AD_OUT1 0x17 +#define TPS65090_REG_AD_OUT2 0x18 + +#define TPS65090_MAX_REG TPS65090_REG_AD_OUT2 +#define TPS65090_NUM_REGS (TPS65090_MAX_REG + 1) struct tps65090 { struct device *dev; -- cgit v1.2.3 From 2609e4daaaff930548e35793d46ae079d39fb722 Mon Sep 17 00:00:00 2001 From: Christoph Fritz Date: Thu, 25 Feb 2016 15:47:48 +0100 Subject: mfd: imx6sx: Add PCIe register definitions for iomuxc gpr This patch adds macros to define masks and bits for imx6sx PCIe registers. This is based on a patch by Richard Zhu. Signed-off-by: Christoph Fritz Signed-off-by: Lee Jones --- include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include/linux') diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index 558a485d03ab..238c8db953eb 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -422,6 +422,7 @@ #define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_MASK (0x1 << 26) #define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_ENABLE (0x1 << 26) #define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_DISABLE (0x0 << 26) +#define IMX6SX_GPR5_PCIE_BTNRST_RESET BIT(19) #define IMX6SX_GPR5_CSI1_MUX_CTRL_MASK (0x3 << 4) #define IMX6SX_GPR5_CSI1_MUX_CTRL_EXT_PIN (0x0 << 4) #define IMX6SX_GPR5_CSI1_MUX_CTRL_CVD (0x1 << 4) @@ -435,6 +436,10 @@ #define IMX6SX_GPR5_DISP_MUX_DCIC1_LVDS (0x1 << 1) #define IMX6SX_GPR5_DISP_MUX_DCIC1_MASK (0x1 << 1) +#define IMX6SX_GPR12_PCIE_TEST_POWERDOWN BIT(30) +#define IMX6SX_GPR12_PCIE_RX_EQ_MASK (0x7 << 0) +#define IMX6SX_GPR12_PCIE_RX_EQ_2 (0x2 << 0) + /* For imx6ul iomux gpr register field define */ #define IMX6UL_GPR1_ENET1_CLK_DIR (0x1 << 17) #define IMX6UL_GPR1_ENET2_CLK_DIR (0x1 << 18) -- cgit v1.2.3