From 190f73ab4c43ecfc8e93843fe249efeff7d69a90 Mon Sep 17 00:00:00 2001 From: Voon Weifeng Date: Tue, 27 Aug 2019 09:38:11 +0800 Subject: net: stmmac: setup higher frequency clk support for EHL & TGL EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk, ptp clock and ptp_max_adj to 200MHz. Signed-off-by: Voon Weifeng Signed-off-by: Ong Boon Leong Signed-off-by: David S. Miller --- include/linux/stmmac.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux/stmmac.h') diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index 5cc6b6faf359..7ad7ae35cf88 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -168,6 +168,7 @@ struct plat_stmmacenet_data { struct clk *clk_ptp_ref; unsigned int clk_ptp_rate; unsigned int clk_ref_rate; + s32 ptp_max_adj; struct reset_control *stmmac_rst; struct stmmac_axi *axi; int has_gmac4; -- cgit v1.2.3