From 0df29025fd0379d5950d206314d0b10a2c8a9607 Mon Sep 17 00:00:00 2001 From: Doug Chapman Date: Mon, 28 Jan 2008 15:33:28 -0800 Subject: [IA64] fix userspace compile error in gcc_intrin.h Fixes userspace build errors when linux/ipv6.h is included such as in the dhcpv6 package under fedora. Likely causes other userspace build errors as well. I found this in akpm's tree from 2.6.18 but could not find any case of anyone proposing it for the main tree. Signed-off-by: Doug Chapman Signed-off-by: Andrew Morton Signed-off-by: Tony Luck --- include/asm-ia64/gcc_intrin.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/asm-ia64') diff --git a/include/asm-ia64/gcc_intrin.h b/include/asm-ia64/gcc_intrin.h index 5b6665c754c9..de2ed2cbdd84 100644 --- a/include/asm-ia64/gcc_intrin.h +++ b/include/asm-ia64/gcc_intrin.h @@ -24,7 +24,9 @@ extern void ia64_bad_param_for_setreg (void); extern void ia64_bad_param_for_getreg (void); +#ifdef __KERNEL__ register unsigned long ia64_r13 asm ("r13") __used; +#endif #define ia64_setreg(regnum, val) \ ({ \ -- cgit v1.2.3 From 5302ac5019367470e123cb91844a28d6941e6912 Mon Sep 17 00:00:00 2001 From: Zoltan Menyhart Date: Mon, 4 Feb 2008 15:19:16 -0800 Subject: [IA64] Slim-down __clear_bit_unlock - I removed the unnecessary barrier() from __clear_bit_unlock(). ia64_st4_rel_nta() makes sure all the modifications are globally seen before the bit is seen to be off. - I made __clear_bit() modeled after __set_bit() and __change_bit(). - I corrected some comments sating that a memory barrier is provided, yet in reality, it is the acquisition side of the memory barrier only. - I corrected some comments, e.g. test_and_clear_bit() was peaking about "bit to set". Signed-off-by: Zoltan Menyhart, Acked-by: Nick Piggin Signed-off-by: Andrew Morton Signed-off-by: Tony Luck --- include/asm-ia64/bitops.h | 50 ++++++++++++++++++++++++++--------------------- 1 file changed, 28 insertions(+), 22 deletions(-) (limited to 'include/asm-ia64') diff --git a/include/asm-ia64/bitops.h b/include/asm-ia64/bitops.h index a1b9719f5fbb..953d3df9dd22 100644 --- a/include/asm-ia64/bitops.h +++ b/include/asm-ia64/bitops.h @@ -122,38 +122,40 @@ clear_bit_unlock (int nr, volatile void *addr) } /** - * __clear_bit_unlock - Non-atomically clear a bit with release + * __clear_bit_unlock - Non-atomically clears a bit in memory with release + * @nr: Bit to clear + * @addr: Address to start counting from * - * This is like clear_bit_unlock, but the implementation uses a store + * Similarly to clear_bit_unlock, the implementation uses a store * with release semantics. See also __raw_spin_unlock(). */ static __inline__ void -__clear_bit_unlock(int nr, volatile void *addr) +__clear_bit_unlock(int nr, void *addr) { - __u32 mask, new; - volatile __u32 *m; + __u32 * const m = (__u32 *) addr + (nr >> 5); + __u32 const new = *m & ~(1 << (nr & 31)); - m = (volatile __u32 *)addr + (nr >> 5); - mask = ~(1 << (nr & 31)); - new = *m & mask; - barrier(); ia64_st4_rel_nta(m, new); } /** * __clear_bit - Clears a bit in memory (non-atomic version) + * @nr: the bit to clear + * @addr: the address to start counting from + * + * Unlike clear_bit(), this function is non-atomic and may be reordered. + * If it's called on the same region of memory simultaneously, the effect + * may be that only one operation succeeds. */ static __inline__ void __clear_bit (int nr, volatile void *addr) { - volatile __u32 *p = (__u32 *) addr + (nr >> 5); - __u32 m = 1 << (nr & 31); - *p &= ~m; + *((__u32 *) addr + (nr >> 5)) &= ~(1 << (nr & 31)); } /** * change_bit - Toggle a bit in memory - * @nr: Bit to clear + * @nr: Bit to toggle * @addr: Address to start counting from * * change_bit() is atomic and may not be reordered. @@ -178,7 +180,7 @@ change_bit (int nr, volatile void *addr) /** * __change_bit - Toggle a bit in memory - * @nr: the bit to set + * @nr: the bit to toggle * @addr: the address to start counting from * * Unlike change_bit(), this function is non-atomic and may be reordered. @@ -197,7 +199,7 @@ __change_bit (int nr, volatile void *addr) * @addr: Address to count from * * This operation is atomic and cannot be reordered. - * It also implies a memory barrier. + * It also implies the acquisition side of the memory barrier. */ static __inline__ int test_and_set_bit (int nr, volatile void *addr) @@ -247,11 +249,11 @@ __test_and_set_bit (int nr, volatile void *addr) /** * test_and_clear_bit - Clear a bit and return its old value - * @nr: Bit to set + * @nr: Bit to clear * @addr: Address to count from * * This operation is atomic and cannot be reordered. - * It also implies a memory barrier. + * It also implies the acquisition side of the memory barrier. */ static __inline__ int test_and_clear_bit (int nr, volatile void *addr) @@ -272,7 +274,7 @@ test_and_clear_bit (int nr, volatile void *addr) /** * __test_and_clear_bit - Clear a bit and return its old value - * @nr: Bit to set + * @nr: Bit to clear * @addr: Address to count from * * This operation is non-atomic and can be reordered. @@ -292,11 +294,11 @@ __test_and_clear_bit(int nr, volatile void * addr) /** * test_and_change_bit - Change a bit and return its old value - * @nr: Bit to set + * @nr: Bit to change * @addr: Address to count from * * This operation is atomic and cannot be reordered. - * It also implies a memory barrier. + * It also implies the acquisition side of the memory barrier. */ static __inline__ int test_and_change_bit (int nr, volatile void *addr) @@ -315,8 +317,12 @@ test_and_change_bit (int nr, volatile void *addr) return (old & bit) != 0; } -/* - * WARNING: non atomic version. +/** + * __test_and_change_bit - Change a bit and return its old value + * @nr: Bit to change + * @addr: Address to count from + * + * This operation is non-atomic and can be reordered. */ static __inline__ int __test_and_change_bit (int nr, void *addr) -- cgit v1.2.3 From fe77efb8b7e80128b914044c175d5dcd75e9fff7 Mon Sep 17 00:00:00 2001 From: Hidetoshi Seto Date: Mon, 7 Jan 2008 10:11:57 +0900 Subject: [IA64] mca style cleanup Unified changelog, 80 columns rule, and address form fix. Signed-off-by: Hidetoshi Seto Signed-off-by: Tony Luck --- arch/ia64/kernel/mca.c | 66 +++++++++++++++++++++++------------------- arch/ia64/kernel/mca_asm.S | 46 +++++++++++++++-------------- arch/ia64/kernel/mca_drv.c | 2 +- arch/ia64/kernel/mca_drv.h | 2 +- arch/ia64/kernel/mca_drv_asm.S | 2 +- include/asm-ia64/mca.h | 6 ++-- include/asm-ia64/mca_asm.h | 3 +- 7 files changed, 70 insertions(+), 57 deletions(-) (limited to 'include/asm-ia64') diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c index 6dbf5919d2d0..846e7e036b13 100644 --- a/arch/ia64/kernel/mca.c +++ b/arch/ia64/kernel/mca.c @@ -2,61 +2,69 @@ * File: mca.c * Purpose: Generic MCA handling layer * - * Updated for latest kernel * Copyright (C) 2003 Hewlett-Packard Co * David Mosberger-Tang * * Copyright (C) 2002 Dell Inc. - * Copyright (C) Matt Domsch (Matt_Domsch@dell.com) + * Copyright (C) Matt Domsch * * Copyright (C) 2002 Intel - * Copyright (C) Jenna Hall (jenna.s.hall@intel.com) + * Copyright (C) Jenna Hall * * Copyright (C) 2001 Intel - * Copyright (C) Fred Lewis (frederick.v.lewis@intel.com) + * Copyright (C) Fred Lewis * * Copyright (C) 2000 Intel - * Copyright (C) Chuck Fleckenstein (cfleck@co.intel.com) + * Copyright (C) Chuck Fleckenstein * * Copyright (C) 1999, 2004 Silicon Graphics, Inc. - * Copyright (C) Vijay Chander(vijay@engr.sgi.com) + * Copyright (C) Vijay Chander * - * 03/04/15 D. Mosberger Added INIT backtrace support. - * 02/03/25 M. Domsch GUID cleanups + * Copyright (C) 2006 FUJITSU LIMITED + * Copyright (C) Hidetoshi Seto * - * 02/01/04 J. Hall Aligned MCA stack to 16 bytes, added platform vs. CPU - * error flag, set SAL default return values, changed - * error record structure to linked list, added init call - * to sal_get_state_info_size(). + * 2000-03-29 Chuck Fleckenstein + * Fixed PAL/SAL update issues, began MCA bug fixes, logging issues, + * added min save state dump, added INIT handler. * - * 01/01/03 F. Lewis Added setup of CMCI and CPEI IRQs, logging of corrected - * platform errors, completed code for logging of - * corrected & uncorrected machine check errors, and - * updated for conformance with Nov. 2000 revision of the - * SAL 3.0 spec. - * 00/03/29 C. Fleckenstein Fixed PAL/SAL update issues, began MCA bug fixes, logging issues, - * added min save state dump, added INIT handler. + * 2001-01-03 Fred Lewis + * Added setup of CMCI and CPEI IRQs, logging of corrected platform + * errors, completed code for logging of corrected & uncorrected + * machine check errors, and updated for conformance with Nov. 2000 + * revision of the SAL 3.0 spec. + * + * 2002-01-04 Jenna Hall + * Aligned MCA stack to 16 bytes, added platform vs. CPU error flag, + * set SAL default return values, changed error record structure to + * linked list, added init call to sal_get_state_info_size(). + * + * 2002-03-25 Matt Domsch + * GUID cleanups. + * + * 2003-04-15 David Mosberger-Tang + * Added INIT backtrace support. * * 2003-12-08 Keith Owens - * smp_call_function() must not be called from interrupt context (can - * deadlock on tasklist_lock). Use keventd to call smp_call_function(). + * smp_call_function() must not be called from interrupt context + * (can deadlock on tasklist_lock). + * Use keventd to call smp_call_function(). * * 2004-02-01 Keith Owens - * Avoid deadlock when using printk() for MCA and INIT records. - * Delete all record printing code, moved to salinfo_decode in user space. - * Mark variables and functions static where possible. - * Delete dead variables and functions. - * Reorder to remove the need for forward declarations and to consolidate - * related code. + * Avoid deadlock when using printk() for MCA and INIT records. + * Delete all record printing code, moved to salinfo_decode in user + * space. Mark variables and functions static where possible. + * Delete dead variables and functions. Reorder to remove the need + * for forward declarations and to consolidate related code. * * 2005-08-12 Keith Owens - * Convert MCA/INIT handlers to use per event stacks and SAL/OS state. + * Convert MCA/INIT handlers to use per event stacks and SAL/OS + * state. * * 2005-10-07 Keith Owens * Add notify_die() hooks. * * 2006-09-15 Hidetoshi Seto - * Add printing support for MCA/INIT. + * Add printing support for MCA/INIT. * * 2007-04-27 Russ Anderson * Support multiple cpus going through OS_MCA in the same event. diff --git a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S index 0f5965fcdf85..8bc7d259e0c6 100644 --- a/arch/ia64/kernel/mca_asm.S +++ b/arch/ia64/kernel/mca_asm.S @@ -1,24 +1,28 @@ -// -// assembly portion of the IA64 MCA handling -// -// Mods by cfleck to integrate into kernel build -// 00/03/15 davidm Added various stop bits to get a clean compile -// -// 00/03/29 cfleck Added code to save INIT handoff state in pt_regs format, switch to temp -// kstack, switch modes, jump to C INIT handler -// -// 02/01/04 J.Hall -// Before entering virtual mode code: -// 1. Check for TLB CPU error -// 2. Restore current thread pointer to kr6 -// 3. Move stack ptr 16 bytes to conform to C calling convention -// -// 04/11/12 Russ Anderson -// Added per cpu MCA/INIT stack save areas. -// -// 12/08/05 Keith Owens -// Use per cpu MCA/INIT stacks for all data. -// +/* + * File: mca_asm.S + * Purpose: assembly portion of the IA64 MCA handling + * + * Mods by cfleck to integrate into kernel build + * + * 2000-03-15 David Mosberger-Tang + * Added various stop bits to get a clean compile + * + * 2000-03-29 Chuck Fleckenstein + * Added code to save INIT handoff state in pt_regs format, + * switch to temp kstack, switch modes, jump to C INIT handler + * + * 2002-01-04 J.Hall + * Before entering virtual mode code: + * 1. Check for TLB CPU error + * 2. Restore current thread pointer to kr6 + * 3. Move stack ptr 16 bytes to conform to C calling convention + * + * 2004-11-12 Russ Anderson + * Added per cpu MCA/INIT stack save areas. + * + * 2005-12-08 Keith Owens + * Use per cpu MCA/INIT stacks for all data. + */ #include #include diff --git a/arch/ia64/kernel/mca_drv.c b/arch/ia64/kernel/mca_drv.c index aba813c2c150..fab1d21a4f2c 100644 --- a/arch/ia64/kernel/mca_drv.c +++ b/arch/ia64/kernel/mca_drv.c @@ -3,7 +3,7 @@ * Purpose: Generic MCA handling layer * * Copyright (C) 2004 FUJITSU LIMITED - * Copyright (C) Hidetoshi Seto (seto.hidetoshi@jp.fujitsu.com) + * Copyright (C) 2004 Hidetoshi Seto * Copyright (C) 2005 Silicon Graphics, Inc * Copyright (C) 2005 Keith Owens * Copyright (C) 2006 Russ Anderson diff --git a/arch/ia64/kernel/mca_drv.h b/arch/ia64/kernel/mca_drv.h index 485e34d0b199..53b8ecb5b4b9 100644 --- a/arch/ia64/kernel/mca_drv.h +++ b/arch/ia64/kernel/mca_drv.h @@ -3,7 +3,7 @@ * Purpose: Define helpers for Generic MCA handling * * Copyright (C) 2004 FUJITSU LIMITED - * Copyright (C) Hidetoshi Seto (seto.hidetoshi@jp.fujitsu.com) + * Copyright (C) 2004 Hidetoshi Seto */ /* * Processor error section: diff --git a/arch/ia64/kernel/mca_drv_asm.S b/arch/ia64/kernel/mca_drv_asm.S index 3bccb06c8d21..767ac2c20d16 100644 --- a/arch/ia64/kernel/mca_drv_asm.S +++ b/arch/ia64/kernel/mca_drv_asm.S @@ -3,7 +3,7 @@ * Purpose: Assembly portion of Generic MCA handling * * Copyright (C) 2004 FUJITSU LIMITED - * Copyright (C) Hidetoshi Seto (seto.hidetoshi@jp.fujitsu.com) + * Copyright (C) 2004 Hidetoshi Seto */ #include diff --git a/include/asm-ia64/mca.h b/include/asm-ia64/mca.h index 823553bf12e6..f1663aa94a52 100644 --- a/include/asm-ia64/mca.h +++ b/include/asm-ia64/mca.h @@ -3,9 +3,9 @@ * Purpose: Machine check handling specific defines * * Copyright (C) 1999, 2004 Silicon Graphics, Inc. - * Copyright (C) Vijay Chander (vijay@engr.sgi.com) - * Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com) - * Copyright (C) Russ Anderson (rja@sgi.com) + * Copyright (C) Vijay Chander + * Copyright (C) Srinivasa Thirumalachar + * Copyright (C) Russ Anderson */ #ifndef _ASM_IA64_MCA_H diff --git a/include/asm-ia64/mca_asm.h b/include/asm-ia64/mca_asm.h index 76203f9a8718..dd2a5b134390 100644 --- a/include/asm-ia64/mca_asm.h +++ b/include/asm-ia64/mca_asm.h @@ -1,8 +1,9 @@ /* * File: mca_asm.h + * Purpose: Machine check handling specific defines * * Copyright (C) 1999 Silicon Graphics, Inc. - * Copyright (C) Vijay Chander (vijay@engr.sgi.com) + * Copyright (C) Vijay Chander * Copyright (C) Srinivasa Thirumalachar * Copyright (C) 2000 Hewlett-Packard Co. * Copyright (C) 2000 David Mosberger-Tang -- cgit v1.2.3 From a7d57ecf4216ed29328f8e701bd65ebb66a0284c Mon Sep 17 00:00:00 2001 From: "Zhang, Xiantao" Date: Mon, 4 Feb 2008 15:46:23 -0800 Subject: [IA64] Export three symbols for module use Since kvm/module needs to use some unexported functions in kernel, so export them with this patch. Signed-off-by: Zhang Xiantao Signed-off-by: Tony Luck --- arch/ia64/kernel/ia64_ksyms.c | 3 +++ arch/ia64/kernel/sal.c | 14 ++++++++++++++ include/asm-ia64/sal.h | 14 +++----------- 3 files changed, 20 insertions(+), 11 deletions(-) (limited to 'include/asm-ia64') diff --git a/arch/ia64/kernel/ia64_ksyms.c b/arch/ia64/kernel/ia64_ksyms.c index c3b4412ccc67..8e7193d55528 100644 --- a/arch/ia64/kernel/ia64_ksyms.c +++ b/arch/ia64/kernel/ia64_ksyms.c @@ -12,6 +12,9 @@ EXPORT_SYMBOL(memset); EXPORT_SYMBOL(memcpy); EXPORT_SYMBOL(strlen); +#include +EXPORT_SYMBOL_GPL(empty_zero_page); + #include EXPORT_SYMBOL(ip_fast_csum); /* hand-coded assembly */ EXPORT_SYMBOL(csum_ipv6_magic); diff --git a/arch/ia64/kernel/sal.c b/arch/ia64/kernel/sal.c index 27c2ef445a56..f44fe8412162 100644 --- a/arch/ia64/kernel/sal.c +++ b/arch/ia64/kernel/sal.c @@ -284,6 +284,7 @@ ia64_sal_cache_flush (u64 cache_type) SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0); return isrv.status; } +EXPORT_SYMBOL_GPL(ia64_sal_cache_flush); void __init ia64_sal_init (struct ia64_sal_systab *systab) @@ -372,3 +373,16 @@ ia64_sal_oemcall_reentrant(struct ia64_sal_retval *isrvp, u64 oemfunc, return 0; } EXPORT_SYMBOL(ia64_sal_oemcall_reentrant); + +long +ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second, + unsigned long *drift_info) +{ + struct ia64_sal_retval isrv; + + SAL_CALL(isrv, SAL_FREQ_BASE, which, 0, 0, 0, 0, 0, 0); + *ticks_per_second = isrv.v0; + *drift_info = isrv.v1; + return isrv.status; +} +EXPORT_SYMBOL_GPL(ia64_sal_freq_base); diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h index 1f5412d6f9bb..2251118894ae 100644 --- a/include/asm-ia64/sal.h +++ b/include/asm-ia64/sal.h @@ -649,17 +649,6 @@ typedef struct err_rec { * Now define a couple of inline functions for improved type checking * and convenience. */ -static inline long -ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second, - unsigned long *drift_info) -{ - struct ia64_sal_retval isrv; - - SAL_CALL(isrv, SAL_FREQ_BASE, which, 0, 0, 0, 0, 0, 0); - *ticks_per_second = isrv.v0; - *drift_info = isrv.v1; - return isrv.status; -} extern s64 ia64_sal_cache_flush (u64 cache_type); extern void __init check_sal_cache_flush (void); @@ -841,6 +830,9 @@ extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval *, u64, u64, u64, u64, u64, u64, u64, u64); extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64, u64, u64, u64, u64, u64); +extern long +ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second, + unsigned long *drift_info); #ifdef CONFIG_HOTPLUG_CPU /* * System Abstraction Layer Specification -- cgit v1.2.3 From f00c2d36bf6d7efece79713930763d9a0460283e Mon Sep 17 00:00:00 2001 From: Xiantao Zhang Date: Thu, 31 Jan 2008 17:46:09 +0800 Subject: [IA64] ia64_set_psr should use srlz.i The only in kernel use of ia64_set_psr() needs to follow it with a srlz.i (since it is changing state for PSR.ic). So it is pointless to issue srlz.d inside this function. Signed-off-by: Xiantao Zhang Signed-off-by: Tony Luck --- arch/ia64/kernel/efi.c | 1 - include/asm-ia64/processor.h | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'include/asm-ia64') diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c index d59134d7e73c..919070a9aed7 100644 --- a/arch/ia64/kernel/efi.c +++ b/arch/ia64/kernel/efi.c @@ -421,7 +421,6 @@ efi_map_pal_code (void) pte_val(pfn_pte(__pa(pal_vaddr) >> PAGE_SHIFT, PAGE_KERNEL)), IA64_GRANULE_SHIFT); ia64_set_psr(psr); /* restore psr */ - ia64_srlz_i(); } void __init diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h index be3b0ae43270..038642f6d19e 100644 --- a/include/asm-ia64/processor.h +++ b/include/asm-ia64/processor.h @@ -472,7 +472,7 @@ ia64_set_psr (__u64 psr) { ia64_stop(); ia64_setreg(_IA64_REG_PSR_L, psr); - ia64_srlz_d(); + ia64_srlz_i(); } /* -- cgit v1.2.3