From b43511233c6e34b9c0d9a55e41b078d10e7d9ea6 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Mon, 22 May 2023 19:03:22 +0200 Subject: phy: phy-rockchip-inno-usb2: simplify phy clock handling Simplify phyclk handling by using devm_clk_get_optional_enabled to acquire and enable the optional clock. This also fixes a resource leak in driver remove path and adds proper error handling. Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20230522170324.61349-6-sebastian.reichel@collabora.com Signed-off-by: Vinod Koul --- drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) (limited to 'drivers/phy/rockchip') diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index aa8c55609c0d..1cf84869e78b 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -1390,24 +1390,22 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev) if (IS_ERR(rphy->phy_reset)) return PTR_ERR(rphy->phy_reset); - rphy->clk = of_clk_get_by_name(np, "phyclk"); - if (!IS_ERR(rphy->clk)) { - clk_prepare_enable(rphy->clk); - } else { - dev_info(&pdev->dev, "no phyclk specified\n"); - rphy->clk = NULL; + rphy->clk = devm_clk_get_optional_enabled(dev, "phyclk"); + if (IS_ERR(rphy->clk)) { + return dev_err_probe(&pdev->dev, PTR_ERR(rphy->clk), + "failed to get phyclk\n"); } ret = rockchip_usb2phy_clk480m_register(rphy); if (ret) { dev_err(dev, "failed to register 480m output clock\n"); - goto disable_clks; + return ret; } if (rphy->phy_cfg->phy_tuning) { ret = rphy->phy_cfg->phy_tuning(rphy); if (ret) - goto disable_clks; + return ret; } index = 0; @@ -1470,11 +1468,6 @@ next_child: put_child: of_node_put(child_np); -disable_clks: - if (rphy->clk) { - clk_disable_unprepare(rphy->clk); - clk_put(rphy->clk); - } return ret; } -- cgit v1.2.3