From 675d12acb66bb190d32a3fae187e379f01cbd8ce Mon Sep 17 00:00:00 2001 From: Nicolin Chen Date: Thu, 17 Sep 2020 04:31:55 -0700 Subject: memory: tegra: Correct num_tlb_lines for tegra210 According to Tegra210 TRM, the default value of TLB_ACTIVE_LINES field of register MC_SMMU_TLB_CONFIG_0 is 0x30. So num_tlb_lines should be 48 (0x30) rather than 32 (0x20). Signed-off-by: Nicolin Chen Acked-by: Thierry Reding Link: https://lore.kernel.org/r/20200917113155.13438-3-nicoleotsuka@gmail.com Signed-off-by: Joerg Roedel --- drivers/memory/tegra/tegra210.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/memory') diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c index cc0482434c75..7212d1d7b348 100644 --- a/drivers/memory/tegra/tegra210.c +++ b/drivers/memory/tegra/tegra210.c @@ -1073,7 +1073,7 @@ static const struct tegra_smmu_soc tegra210_smmu_soc = { .num_groups = ARRAY_SIZE(tegra210_groups), .supports_round_robin_arbitration = true, .supports_request_limit = true, - .num_tlb_lines = 32, + .num_tlb_lines = 48, .num_asids = 128, }; -- cgit v1.2.3