From 9c24d680de0d7b68ac4c07cc685d9dbf83751a1d Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 18 Oct 2016 13:33:31 +0200 Subject: gpu: ipu-cpmem: remove unused ipu_cpmem_set_yuv_planar function ipu_cpmem_set_yuv_planar_full is only used directly, remove the wrapper. Suggested-by: Liu Ying Signed-off-by: Philipp Zabel Acked-by: Liu Ying --- drivers/gpu/ipu-v3/ipu-cpmem.c | 36 ------------------------------------ 1 file changed, 36 deletions(-) (limited to 'drivers/gpu/ipu-v3') diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index fcb7dc86167b..f3ca1d6c02d0 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c @@ -417,42 +417,6 @@ void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel *ch, } EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar_full); -void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch, - u32 pixel_format, int stride, int height) -{ - int fourcc, u_offset, v_offset; - int uv_stride = 0; - - fourcc = v4l2_pix_fmt_to_drm_fourcc(pixel_format); - switch (fourcc) { - case DRM_FORMAT_YUV420: - uv_stride = stride / 2; - u_offset = stride * height; - v_offset = u_offset + (uv_stride * height / 2); - break; - case DRM_FORMAT_YVU420: - uv_stride = stride / 2; - v_offset = stride * height; - u_offset = v_offset + (uv_stride * height / 2); - break; - case DRM_FORMAT_YUV422: - uv_stride = stride / 2; - u_offset = stride * height; - v_offset = u_offset + (uv_stride * height); - break; - case DRM_FORMAT_NV12: - case DRM_FORMAT_NV16: - uv_stride = stride; - u_offset = stride * height; - v_offset = 0; - break; - default: - return; - } - ipu_cpmem_set_yuv_planar_full(ch, uv_stride, u_offset, v_offset); -} -EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar); - static const struct ipu_rgb def_xrgb_32 = { .red = { .offset = 16, .length = 8, }, .green = { .offset = 8, .length = 8, }, -- cgit v1.2.3 From c9d508c2df04af001c62e4fe86593aabe42ae718 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 18 Oct 2016 13:36:33 +0200 Subject: gpu: ipu-v3: add YUV 4:4:4 support The IDMAC does support reading and writing DRM_FORMAT_YUV444 and DRM_FORMAT_YVU444. Signed-off-by: Philipp Zabel Acked-by: Liu Ying --- drivers/gpu/ipu-v3/ipu-common.c | 2 ++ drivers/gpu/ipu-v3/ipu-cpmem.c | 7 +++++++ 2 files changed, 9 insertions(+) (limited to 'drivers/gpu/ipu-v3') diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c index b9539f7c5e9a..b7d7bd6e3d60 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c @@ -88,6 +88,8 @@ enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc) case DRM_FORMAT_YVU420: case DRM_FORMAT_YUV422: case DRM_FORMAT_YVU422: + case DRM_FORMAT_YUV444: + case DRM_FORMAT_YVU444: case DRM_FORMAT_NV12: case DRM_FORMAT_NV21: case DRM_FORMAT_NV16: diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index f3ca1d6c02d0..4b2b67113d92 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c @@ -554,6 +554,13 @@ int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc) /* burst size */ ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); break; + case DRM_FORMAT_YUV444: + case DRM_FORMAT_YVU444: + /* pix format */ + ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0); + /* burst size */ + ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); + break; case DRM_FORMAT_NV12: /* pix format */ ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 4); -- cgit v1.2.3 From a92d81456c08ea6917a7630718837f0a01cbd0d0 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Mon, 29 Aug 2016 08:32:03 +0200 Subject: gpu: ipu-v3: initially clear all interrupts If we want to stop resetting the IPU in the future, masking all interrupts before registering the irq handlers will not be enough to avoid spurious interrupts. We also have to clear them. Signed-off-by: Philipp Zabel Acked-by: Liu Ying --- drivers/gpu/ipu-v3/ipu-common.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/ipu-v3') diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c index b7d7bd6e3d60..97218af4fe75 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c @@ -1286,8 +1286,11 @@ static int ipu_irq_init(struct ipu_soc *ipu) return ret; } - for (i = 0; i < IPU_NUM_IRQS; i += 32) + /* Mask and clear all interrupts */ + for (i = 0; i < IPU_NUM_IRQS; i += 32) { ipu_cm_write(ipu, 0, IPU_INT_CTRL(i / 32)); + ipu_cm_write(ipu, ~unused[i / 32], IPU_INT_STAT(i / 32)); + } for (i = 0; i < IPU_NUM_IRQS; i += 32) { gc = irq_get_domain_generic_chip(ipu->domain, i); -- cgit v1.2.3 From 867341b95891ca176e9cb5fcc3c68b325f0eb306 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Wed, 5 Oct 2016 17:33:45 +0200 Subject: gpu: ipu-v3: add ipu_csi_set_downsize Support downsizing to 1/2 width and/or height in the CSI. Signed-off-by: Philipp Zabel --- drivers/gpu/ipu-v3/ipu-csi.c | 16 ++++++++++++++++ include/video/imx-ipu-v3.h | 1 + 2 files changed, 17 insertions(+) (limited to 'drivers/gpu/ipu-v3') diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c index d6e5ded24418..63c7292f427a 100644 --- a/drivers/gpu/ipu-v3/ipu-csi.c +++ b/drivers/gpu/ipu-v3/ipu-csi.c @@ -529,6 +529,22 @@ void ipu_csi_set_window(struct ipu_csi *csi, struct v4l2_rect *w) } EXPORT_SYMBOL_GPL(ipu_csi_set_window); +void ipu_csi_set_downsize(struct ipu_csi *csi, bool horiz, bool vert) +{ + unsigned long flags; + u32 reg; + + spin_lock_irqsave(&csi->lock, flags); + + reg = ipu_csi_read(csi, CSI_OUT_FRM_CTRL); + reg &= ~(CSI_HORI_DOWNSIZE_EN | CSI_VERT_DOWNSIZE_EN); + reg |= (horiz ? CSI_HORI_DOWNSIZE_EN : 0) | + (vert ? CSI_VERT_DOWNSIZE_EN : 0); + ipu_csi_write(csi, reg, CSI_OUT_FRM_CTRL); + + spin_unlock_irqrestore(&csi->lock, flags); +} + void ipu_csi_set_test_generator(struct ipu_csi *csi, bool active, u32 r_value, u32 g_value, u32 b_value, u32 pix_clk) diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h index cc8174c14df8..53cd07ccaa4c 100644 --- a/include/video/imx-ipu-v3.h +++ b/include/video/imx-ipu-v3.h @@ -318,6 +318,7 @@ int ipu_csi_init_interface(struct ipu_csi *csi, bool ipu_csi_is_interlaced(struct ipu_csi *csi); void ipu_csi_get_window(struct ipu_csi *csi, struct v4l2_rect *w); void ipu_csi_set_window(struct ipu_csi *csi, struct v4l2_rect *w); +void ipu_csi_set_downsize(struct ipu_csi *csi, bool horiz, bool vert); void ipu_csi_set_test_generator(struct ipu_csi *csi, bool active, u32 r_value, u32 g_value, u32 b_value, u32 pix_clk); -- cgit v1.2.3 From b5b457b33dcd2a6aa6f70a07f8a9b469727ffeec Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 8 Nov 2016 16:57:55 +0100 Subject: gpu: ipu-di: silence videomode logspam Adapting the videomode to the hardware constraints is something that can and must happen during normal operation and isn't something that the user can avoid. So printing a warning each time it happens isn't helpful. Demote this message to the debug level. Signed-off-by: Lucas Stach Signed-off-by: Philipp Zabel --- drivers/gpu/ipu-v3/ipu-di.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/ipu-v3') diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c index a8d87ddd8a17..d2f1bd9d3deb 100644 --- a/drivers/gpu/ipu-v3/ipu-di.c +++ b/drivers/gpu/ipu-v3/ipu-di.c @@ -535,7 +535,7 @@ int ipu_di_adjust_videomode(struct ipu_di *di, struct videomode *mode) return -EINVAL; } - dev_warn(di->ipu->dev, "videomode adapted for IPU restrictions\n"); + dev_dbg(di->ipu->dev, "videomode adapted for IPU restrictions\n"); return 0; } EXPORT_SYMBOL_GPL(ipu_di_adjust_videomode); -- cgit v1.2.3