From 975e4a3795d4f1373be538177525c0b714e0e65e Mon Sep 17 00:00:00 2001 From: Vinay Belgaumkar Date: Fri, 17 Nov 2023 16:14:49 -0800 Subject: drm/xe: Manually setup C6 when skip_guc_pc is set Skip the init/start/stop GuC PC functions and toggle C6 using register writes instead. Also request max possible frequency as dynamic freq management is disabled. v2: Fix compile warning Reviewed-by: Rodrigo Vivi Signed-off-by: Vinay Belgaumkar Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/regs/xe_gt_regs.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/drm/xe/regs') diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h index 18b13224480d..d318ec0efd7d 100644 --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h @@ -272,7 +272,11 @@ #define RPSWCTL_ENABLE REG_FIELD_PREP(RPSWCTL_MASK, 2) #define RPSWCTL_DISABLE REG_FIELD_PREP(RPSWCTL_MASK, 0) #define RC_CONTROL XE_REG(0xa090) +#define RC_CTL_HW_ENABLE REG_BIT(31) +#define RC_CTL_TO_MODE REG_BIT(28) +#define RC_CTL_RC6_ENABLE REG_BIT(18) #define RC_STATE XE_REG(0xa094) +#define RC_IDLE_HYSTERSIS XE_REG(0xa0ac) #define PMINTRMSK XE_REG(0xa168) #define PMINTR_DISABLE_REDIRECT_TO_GUC REG_BIT(31) -- cgit v1.2.3