From d7337ca2640cde21ff178bd78f01d94cd5ea2e08 Mon Sep 17 00:00:00 2001 From: Evan Quan Date: Mon, 14 Jan 2019 14:45:47 +0800 Subject: drm/amd/powerplay: support retrieving and adjusting SOC clock power levels V2 User can use "pp_dpm_socclk" to retrieve and adjust SOC clock power levels. V2: expose this interface for Vega10 and later ASICs only Signed-off-by: Evan Quan Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/include/kgd_pp_interface.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/drm/amd/include') diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h index 1130f293c4ee..f5ec25a6ab54 100644 --- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h +++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h @@ -92,6 +92,7 @@ enum pp_clock_type { PP_SCLK, PP_MCLK, PP_PCIE, + PP_SOCCLK, OD_SCLK, OD_MCLK, OD_VDDC_CURVE, -- cgit v1.2.3