From d4295be3874c1d464ae83a71f87ed93f84aa5d21 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 13 Mar 2015 17:58:37 -0500 Subject: clk: ti: DRA7: Correct timer_sys_ck clock aliases for Timers The OMAP DMTimer API, omap_dm_timer_set_source(), can set the parent of a timer node using 3 different values that use fixed parent names for the clocks. The parent name, timer_sys_ck, is used for setting the parent when used with the source index OMAP_TIMER_SRC_SYS_CLK. This should point to the TIMER_SYS_CLK and not the SYSCLKIN2, so correct the clock aliases appropriately. SYSCLKIN2 is not a mandatory clock input. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/clk/ti/clk-7xx.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'drivers/clk/ti/clk-7xx.c') diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c index ee32f4deebf4..256295eb5157 100644 --- a/drivers/clk/ti/clk-7xx.c +++ b/drivers/clk/ti/clk-7xx.c @@ -289,13 +289,13 @@ static struct ti_dt_clk dra7xx_clks[] = { DT_CLK("usbhs_omap", "usbtll_fck", "dummy_ck"), DT_CLK("omap_wdt", "ick", "dummy_ck"), DT_CLK(NULL, "timer_32k_ck", "sys_32k_ck"), - DT_CLK("4ae18000.timer", "timer_sys_ck", "sys_clkin2"), - DT_CLK("48032000.timer", "timer_sys_ck", "sys_clkin2"), - DT_CLK("48034000.timer", "timer_sys_ck", "sys_clkin2"), - DT_CLK("48036000.timer", "timer_sys_ck", "sys_clkin2"), - DT_CLK("4803e000.timer", "timer_sys_ck", "sys_clkin2"), - DT_CLK("48086000.timer", "timer_sys_ck", "sys_clkin2"), - DT_CLK("48088000.timer", "timer_sys_ck", "sys_clkin2"), + DT_CLK("4ae18000.timer", "timer_sys_ck", "timer_sys_clk_div"), + DT_CLK("48032000.timer", "timer_sys_ck", "timer_sys_clk_div"), + DT_CLK("48034000.timer", "timer_sys_ck", "timer_sys_clk_div"), + DT_CLK("48036000.timer", "timer_sys_ck", "timer_sys_clk_div"), + DT_CLK("4803e000.timer", "timer_sys_ck", "timer_sys_clk_div"), + DT_CLK("48086000.timer", "timer_sys_ck", "timer_sys_clk_div"), + DT_CLK("48088000.timer", "timer_sys_ck", "timer_sys_clk_div"), DT_CLK("48820000.timer", "timer_sys_ck", "timer_sys_clk_div"), DT_CLK("48822000.timer", "timer_sys_ck", "timer_sys_clk_div"), DT_CLK("48824000.timer", "timer_sys_ck", "timer_sys_clk_div"), -- cgit v1.2.3 From 712f7d64f079872d2895743f4b718bc0fdff725c Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 13 Mar 2015 17:58:38 -0500 Subject: clk: ti: DRA7: Add timer_sys_ck aliases for Timers 13 through 16 The OMAP DMTimer API, omap_dm_timer_set_source(), uses the clock name timer_sys_ck for setting a timer's clock source for the source index OMAP_TIMER_SRC_SYS_CLK. There is currently no clock alias data for the Timers 13 through 16 for this clock name, so add the same. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/clk/ti/clk-7xx.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/clk/ti/clk-7xx.c') diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c index 256295eb5157..5d2217ae4478 100644 --- a/drivers/clk/ti/clk-7xx.c +++ b/drivers/clk/ti/clk-7xx.c @@ -300,6 +300,10 @@ static struct ti_dt_clk dra7xx_clks[] = { DT_CLK("48822000.timer", "timer_sys_ck", "timer_sys_clk_div"), DT_CLK("48824000.timer", "timer_sys_ck", "timer_sys_clk_div"), DT_CLK("48826000.timer", "timer_sys_ck", "timer_sys_clk_div"), + DT_CLK("48828000.timer", "timer_sys_ck", "timer_sys_clk_div"), + DT_CLK("4882a000.timer", "timer_sys_ck", "timer_sys_clk_div"), + DT_CLK("4882c000.timer", "timer_sys_ck", "timer_sys_clk_div"), + DT_CLK("4882e000.timer", "timer_sys_ck", "timer_sys_clk_div"), DT_CLK(NULL, "sys_clkin", "sys_clkin1"), { .node_name = NULL }, }; -- cgit v1.2.3