From cb1d9f6ddaa436f2dce2710740b7a3546700949c Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 27 Dec 2016 00:00:38 +0100 Subject: clk: rockchip: add a clock-type for muxes based in the grf Rockchip socs often have some tiny number of muxes not controlled from the core clock controller but through bits set in the general register files. Add a clock-type that can control these as well, so that we don't need to work around them being absent. Signed-off-by: Heiko Stuebner --- drivers/clk/rockchip/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/clk/rockchip/Makefile') diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile index 16e098c36f90..a43a54d94c1f 100644 --- a/drivers/clk/rockchip/Makefile +++ b/drivers/clk/rockchip/Makefile @@ -8,6 +8,7 @@ obj-y += clk-pll.o obj-y += clk-cpu.o obj-y += clk-inverter.o obj-y += clk-mmc-phase.o +obj-y += clk-muxgrf.o obj-y += clk-ddr.o obj-$(CONFIG_RESET_CONTROLLER) += softrst.o -- cgit v1.2.3