From 9d5a9e74655b9d04d0ec9c8e47801163b7b74211 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Sat, 28 Jun 2008 00:12:52 +0300 Subject: Remove asm/a.out.h files for all architectures without a.out support. This patch also includes the required removal of (unused) inclusion of 's in the arch/ code for these architectures. [dwmw2: updated for 2.6.27-rc] Signed-off-by: Adrian Bunk Signed-off-by: David Woodhouse --- arch/blackfin/include/asm/a.out.h | 19 ------------------- 1 file changed, 19 deletions(-) delete mode 100644 arch/blackfin/include/asm/a.out.h (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/a.out.h b/arch/blackfin/include/asm/a.out.h deleted file mode 100644 index 6c3d652ebd33..000000000000 --- a/arch/blackfin/include/asm/a.out.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef __BFIN_A_OUT_H__ -#define __BFIN_A_OUT_H__ - -struct exec { - unsigned long a_info; /* Use macros N_MAGIC, etc for access */ - unsigned a_text; /* length of text, in bytes */ - unsigned a_data; /* length of data, in bytes */ - unsigned a_bss; /* length of uninitialized data area for file, in bytes */ - unsigned a_syms; /* length of symbol table data in file, in bytes */ - unsigned a_entry; /* start address */ - unsigned a_trsize; /* length of relocation info for text, in bytes */ - unsigned a_drsize; /* length of relocation info for data, in bytes */ -}; - -#define N_TRSIZE(a) ((a).a_trsize) -#define N_DRSIZE(a) ((a).a_drsize) -#define N_SYMSIZE(a) ((a).a_syms) - -#endif /* __BFIN_A_OUT_H__ */ -- cgit v1.2.3 From 31f3d4a317ae1541bf25d0efbf4551855bed0d5b Mon Sep 17 00:00:00 2001 From: Bryan Wu Date: Mon, 22 Sep 2008 20:23:55 +0800 Subject: Blackfin arch: add dma mapping stub for musb driver port Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/dma-mapping.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h index 1a13c2fc3667..ede748d67efd 100644 --- a/arch/blackfin/include/asm/dma-mapping.h +++ b/arch/blackfin/include/asm/dma-mapping.h @@ -80,4 +80,15 @@ extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, enum dma_data_direction direction); +static inline void dma_sync_single_for_cpu(struct device *dev, + dma_addr_t handle, size_t size, + enum dma_data_direction dir) +{ +} + +static inline void dma_sync_single_for_device(struct device *dev, + dma_addr_t handle, size_t size, + enum dma_data_direction dir) +{ +} #endif /* _BLACKFIN_DMA_MAPPING_H */ -- cgit v1.2.3 From f4585a08479a730fb809606b8ee327a5398c117c Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 13 Oct 2008 14:45:21 +0800 Subject: Blackfin arch: only include asm/cplb.h when it is truly used Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/cacheflush.h | 2 -- arch/blackfin/kernel/traps.c | 1 + arch/blackfin/mach-bf527/boards/cm_bf527.c | 3 +-- arch/blackfin/mach-bf527/boards/ezkit.c | 3 +-- arch/blackfin/mach-bf548/boards/cm_bf548.c | 7 +++---- arch/blackfin/mach-bf548/boards/ezkit.c | 3 +-- 6 files changed, 7 insertions(+), 12 deletions(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h index d81a77545a04..5ef9e35e9c3b 100644 --- a/arch/blackfin/include/asm/cacheflush.h +++ b/arch/blackfin/include/asm/cacheflush.h @@ -30,8 +30,6 @@ #ifndef _BLACKFIN_CACHEFLUSH_H #define _BLACKFIN_CACHEFLUSH_H -#include - extern void blackfin_icache_dcache_flush_range(unsigned int, unsigned int); extern void blackfin_icache_flush_range(unsigned int, unsigned int); extern void blackfin_dcache_flush_range(unsigned int, unsigned int); diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index 9a9d5083acfd..fd24e04fc19e 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c index 986483fb69fa..9ea440bbb13d 100644 --- a/arch/blackfin/mach-bf527/boards/cm_bf527.c +++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c @@ -44,7 +44,6 @@ #include #include #include -#include #include #include #include @@ -209,7 +208,7 @@ static struct mtd_partition partition_info[] = { { .name = "linux kernel(nand)", .offset = 0, - .size = 4 * SIZE_1M, + .size = 4 * 1024 * 1024, }, { .name = "file system(nand)", diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c index a756934482cf..04a8d6da9055 100644 --- a/arch/blackfin/mach-bf527/boards/ezkit.c +++ b/arch/blackfin/mach-bf527/boards/ezkit.c @@ -43,7 +43,6 @@ #include #include #include -#include #include #include #include @@ -226,7 +225,7 @@ static struct mtd_partition partition_info[] = { { .name = "linux kernel(nand)", .offset = 0, - .size = 4 * SIZE_1M, + .size = 4 * 1024 * 1024, }, { .name = "file system(nand)", diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c index 36f56f9ffd05..c5609ff805f8 100644 --- a/arch/blackfin/mach-bf548/boards/cm_bf548.c +++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c @@ -38,7 +38,6 @@ #include #include #include -#include #include #include #include @@ -329,12 +328,12 @@ static struct mtd_partition partition_info[] = { { .name = "linux kernel(nand)", .offset = 0, - .size = 4 * SIZE_1M, + .size = 4 * 1024 * 1024, }, { .name = "file system(nand)", - .offset = 4 * SIZE_1M, - .size = (256 - 4) * SIZE_1M, + .offset = 4 * 1024 * 1024, + .size = (256 - 4) * 1024 * 1024, }, }; diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index 628f21889e22..397ddf6b8106 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c @@ -40,7 +40,6 @@ #include #include #include -#include #include #include #include @@ -375,7 +374,7 @@ static struct mtd_partition partition_info[] = { { .name = "linux kernel(nand)", .offset = 0, - .size = 4 * SIZE_1M, + .size = 4 * 1024 * 1024, }, { .name = "file system(nand)", -- cgit v1.2.3 From a5ac0129249611fc4a35e6d7cd9b8462d67e5798 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Mon, 13 Oct 2008 14:07:19 +0800 Subject: Blackfin arch: add supporting for kgdb Signed-off-by: Sonic Zhang Signed-off-by: Bryan Wu --- Documentation/blackfin/kgdb.txt | 155 ------ arch/blackfin/Kconfig.debug | 3 + arch/blackfin/include/asm/kgdb.h | 21 +- arch/blackfin/kernel/kgdb.c | 711 ++++++++++++++++++------ arch/blackfin/kernel/traps.c | 35 +- arch/blackfin/mach-bf561/include/mach/mem_map.h | 18 +- arch/blackfin/mach-common/entry.S | 9 +- arch/blackfin/mach-common/ints-priority.c | 4 - 8 files changed, 606 insertions(+), 350 deletions(-) delete mode 100644 Documentation/blackfin/kgdb.txt (limited to 'arch/blackfin/include/asm') diff --git a/Documentation/blackfin/kgdb.txt b/Documentation/blackfin/kgdb.txt deleted file mode 100644 index 84f6a484ae9a..000000000000 --- a/Documentation/blackfin/kgdb.txt +++ /dev/null @@ -1,155 +0,0 @@ - A Simple Guide to Configure KGDB - - Sonic Zhang - Aug. 24th 2006 - - -This KGDB patch enables the kernel developer to do source level debugging on -the kernel for the Blackfin architecture. The debugging works over either the -ethernet interface or one of the uarts. Both software breakpoints and -hardware breakpoints are supported in this version. -http://docs.blackfin.uclinux.org/doku.php?id=kgdb - - -2 known issues: -1. This bug: - http://blackfin.uclinux.org/tracker/index.php?func=detail&aid=544&group_id=18&atid=145 - The GDB client for Blackfin uClinux causes incorrect values of local - variables to be displayed when the user breaks the running of kernel in GDB. -2. Because of a hardware bug in Blackfin 533 v1.0.3: - 05000067 - Watchpoints (Hardware Breakpoints) are not supported - Hardware breakpoints cannot be set properly. - - -Debug over Ethernet: - -1. Compile and install the cross platform version of gdb for blackfin, which - can be found at $(BINROOT)/bfin-elf-gdb. - -2. Apply this patch to the 2.6.x kernel. Select the menuconfig option under - "Kernel hacking" -> "Kernel debugging" -> "KGDB: kernel debug with remote gdb". - With this selected, option "Full Symbolic/Source Debugging support" and - "Compile the kernel with frame pointers" are also selected. - -3. Select option "KGDB: connect over (Ethernet)". Add "kgdboe=@target-IP/,@host-IP/" to - the option "Compiled-in Kernel Boot Parameter" under "Kernel hacking". - -4. Connect minicom to the serial port and boot the kernel image. - -5. Configure the IP "/> ifconfig eth0 target-IP" - -6. Start GDB client "bfin-elf-gdb vmlinux". - -7. Connect to the target "(gdb) target remote udp:target-IP:6443". - -8. Set software breakpoint "(gdb) break sys_open". - -9. Continue "(gdb) c". - -10. Run ls in the target console "/> ls". - -11. Breakpoint hits. "Breakpoint 1: sys_open(..." - -12. Display local variables and function paramters. - (*) This operation gives wrong results, see known issue 1. - -13. Single stepping "(gdb) si". - -14. Remove breakpoint 1. "(gdb) del 1" - -15. Set hardware breakpoint "(gdb) hbreak sys_open". - -16. Continue "(gdb) c". - -17. Run ls in the target console "/> ls". - -18. Hardware breakpoint hits. "Breakpoint 1: sys_open(...". - (*) This hardware breakpoint will not be hit, see known issue 2. - -19. Continue "(gdb) c". - -20. Interrupt the target in GDB "Ctrl+C". - -21. Detach from the target "(gdb) detach". - -22. Exit GDB "(gdb) quit". - - -Debug over the UART: - -1. Compile and install the cross platform version of gdb for blackfin, which - can be found at $(BINROOT)/bfin-elf-gdb. - -2. Apply this patch to the 2.6.x kernel. Select the menuconfig option under - "Kernel hacking" -> "Kernel debugging" -> "KGDB: kernel debug with remote gdb". - With this selected, option "Full Symbolic/Source Debugging support" and - "Compile the kernel with frame pointers" are also selected. - -3. Select option "KGDB: connect over (UART)". Set "KGDB: UART port number" to be - a different one from the console. Don't forget to change the mode of - blackfin serial driver to PIO. Otherwise kgdb works incorrectly on UART. - -4. If you want connect to kgdb when the kernel boots, enable - "KGDB: Wait for gdb connection early" - -5. Compile kernel. - -6. Connect minicom to the serial port of the console and boot the kernel image. - -7. Start GDB client "bfin-elf-gdb vmlinux". - -8. Set the baud rate in GDB "(gdb) set remotebaud 57600". - -9. Connect to the target on the second serial port "(gdb) target remote /dev/ttyS1". - -10. Set software breakpoint "(gdb) break sys_open". - -11. Continue "(gdb) c". - -12. Run ls in the target console "/> ls". - -13. A breakpoint is hit. "Breakpoint 1: sys_open(..." - -14. All other operations are the same as that in KGDB over Ethernet. - - -Debug over the same UART as console: - -1. Compile and install the cross platform version of gdb for blackfin, which - can be found at $(BINROOT)/bfin-elf-gdb. - -2. Apply this patch to the 2.6.x kernel. Select the menuconfig option under - "Kernel hacking" -> "Kernel debugging" -> "KGDB: kernel debug with remote gdb". - With this selected, option "Full Symbolic/Source Debugging support" and - "Compile the kernel with frame pointers" are also selected. - -3. Select option "KGDB: connect over UART". Set "KGDB: UART port number" to console. - Don't forget to change the mode of blackfin serial driver to PIO. - Otherwise kgdb works incorrectly on UART. - -4. If you want connect to kgdb when the kernel boots, enable - "KGDB: Wait for gdb connection early" - -5. Connect minicom to the serial port and boot the kernel image. - -6. (Optional) Ask target to wait for gdb connection by entering Ctrl+A. In minicom, you should enter Ctrl+A+A. - -7. Start GDB client "bfin-elf-gdb vmlinux". - -8. Set the baud rate in GDB "(gdb) set remotebaud 57600". - -9. Connect to the target "(gdb) target remote /dev/ttyS0". - -10. Set software breakpoint "(gdb) break sys_open". - -11. Continue "(gdb) c". Then enter Ctrl+C twice to stop GDB connection. - -12. Run ls in the target console "/> ls". Dummy string can be seen on the console. - -13. Then connect the gdb to target again. "(gdb) target remote /dev/ttyS0". - Now you will find a breakpoint is hit. "Breakpoint 1: sys_open(..." - -14. All other operations are the same as that in KGDB over Ethernet. The only - difference is that after continue command in GDB, please stop GDB - connection by 2 "Ctrl+C"s and connect again after breakpoints are hit or - Ctrl+A is entered. diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug index 0afa89818722..2cb0a3080d79 100644 --- a/arch/blackfin/Kconfig.debug +++ b/arch/blackfin/Kconfig.debug @@ -2,6 +2,9 @@ menu "Kernel hacking" source "lib/Kconfig.debug" +config HAVE_ARCH_KGDB + def_bool y + config DEBUG_MMRS bool "Generate Blackfin MMR tree" select DEBUG_FS diff --git a/arch/blackfin/include/asm/kgdb.h b/arch/blackfin/include/asm/kgdb.h index 0f73847fd6bc..26ebac6646d8 100644 --- a/arch/blackfin/include/asm/kgdb.h +++ b/arch/blackfin/include/asm/kgdb.h @@ -124,9 +124,16 @@ enum regnames { /* Number of bytes of registers. */ #define NUMREGBYTES BFIN_NUM_REGS*4 -#define BREAKPOINT() asm(" EXCPT 2;"); -#define BREAK_INSTR_SIZE 2 -#define HW_BREAKPOINT_NUM 6 +static inline void arch_kgdb_breakpoint(void) +{ + asm(" EXCPT 2;"); +} +#define BREAK_INSTR_SIZE 2 +#define CACHE_FLUSH_IS_SAFE 1 +#define HW_INST_WATCHPOINT_NUM 6 +#define HW_WATCHPOINT_NUM 8 +#define TYPE_INST_WATCHPOINT 0 +#define TYPE_DATA_WATCHPOINT 1 /* Instruction watchpoint address control register bits mask */ #define WPPWR 0x1 @@ -163,10 +170,11 @@ enum regnames { #define WPDAEN1 0x8 #define WPDCNTEN0 0x10 #define WPDCNTEN1 0x20 + #define WPDSRC0 0xc0 -#define WPDACC0 0x300 +#define WPDACC0_OFFSET 8 #define WPDSRC1 0xc00 -#define WPDACC1 0x3000 +#define WPDACC1_OFFSET 12 /* Watchpoint status register bits mask */ #define STATIA0 0x1 @@ -178,7 +186,4 @@ enum regnames { #define STATDA0 0x40 #define STATDA1 0x80 -extern void kgdb_print(const char *fmt, ...); -extern void init_kgdb_uart(void); - #endif diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c index a1f9641a6425..b795a207742c 100644 --- a/arch/blackfin/kernel/kgdb.c +++ b/arch/blackfin/kernel/kgdb.c @@ -1,32 +1,9 @@ /* - * File: arch/blackfin/kernel/kgdb.c - * Based on: - * Author: Sonic Zhang + * arch/blackfin/kernel/kgdb.c - Blackfin kgdb pieces * - * Created: - * Description: + * Copyright 2005-2008 Analog Devices Inc. * - * Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $ - * - * Modified: - * Copyright 2005-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ #include @@ -39,24 +16,29 @@ #include #include #include -#include #include #include +#include #include #include #include +#include /* Put the error code here just in case the user cares. */ -int gdb_bf533errcode; +int gdb_bfin_errcode; /* Likewise, the vector number here (since GDB only gets the signal number through the usual means, and that's not very specific). */ -int gdb_bf533vector = -1; +int gdb_bfin_vector = -1; #if KGDB_MAX_NO_CPUS != 8 #error change the definition of slavecpulocks #endif -void regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) +#ifdef CONFIG_BFIN_WDT +# error "Please unselect blackfin watchdog driver before build KGDB." +#endif + +void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) { gdb_regs[BFIN_R0] = regs->r0; gdb_regs[BFIN_R1] = regs->r1; @@ -133,7 +115,7 @@ void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) gdb_regs[BFIN_SEQSTAT] = p->thread.seqstat; } -void gdb_regs_to_regs(unsigned long *gdb_regs, struct pt_regs *regs) +void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs) { regs->r0 = gdb_regs[BFIN_R0]; regs->r1 = gdb_regs[BFIN_R1]; @@ -199,171 +181,208 @@ struct hw_breakpoint { unsigned int dataacc:2; unsigned short count; unsigned int addr; -} breakinfo[HW_BREAKPOINT_NUM]; +} breakinfo[HW_WATCHPOINT_NUM]; -int kgdb_arch_init(void) -{ - debugger_step = 0; - - kgdb_remove_all_hw_break(); - return 0; -} - -int kgdb_set_hw_break(unsigned long addr) +int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type) { int breakno; - for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) - if (!breakinfo[breakno].occupied) { + int bfin_type; + int dataacc = 0; + + switch (type) { + case BP_HARDWARE_BREAKPOINT: + bfin_type = TYPE_INST_WATCHPOINT; + break; + case BP_WRITE_WATCHPOINT: + dataacc = 1; + bfin_type = TYPE_DATA_WATCHPOINT; + break; + case BP_READ_WATCHPOINT: + dataacc = 2; + bfin_type = TYPE_DATA_WATCHPOINT; + break; + case BP_ACCESS_WATCHPOINT: + dataacc = 3; + bfin_type = TYPE_DATA_WATCHPOINT; + break; + default: + return -ENOSPC; + } + + /* Becasue hardware data watchpoint impelemented in current + * Blackfin can not trigger an exception event as the hardware + * instrction watchpoint does, we ignaore all data watch point here. + * They can be turned on easily after future blackfin design + * supports this feature. + */ + for (breakno = 0; breakno < HW_INST_WATCHPOINT_NUM; breakno++) + if (bfin_type == breakinfo[breakno].type + && !breakinfo[breakno].occupied) { breakinfo[breakno].occupied = 1; breakinfo[breakno].enabled = 1; - breakinfo[breakno].type = 1; breakinfo[breakno].addr = addr; + breakinfo[breakno].dataacc = dataacc; + breakinfo[breakno].count = 0; return 0; } return -ENOSPC; } -int kgdb_remove_hw_break(unsigned long addr) +int bfin_remove_hw_break(unsigned long addr, int len, enum kgdb_bptype type) { int breakno; - for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) - if (breakinfo[breakno].addr == addr) - memset(&(breakinfo[breakno]), 0, sizeof(struct hw_breakpoint)); + int bfin_type; + + switch (type) { + case BP_HARDWARE_BREAKPOINT: + bfin_type = TYPE_INST_WATCHPOINT; + break; + case BP_WRITE_WATCHPOINT: + case BP_READ_WATCHPOINT: + case BP_ACCESS_WATCHPOINT: + bfin_type = TYPE_DATA_WATCHPOINT; + break; + default: + return 0; + } + for (breakno = 0; breakno < HW_WATCHPOINT_NUM; breakno++) + if (bfin_type == breakinfo[breakno].type + && breakinfo[breakno].occupied + && breakinfo[breakno].addr == addr) { + breakinfo[breakno].occupied = 0; + breakinfo[breakno].enabled = 0; + } return 0; } -void kgdb_remove_all_hw_break(void) +void bfin_remove_all_hw_break(void) { - memset(breakinfo, 0, sizeof(struct hw_breakpoint)*8); -} + int breakno; -/* -void kgdb_show_info(void) -{ - printk(KERN_DEBUG "hwd: wpia0=0x%x, wpiacnt0=%d, wpiactl=0x%x, wpstat=0x%x\n", - bfin_read_WPIA0(), bfin_read_WPIACNT0(), - bfin_read_WPIACTL(), bfin_read_WPSTAT()); + memset(breakinfo, 0, sizeof(struct hw_breakpoint)*HW_WATCHPOINT_NUM); + + for (breakno = 0; breakno < HW_INST_WATCHPOINT_NUM; breakno++) + breakinfo[breakno].type = TYPE_INST_WATCHPOINT; + for (; breakno < HW_WATCHPOINT_NUM; breakno++) + breakinfo[breakno].type = TYPE_DATA_WATCHPOINT; } -*/ -void kgdb_correct_hw_break(void) +void bfin_correct_hw_break(void) { int breakno; - int correctit; - uint32_t wpdactl = bfin_read_WPDACTL(); + unsigned int wpiactl = 0; + unsigned int wpdactl = 0; + int enable_wp = 0; + + for (breakno = 0; breakno < HW_WATCHPOINT_NUM; breakno++) + if (breakinfo[breakno].enabled) { + enable_wp = 1; - correctit = 0; - for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) { - if (breakinfo[breakno].type == 1) { switch (breakno) { case 0: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN0)) { - correctit = 1; - wpdactl &= ~(WPIREN01|EMUSW0); - wpdactl |= WPIAEN0|WPICNTEN0; - bfin_write_WPIA0(breakinfo[breakno].addr); - bfin_write_WPIACNT0(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN0)) { - correctit = 1; - wpdactl &= ~WPIAEN0; - } + wpiactl |= WPIAEN0|WPICNTEN0; + bfin_write_WPIA0(breakinfo[breakno].addr); + bfin_write_WPIACNT0(breakinfo[breakno].count + + breakinfo->skip); break; - case 1: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN1)) { - correctit = 1; - wpdactl &= ~(WPIREN01|EMUSW1); - wpdactl |= WPIAEN1|WPICNTEN1; - bfin_write_WPIA1(breakinfo[breakno].addr); - bfin_write_WPIACNT1(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN1)) { - correctit = 1; - wpdactl &= ~WPIAEN1; - } + wpiactl |= WPIAEN1|WPICNTEN1; + bfin_write_WPIA1(breakinfo[breakno].addr); + bfin_write_WPIACNT1(breakinfo[breakno].count + + breakinfo->skip); break; - case 2: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN2)) { - correctit = 1; - wpdactl &= ~(WPIREN23|EMUSW2); - wpdactl |= WPIAEN2|WPICNTEN2; - bfin_write_WPIA2(breakinfo[breakno].addr); - bfin_write_WPIACNT2(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN2)) { - correctit = 1; - wpdactl &= ~WPIAEN2; - } + wpiactl |= WPIAEN2|WPICNTEN2; + bfin_write_WPIA2(breakinfo[breakno].addr); + bfin_write_WPIACNT2(breakinfo[breakno].count + + breakinfo->skip); break; - case 3: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN3)) { - correctit = 1; - wpdactl &= ~(WPIREN23|EMUSW3); - wpdactl |= WPIAEN3|WPICNTEN3; - bfin_write_WPIA3(breakinfo[breakno].addr); - bfin_write_WPIACNT3(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN3)) { - correctit = 1; - wpdactl &= ~WPIAEN3; - } + wpiactl |= WPIAEN3|WPICNTEN3; + bfin_write_WPIA3(breakinfo[breakno].addr); + bfin_write_WPIACNT3(breakinfo[breakno].count + + breakinfo->skip); break; case 4: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN4)) { - correctit = 1; - wpdactl &= ~(WPIREN45|EMUSW4); - wpdactl |= WPIAEN4|WPICNTEN4; - bfin_write_WPIA4(breakinfo[breakno].addr); - bfin_write_WPIACNT4(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN4)) { - correctit = 1; - wpdactl &= ~WPIAEN4; - } + wpiactl |= WPIAEN4|WPICNTEN4; + bfin_write_WPIA4(breakinfo[breakno].addr); + bfin_write_WPIACNT4(breakinfo[breakno].count + + breakinfo->skip); break; case 5: - if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN5)) { - correctit = 1; - wpdactl &= ~(WPIREN45|EMUSW5); - wpdactl |= WPIAEN5|WPICNTEN5; - bfin_write_WPIA5(breakinfo[breakno].addr); - bfin_write_WPIACNT5(breakinfo[breakno].skip); - } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN5)) { - correctit = 1; - wpdactl &= ~WPIAEN5; - } + wpiactl |= WPIAEN5|WPICNTEN5; + bfin_write_WPIA5(breakinfo[breakno].addr); + bfin_write_WPIACNT5(breakinfo[breakno].count + + breakinfo->skip); + break; + case 6: + wpdactl |= WPDAEN0|WPDCNTEN0|WPDSRC0; + wpdactl |= breakinfo[breakno].dataacc + << WPDACC0_OFFSET; + bfin_write_WPDA0(breakinfo[breakno].addr); + bfin_write_WPDACNT0(breakinfo[breakno].count + + breakinfo->skip); + break; + case 7: + wpdactl |= WPDAEN1|WPDCNTEN1|WPDSRC1; + wpdactl |= breakinfo[breakno].dataacc + << WPDACC1_OFFSET; + bfin_write_WPDA1(breakinfo[breakno].addr); + bfin_write_WPDACNT1(breakinfo[breakno].count + + breakinfo->skip); break; } } - } - if (correctit) { - wpdactl &= ~WPAND; - wpdactl |= WPPWR; - /*printk("correct_hw_break: wpdactl=0x%x\n", wpdactl);*/ + + /* Should enable WPPWR bit first before set any other + * WPIACTL and WPDACTL bits */ + if (enable_wp) { + bfin_write_WPIACTL(WPPWR); + CSYNC(); + bfin_write_WPIACTL(wpiactl|WPPWR); bfin_write_WPDACTL(wpdactl); CSYNC(); - /*kgdb_show_info();*/ } } void kgdb_disable_hw_debug(struct pt_regs *regs) { /* Disable hardware debugging while we are in kgdb */ - bfin_write_WPIACTL(bfin_read_WPIACTL() & ~0x1); + bfin_write_WPIACTL(0); + bfin_write_WPDACTL(0); CSYNC(); } -void kgdb_post_master_code(struct pt_regs *regs, int eVector, int err_code) +#ifdef CONFIG_SMP +void kgdb_passive_cpu_callback(void *info) +{ + kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs()); +} + +void kgdb_roundup_cpus(unsigned long flags) +{ + smp_call_function(kgdb_passive_cpu_callback, NULL, 0, 0); +} + +void kgdb_roundup_cpu(int cpu, unsigned long flags) +{ + smp_call_function_single(cpu, kgdb_passive_cpu_callback, NULL, 0, 0); +} +#endif + +void kgdb_post_primary_code(struct pt_regs *regs, int eVector, int err_code) { /* Master processor is completely in the debugger */ - gdb_bf533vector = eVector; - gdb_bf533errcode = err_code; + gdb_bfin_vector = eVector; + gdb_bfin_errcode = err_code; } -int kgdb_arch_handle_exception(int exceptionVector, int signo, +int kgdb_arch_handle_exception(int vector, int signo, int err_code, char *remcom_in_buffer, char *remcom_out_buffer, - struct pt_regs *linux_regs) + struct pt_regs *regs) { long addr; long breakno; @@ -385,44 +404,40 @@ int kgdb_arch_handle_exception(int exceptionVector, int signo, /* try to read optional parameter, pc unchanged if no parm */ ptr = &remcom_in_buffer[1]; if (kgdb_hex2long(&ptr, &addr)) { - linux_regs->retx = addr; + regs->retx = addr; } - newPC = linux_regs->retx; + newPC = regs->retx; /* clear the trace bit */ - linux_regs->syscfg &= 0xfffffffe; + regs->syscfg &= 0xfffffffe; /* set the trace bit if we're stepping */ if (remcom_in_buffer[0] == 's') { - linux_regs->syscfg |= 0x1; - debugger_step = linux_regs->ipend; - debugger_step >>= 6; - for (i = 10; i > 0; i--, debugger_step >>= 1) - if (debugger_step & 1) + regs->syscfg |= 0x1; + kgdb_single_step = regs->ipend; + kgdb_single_step >>= 6; + for (i = 10; i > 0; i--, kgdb_single_step >>= 1) + if (kgdb_single_step & 1) break; /* i indicate event priority of current stopped instruction * user space instruction is 0, IVG15 is 1, IVTMR is 10. - * debugger_step > 0 means in single step mode + * kgdb_single_step > 0 means in single step mode */ - debugger_step = i + 1; - } else { - debugger_step = 0; + kgdb_single_step = i + 1; } - wp_status = bfin_read_WPSTAT(); - CSYNC(); - - if (exceptionVector == VEC_WATCH) { - for (breakno = 0; breakno < 6; ++breakno) { + if (vector == VEC_WATCH) { + wp_status = bfin_read_WPSTAT(); + for (breakno = 0; breakno < HW_WATCHPOINT_NUM; breakno++) { if (wp_status & (1 << breakno)) { breakinfo->skip = 1; break; } } + bfin_write_WPSTAT(0); } - kgdb_correct_hw_break(); - bfin_write_WPSTAT(0); + bfin_correct_hw_break(); return 0; } /* switch */ @@ -431,5 +446,385 @@ int kgdb_arch_handle_exception(int exceptionVector, int signo, struct kgdb_arch arch_kgdb_ops = { .gdb_bpt_instr = {0xa1}, +#ifdef CONFIG_SMP + .flags = KGDB_HW_BREAKPOINT|KGDB_THR_PROC_SWAP, +#else .flags = KGDB_HW_BREAKPOINT, +#endif + .set_hw_breakpoint = bfin_set_hw_break, + .remove_hw_breakpoint = bfin_remove_hw_break, + .remove_all_hw_break = bfin_remove_all_hw_break, + .correct_hw_break = bfin_correct_hw_break, }; + +static int hex(char ch) +{ + if ((ch >= 'a') && (ch <= 'f')) + return ch - 'a' + 10; + if ((ch >= '0') && (ch <= '9')) + return ch - '0'; + if ((ch >= 'A') && (ch <= 'F')) + return ch - 'A' + 10; + return -1; +} + +static int validate_memory_access_address(unsigned long addr, int size) +{ + int cpu = raw_smp_processor_id(); + + if (size < 0) + return EFAULT; + if (addr >= 0x1000 && (addr + size) <= physical_mem_end) + return 0; + if (addr >= SYSMMR_BASE) + return 0; + if (addr >= ASYNC_BANK0_BASE + && addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) + return 0; + if (cpu == 0) { + if (addr >= L1_SCRATCH_START + && (addr + size <= L1_SCRATCH_START + L1_SCRATCH_LENGTH)) + return 0; +#if L1_CODE_LENGTH != 0 + if (addr >= L1_CODE_START + && (addr + size <= L1_CODE_START + L1_CODE_LENGTH)) + return 0; +#endif +#if L1_DATA_A_LENGTH != 0 + if (addr >= L1_DATA_A_START + && (addr + size <= L1_DATA_A_START + L1_DATA_A_LENGTH)) + return 0; +#endif +#if L1_DATA_B_LENGTH != 0 + if (addr >= L1_DATA_B_START + && (addr + size <= L1_DATA_B_START + L1_DATA_B_LENGTH)) + return 0; +#endif +#ifdef CONFIG_SMP + } else if (cpu == 1) { + if (addr >= COREB_L1_SCRATCH_START + && (addr + size <= COREB_L1_SCRATCH_START + + L1_SCRATCH_LENGTH)) + return 0; +# if L1_CODE_LENGTH != 0 + if (addr >= COREB_L1_CODE_START + && (addr + size <= COREB_L1_CODE_START + L1_CODE_LENGTH)) + return 0; +# endif +# if L1_DATA_A_LENGTH != 0 + if (addr >= COREB_L1_DATA_A_START + && (addr + size <= COREB_L1_DATA_A_START + L1_DATA_A_LENGTH)) + return 0; +# endif +# if L1_DATA_B_LENGTH != 0 + if (addr >= COREB_L1_DATA_B_START + && (addr + size <= COREB_L1_DATA_B_START + L1_DATA_B_LENGTH)) + return 0; +# endif +#endif + } + +#if L2_LENGTH != 0 + if (addr >= L2_START + && addr + size <= L2_START + L2_LENGTH) + return 0; +#endif + + return EFAULT; +} + +/* + * Convert the memory pointed to by mem into hex, placing result in buf. + * Return a pointer to the last char put in buf (null). May return an error. + */ +int kgdb_mem2hex(char *mem, char *buf, int count) +{ + char *tmp; + int err = 0; + unsigned char *pch; + unsigned short mmr16; + unsigned long mmr32; + int cpu = raw_smp_processor_id(); + + if (validate_memory_access_address((unsigned long)mem, count)) + return EFAULT; + + /* + * We use the upper half of buf as an intermediate buffer for the + * raw memory copy. Hex conversion will work against this one. + */ + tmp = buf + count; + + if ((unsigned int)mem >= SYSMMR_BASE) { /*access MMR registers*/ + switch (count) { + case 2: + if ((unsigned int)mem % 2 == 0) { + mmr16 = *(unsigned short *)mem; + pch = (unsigned char *)&mmr16; + *tmp++ = *pch++; + *tmp++ = *pch++; + tmp -= 2; + } else + err = EFAULT; + break; + case 4: + if ((unsigned int)mem % 4 == 0) { + mmr32 = *(unsigned long *)mem; + pch = (unsigned char *)&mmr32; + *tmp++ = *pch++; + *tmp++ = *pch++; + *tmp++ = *pch++; + *tmp++ = *pch++; + tmp -= 4; + } else + err = EFAULT; + break; + default: + err = EFAULT; + } + } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START && + (unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH +#ifdef CONFIG_SMP + || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START && + (unsigned int)(mem + count) <= + COREB_L1_CODE_START + L1_CODE_LENGTH +#endif + ) { + /* access L1 instruction SRAM*/ + if (dma_memcpy(tmp, mem, count) == NULL) + err = EFAULT; + } else + err = probe_kernel_read(tmp, mem, count); + + if (!err) { + while (count > 0) { + buf = pack_hex_byte(buf, *tmp); + tmp++; + count--; + } + + *buf = 0; + } + + return err; +} + +/* + * Copy the binary array pointed to by buf into mem. Fix $, #, and + * 0x7d escaped with 0x7d. Return a pointer to the character after + * the last byte written. + */ +int kgdb_ebin2mem(char *buf, char *mem, int count) +{ + char *tmp_old; + char *tmp_new; + unsigned short *mmr16; + unsigned long *mmr32; + int err = 0; + int size = 0; + int cpu = raw_smp_processor_id(); + + tmp_old = tmp_new = buf; + + while (count-- > 0) { + if (*tmp_old == 0x7d) + *tmp_new = *(++tmp_old) ^ 0x20; + else + *tmp_new = *tmp_old; + tmp_new++; + tmp_old++; + size++; + } + + if (validate_memory_access_address((unsigned long)mem, size)) + return EFAULT; + + if ((unsigned int)mem >= SYSMMR_BASE) { /*access MMR registers*/ + switch (size) { + case 2: + if ((unsigned int)mem % 2 == 0) { + mmr16 = (unsigned short *)buf; + *(unsigned short *)mem = *mmr16; + } else + return EFAULT; + break; + case 4: + if ((unsigned int)mem % 4 == 0) { + mmr32 = (unsigned long *)buf; + *(unsigned long *)mem = *mmr32; + } else + return EFAULT; + break; + default: + return EFAULT; + } + } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START && + (unsigned int)(mem + count) < L1_CODE_START + L1_CODE_LENGTH +#ifdef CONFIG_SMP + || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START && + (unsigned int)(mem + count) <= + COREB_L1_CODE_START + L1_CODE_LENGTH +#endif + ) { + /* access L1 instruction SRAM */ + if (dma_memcpy(mem, buf, size) == NULL) + err = EFAULT; + } else + err = probe_kernel_write(mem, buf, size); + + return err; +} + +/* + * Convert the hex array pointed to by buf into binary to be placed in mem. + * Return a pointer to the character AFTER the last byte written. + * May return an error. + */ +int kgdb_hex2mem(char *buf, char *mem, int count) +{ + char *tmp_raw; + char *tmp_hex; + unsigned short *mmr16; + unsigned long *mmr32; + int cpu = raw_smp_processor_id(); + + if (validate_memory_access_address((unsigned long)mem, count)) + return EFAULT; + + /* + * We use the upper half of buf as an intermediate buffer for the + * raw memory that is converted from hex. + */ + tmp_raw = buf + count * 2; + + tmp_hex = tmp_raw - 1; + while (tmp_hex >= buf) { + tmp_raw--; + *tmp_raw = hex(*tmp_hex--); + *tmp_raw |= hex(*tmp_hex--) << 4; + } + + if ((unsigned int)mem >= SYSMMR_BASE) { /*access MMR registers*/ + switch (count) { + case 2: + if ((unsigned int)mem % 2 == 0) { + mmr16 = (unsigned short *)tmp_raw; + *(unsigned short *)mem = *mmr16; + } else + return EFAULT; + break; + case 4: + if ((unsigned int)mem % 4 == 0) { + mmr32 = (unsigned long *)tmp_raw; + *(unsigned long *)mem = *mmr32; + } else + return EFAULT; + break; + default: + return EFAULT; + } + } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START && + (unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH +#ifdef CONFIG_SMP + || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START && + (unsigned int)(mem + count) <= + COREB_L1_CODE_START + L1_CODE_LENGTH +#endif + ) { + /* access L1 instruction SRAM */ + if (dma_memcpy(mem, tmp_raw, count) == NULL) + return EFAULT; + } else + return probe_kernel_write(mem, tmp_raw, count); + return 0; +} + +int kgdb_validate_break_address(unsigned long addr) +{ + int cpu = raw_smp_processor_id(); + + if (addr >= 0x1000 && (addr + BREAK_INSTR_SIZE) <= physical_mem_end) + return 0; + if (addr >= ASYNC_BANK0_BASE + && addr + BREAK_INSTR_SIZE <= ASYNC_BANK3_BASE + ASYNC_BANK3_BASE) + return 0; +#if L1_CODE_LENGTH != 0 + if (cpu == 0 && addr >= L1_CODE_START + && addr + BREAK_INSTR_SIZE <= L1_CODE_START + L1_CODE_LENGTH) + return 0; +# ifdef CONFIG_SMP + else if (cpu == 1 && addr >= COREB_L1_CODE_START + && addr + BREAK_INSTR_SIZE <= COREB_L1_CODE_START + L1_CODE_LENGTH) + return 0; +# endif +#endif +#if L2_LENGTH != 0 + if (addr >= L2_START + && addr + BREAK_INSTR_SIZE <= L2_START + L2_LENGTH) + return 0; +#endif + + return EFAULT; +} + +int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr) +{ + int err; + int cpu = raw_smp_processor_id(); + + if ((cpu == 0 && (unsigned int)addr >= L1_CODE_START + && (unsigned int)(addr + BREAK_INSTR_SIZE) + < L1_CODE_START + L1_CODE_LENGTH) +#ifdef CONFIG_SMP + || (cpu == 1 && (unsigned int)addr >= COREB_L1_CODE_START + && (unsigned int)(addr + BREAK_INSTR_SIZE) + < COREB_L1_CODE_START + L1_CODE_LENGTH) +#endif + ) { + /* access L1 instruction SRAM */ + if (dma_memcpy(saved_instr, (void *)addr, BREAK_INSTR_SIZE) + == NULL) + return -EFAULT; + + if (dma_memcpy((void *)addr, arch_kgdb_ops.gdb_bpt_instr, + BREAK_INSTR_SIZE) == NULL) + return -EFAULT; + + return 0; + } else { + err = probe_kernel_read(saved_instr, (char *)addr, + BREAK_INSTR_SIZE); + if (err) + return err; + + return probe_kernel_write((char *)addr, + arch_kgdb_ops.gdb_bpt_instr, BREAK_INSTR_SIZE); + } +} + +int kgdb_arch_remove_breakpoint(unsigned long addr, char *bundle) +{ + if ((unsigned int)addr >= L1_CODE_START && + (unsigned int)(addr + BREAK_INSTR_SIZE) < + L1_CODE_START + L1_CODE_LENGTH) { + /* access L1 instruction SRAM */ + if (dma_memcpy((void *)addr, bundle, BREAK_INSTR_SIZE) == NULL) + return -EFAULT; + + return 0; + } else + return probe_kernel_write((char *)addr, + (char *)bundle, BREAK_INSTR_SIZE); +} + +int kgdb_arch_init(void) +{ + kgdb_single_step = 0; + + bfin_remove_all_hw_break(); + return 0; +} + +void kgdb_arch_exit(void) +{ +} diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index bd41fca315dd..8d561baef896 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c @@ -43,12 +43,11 @@ #include #ifdef CONFIG_KGDB -# include # include # define CHK_DEBUGGER_TRAP() \ do { \ - CHK_DEBUGGER(trapnr, sig, info.si_code, fp, ); \ + kgdb_handle_exception(trapnr, sig, info.si_code, fp); \ } while (0) # define CHK_DEBUGGER_TRAP_MAYBE() \ do { \ @@ -300,7 +299,7 @@ asmlinkage void trap_c(struct pt_regs *fp) info.si_code = SEGV_STACKFLOW; sig = SIGSEGV; printk(KERN_NOTICE EXC_0x03(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x04 - User Defined, Caught by default */ /* 0x05 - User Defined, Caught by default */ @@ -329,7 +328,7 @@ asmlinkage void trap_c(struct pt_regs *fp) info.si_code = TRAP_TRACEFLOW; sig = SIGTRAP; printk(KERN_NOTICE EXC_0x11(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x12 - Reserved, Caught by default */ /* 0x13 - Reserved, Caught by default */ @@ -351,35 +350,35 @@ asmlinkage void trap_c(struct pt_regs *fp) info.si_code = ILL_ILLOPC; sig = SIGILL; printk(KERN_NOTICE EXC_0x21(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x22 - Illegal Instruction Combination, handled here */ case VEC_ILGAL_I: info.si_code = ILL_ILLPARAOP; sig = SIGILL; printk(KERN_NOTICE EXC_0x22(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x23 - Data CPLB protection violation, handled here */ case VEC_CPLB_VL: info.si_code = ILL_CPLB_VI; sig = SIGBUS; printk(KERN_NOTICE EXC_0x23(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x24 - Data access misaligned, handled here */ case VEC_MISALI_D: info.si_code = BUS_ADRALN; sig = SIGBUS; printk(KERN_NOTICE EXC_0x24(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x25 - Unrecoverable Event, handled here */ case VEC_UNCOV: info.si_code = ILL_ILLEXCPT; sig = SIGILL; printk(KERN_NOTICE EXC_0x25(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x26 - Data CPLB Miss, normal case is handled in _cplb_hdr, error case is handled here */ @@ -387,7 +386,6 @@ asmlinkage void trap_c(struct pt_regs *fp) info.si_code = BUS_ADRALN; sig = SIGBUS; printk(KERN_NOTICE EXC_0x26(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); break; /* 0x27 - Data CPLB Multiple Hits - Linux Trap Zero, handled here */ case VEC_CPLB_MHIT: @@ -399,7 +397,7 @@ asmlinkage void trap_c(struct pt_regs *fp) else #endif printk(KERN_NOTICE EXC_0x27(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x28 - Emulation Watchpoint, handled here */ case VEC_WATCH: @@ -418,7 +416,7 @@ asmlinkage void trap_c(struct pt_regs *fp) info.si_code = BUS_OPFETCH; sig = SIGBUS; printk(KERN_NOTICE "BF535: VEC_ISTRU_VL\n"); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; #else /* 0x29 - Reserved, Caught by default */ @@ -428,21 +426,20 @@ asmlinkage void trap_c(struct pt_regs *fp) info.si_code = BUS_ADRALN; sig = SIGBUS; printk(KERN_NOTICE EXC_0x2A(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x2B - Instruction CPLB protection violation, handled here */ case VEC_CPLB_I_VL: info.si_code = ILL_CPLB_VI; sig = SIGBUS; printk(KERN_NOTICE EXC_0x2B(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x2C - Instruction CPLB miss, handled in _cplb_hdr */ case VEC_CPLB_I_M: info.si_code = ILL_CPLB_MISS; sig = SIGBUS; printk(KERN_NOTICE EXC_0x2C(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); break; /* 0x2D - Instruction CPLB Multiple Hits, handled here */ case VEC_CPLB_I_MHIT: @@ -454,14 +451,14 @@ asmlinkage void trap_c(struct pt_regs *fp) else #endif printk(KERN_NOTICE EXC_0x2D(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x2E - Illegal use of Supervisor Resource, handled here */ case VEC_ILL_RES: info.si_code = ILL_PRVOPC; sig = SIGILL; printk(KERN_NOTICE EXC_0x2E(KERN_NOTICE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; /* 0x2F - Reserved, Caught by default */ /* 0x30 - Reserved, Caught by default */ @@ -508,14 +505,14 @@ asmlinkage void trap_c(struct pt_regs *fp) printk(KERN_NOTICE HWC_default(KERN_NOTICE)); break; } - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; default: info.si_code = TRAP_ILLTRAP; sig = SIGTRAP; printk(KERN_EMERG "Caught Unhandled Exception, code = %08lx\n", (fp->seqstat & SEQSTAT_EXCAUSE)); - CHK_DEBUGGER_TRAP(); + CHK_DEBUGGER_TRAP_MAYBE(); break; } diff --git a/arch/blackfin/mach-bf561/include/mach/mem_map.h b/arch/blackfin/mach-bf561/include/mach/mem_map.h index c26d8486cc4b..9d6674ad1e5e 100644 --- a/arch/blackfin/mach-bf561/include/mach/mem_map.h +++ b/arch/blackfin/mach-bf561/include/mach/mem_map.h @@ -35,9 +35,16 @@ /* Memory Map for ADSP-BF561 processors */ #ifdef CONFIG_BF561 -#define L1_CODE_START 0xFFA00000 -#define L1_DATA_A_START 0xFF800000 -#define L1_DATA_B_START 0xFF900000 +#define COREA_L1_CODE_START 0xFFA00000 +#define COREA_L1_DATA_A_START 0xFF800000 +#define COREA_L1_DATA_B_START 0xFF900000 +#define COREB_L1_CODE_START 0xFF600000 +#define COREB_L1_DATA_A_START 0xFF500000 +#define COREB_L1_DATA_B_START 0xFF400000 + +#define L1_CODE_START COREA_L1_CODE_START +#define L1_DATA_A_START COREA_L1_DATA_A_START +#define L1_DATA_B_START COREA_L1_DATA_B_START #define L1_CODE_LENGTH 0x4000 @@ -72,7 +79,10 @@ /* Scratch Pad Memory */ -#define L1_SCRATCH_START 0xFFB00000 +#define COREA_L1_SCRATCH_START 0xFFB00000 +#define COREB_L1_SCRATCH_START 0xFF700000 + +#define L1_SCRATCH_START COREA_L1_SCRATCH_START #define L1_SCRATCH_LENGTH 0x1000 #endif /* _MEM_MAP_533_H_ */ diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index 90c7397036ed..5a219b228de3 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S @@ -190,8 +190,8 @@ ENTRY(_ex_single_step) if cc jump .Lfind_priority_done; jump.s .Lfind_priority_start; .Lfind_priority_done: - p4.l = _debugger_step; - p4.h = _debugger_step; + p4.l = _kgdb_single_step; + p4.h = _kgdb_single_step; r6 = [p4]; cc = r6 == 0; if cc jump .Ldo_single_step; @@ -1071,7 +1071,12 @@ ENTRY(_ex_table) */ .long _ex_syscall /* 0x00 - User Defined - Linux Syscall */ .long _ex_soft_bp /* 0x01 - User Defined - Software breakpoint */ +#ifdef CONFIG_KGDB + .long _ex_trap_c /* 0x02 - User Defined - KGDB initial connection + and break signal trap */ +#else .long _ex_replaceable /* 0x02 - User Defined */ +#endif .long _ex_trap_c /* 0x03 - User Defined - userspace stack overflow */ .long _ex_trap_c /* 0x04 - User Defined - dump trace buffer */ .long _ex_replaceable /* 0x05 - User Defined */ diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 5fa536727c61..ff4d5c2879a5 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -1136,8 +1136,4 @@ void do_irq(int vec, struct pt_regs *fp) vec = ivg->irqno; } asm_do_IRQ(vec, fp); - -#ifdef CONFIG_KGDB - kgdb_process_breakpoint(); -#endif } -- cgit v1.2.3 From 5c64e0d5109532f8184be29c1dc163059e3ded4b Mon Sep 17 00:00:00 2001 From: Robin Getz Date: Wed, 8 Oct 2008 14:43:47 +0800 Subject: Blackfin arch: Better error handling of unknown exceptions Better error handling of unknown exceptions, allows userspace to do a EXCPT n instruction for a not installed exception handler, and the kernel doesn't crash (like it use to before this). Signed-off-by: Robin Getz Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/traps.h | 5 ++++- arch/blackfin/kernel/traps.c | 43 ++++++++++++++++++++++++++------------- 2 files changed, 33 insertions(+), 15 deletions(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/traps.h b/arch/blackfin/include/asm/traps.h index f0e5f940d9ca..34f7295fb070 100644 --- a/arch/blackfin/include/asm/traps.h +++ b/arch/blackfin/include/asm/traps.h @@ -59,6 +59,9 @@ level " or a 16-bit register is accessed with a 32-bit instruction.\n" #define HWC_x3(level) \ "External Memory Addressing Error\n" +#define EXC_0x04(level) \ + "Unimplmented exception occured\n" \ + level " - Maybe you forgot to install a custom exception handler?\n" #define HWC_x12(level) \ "Performance Monitor Overflow\n" #define HWC_x18(level) \ @@ -84,7 +87,7 @@ level " a particular processor implementation.\n" #define EXC_0x22(level) \ "Illegal instruction combination\n" \ - level " - See section for multi-issue rules in the ADSP-BF53x Blackfin\n" \ + level " - See section for multi-issue rules in the Blackfin\n" \ level " Processor Instruction Set Reference.\n" #define EXC_0x23(level) \ "Data access CPLB protection violation\n" \ diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index 8d561baef896..be5ae7fabc5f 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c @@ -301,18 +301,28 @@ asmlinkage void trap_c(struct pt_regs *fp) printk(KERN_NOTICE EXC_0x03(KERN_NOTICE)); CHK_DEBUGGER_TRAP_MAYBE(); break; - /* 0x04 - User Defined, Caught by default */ - /* 0x05 - User Defined, Caught by default */ - /* 0x06 - User Defined, Caught by default */ - /* 0x07 - User Defined, Caught by default */ - /* 0x08 - User Defined, Caught by default */ - /* 0x09 - User Defined, Caught by default */ - /* 0x0A - User Defined, Caught by default */ - /* 0x0B - User Defined, Caught by default */ - /* 0x0C - User Defined, Caught by default */ - /* 0x0D - User Defined, Caught by default */ - /* 0x0E - User Defined, Caught by default */ - /* 0x0F - User Defined, Caught by default */ + /* 0x04 - User Defined */ + /* 0x05 - User Defined */ + /* 0x06 - User Defined */ + /* 0x07 - User Defined */ + /* 0x08 - User Defined */ + /* 0x09 - User Defined */ + /* 0x0A - User Defined */ + /* 0x0B - User Defined */ + /* 0x0C - User Defined */ + /* 0x0D - User Defined */ + /* 0x0E - User Defined */ + /* 0x0F - User Defined */ + /* + * If we got here, it is most likely that someone was trying to use a + * custom exception handler, and it is not actually installed properly + */ + case VEC_EXCPT04 ... VEC_EXCPT15: + info.si_code = ILL_ILLPARAOP; + sig = SIGILL; + printk(KERN_NOTICE EXC_0x04(KERN_NOTICE)); + CHK_DEBUGGER_TRAP_MAYBE(); + break; /* 0x10 HW Single step, handled here */ case VEC_STEP: info.si_code = TRAP_STEP; @@ -507,9 +517,14 @@ asmlinkage void trap_c(struct pt_regs *fp) } CHK_DEBUGGER_TRAP_MAYBE(); break; + /* + * We should be handling all known exception types above, + * if we get here we hit a reserved one, so panic + */ default: - info.si_code = TRAP_ILLTRAP; - sig = SIGTRAP; + oops_in_progress = 1; + info.si_code = ILL_ILLPARAOP; + sig = SIGILL; printk(KERN_EMERG "Caught Unhandled Exception, code = %08lx\n", (fp->seqstat & SEQSTAT_EXCAUSE)); CHK_DEBUGGER_TRAP_MAYBE(); -- cgit v1.2.3 From ca87b7ad00a620f259048fdfb27dc2a5384c1e4e Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Wed, 8 Oct 2008 17:30:01 +0800 Subject: Blackfin arch: add CONFIG_APP_STACKS_L1 to enable or disable putting kernel stacks in L1 use CONFIG_APP_STACKS_L1 to enable or disable putting kernel stacks in L1, default is enabled, SMP kernel need turn it off Signed-off-by: Graf Yang Signed-off-by: Bryan Wu --- arch/blackfin/Kconfig | 9 ++++ arch/blackfin/include/asm/mmu_context.h | 79 ++++++++++++++++++--------------- 2 files changed, 51 insertions(+), 37 deletions(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index c507a92cb289..9d936a3986c8 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -629,6 +629,15 @@ config CPLB_SWITCH_TAB_L1 If enabled, the CPLB Switch Tables are linked into L1 data memory. (less latency) +config APP_STACK_L1 + bool "Support locating application stack in L1 Scratch Memory" + default y + help + If enabled the application stack can be located in L1 + scratch memory (less latency). + + Currently only works with FLAT binaries. + comment "Speed Optimizations" config BFIN_INS_LOWOVERHEAD bool "ins[bwl] low overhead, higher interrupt latency" diff --git a/arch/blackfin/include/asm/mmu_context.h b/arch/blackfin/include/asm/mmu_context.h index 8529552a981f..35593dda2a4d 100644 --- a/arch/blackfin/include/asm/mmu_context.h +++ b/arch/blackfin/include/asm/mmu_context.h @@ -45,49 +45,12 @@ extern unsigned long l1_stack_len; extern int l1sram_free(const void*); extern void *l1sram_alloc_max(void*); -static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) -{ -} - -/* Called when creating a new context during fork() or execve(). */ -static inline int -init_new_context(struct task_struct *tsk, struct mm_struct *mm) -{ -#ifdef CONFIG_MPU - unsigned long p = __get_free_pages(GFP_KERNEL, page_mask_order); - mm->context.page_rwx_mask = (unsigned long *)p; - memset(mm->context.page_rwx_mask, 0, - page_mask_nelts * 3 * sizeof(long)); -#endif - return 0; -} - static inline void free_l1stack(void) { nr_l1stack_tasks--; if (nr_l1stack_tasks == 0) l1sram_free(l1_stack_base); } -static inline void destroy_context(struct mm_struct *mm) -{ - struct sram_list_struct *tmp; - - if (current_l1_stack_save == mm->context.l1_stack_save) - current_l1_stack_save = NULL; - if (mm->context.l1_stack_save) - free_l1stack(); - - while ((tmp = mm->context.sram_list)) { - mm->context.sram_list = tmp->next; - sram_free(tmp->addr); - kfree(tmp); - } -#ifdef CONFIG_MPU - if (current_rwx_mask == mm->context.page_rwx_mask) - current_rwx_mask = NULL; - free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order); -#endif -} static inline unsigned long alloc_l1stack(unsigned long length, unsigned long *stack_base) @@ -134,6 +97,7 @@ static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_m } #endif +#ifdef CONFIG_APP_STACK_L1 /* L1 stack switching. */ if (!next_mm->context.l1_stack_save) return; @@ -144,6 +108,7 @@ static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_m } current_l1_stack_save = next_mm->context.l1_stack_save; memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len); +#endif } #ifdef CONFIG_MPU @@ -180,4 +145,44 @@ static inline void update_protections(struct mm_struct *mm) } #endif +static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) +{ +} + +/* Called when creating a new context during fork() or execve(). */ +static inline int +init_new_context(struct task_struct *tsk, struct mm_struct *mm) +{ +#ifdef CONFIG_MPU + unsigned long p = __get_free_pages(GFP_KERNEL, page_mask_order); + mm->context.page_rwx_mask = (unsigned long *)p; + memset(mm->context.page_rwx_mask, 0, + page_mask_nelts * 3 * sizeof(long)); +#endif + return 0; +} + +static inline void destroy_context(struct mm_struct *mm) +{ + struct sram_list_struct *tmp; + +#ifdef CONFIG_APP_STACK_L1 + if (current_l1_stack_save == mm->context.l1_stack_save) + current_l1_stack_save = 0; + if (mm->context.l1_stack_save) + free_l1stack(); +#endif + + while ((tmp = mm->context.sram_list)) { + mm->context.sram_list = tmp->next; + sram_free(tmp->addr); + kfree(tmp); + } +#ifdef CONFIG_MPU + if (current_rwx_mask == mm->context.page_rwx_mask) + current_rwx_mask = NULL; + free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order); +#endif +} + #endif -- cgit v1.2.3 From 5b04f271fe49bb7adb061de454d383c027a18de0 Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Wed, 8 Oct 2008 17:32:57 +0800 Subject: Blackfin arch: Modify some funtion names to more genernal ones Signed-off-by: Graf Yang Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/cplbinit.h | 2 +- arch/blackfin/kernel/cplb-mpu/cplbinit.c | 2 +- arch/blackfin/kernel/cplb-nompu/cplbinit.c | 2 +- arch/blackfin/kernel/setup.c | 8 ++++---- arch/blackfin/mach-common/head.S | 2 +- 5 files changed, 8 insertions(+), 8 deletions(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/cplbinit.h b/arch/blackfin/include/asm/cplbinit.h index 0eb1c1b685a7..9d23cd1ff7d9 100644 --- a/arch/blackfin/include/asm/cplbinit.h +++ b/arch/blackfin/include/asm/cplbinit.h @@ -90,6 +90,6 @@ extern u_long dpdt_swapcount_table[]; extern unsigned long reserved_mem_dcache_on; extern unsigned long reserved_mem_icache_on; -extern void generate_cpl_tables(void); +extern void generate_cplb_tables(void); #endif diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c index 48060105346a..d4257d0ad6a8 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c @@ -36,7 +36,7 @@ struct cplb_entry dcplb_tbl[MAX_CPLBS]; int first_switched_icplb, first_switched_dcplb; int first_mask_dcplb; -void __init generate_cpl_tables(void) +void __init generate_cplb_tables(void) { int i_d, i_i; unsigned long addr; diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 728f708d3981..2c45c16c3520 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c @@ -308,7 +308,7 @@ __fill_data_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_end) } } -void __init generate_cpl_tables(void) +void __init generate_cplb_tables(void) { u16 i, j, process; diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 8e639dc886a3..ea4f60978c66 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -78,10 +78,10 @@ static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata; static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata; static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata; -void __init bf53x_cache_init(void) +void __init bfin_cache_init(void) { #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE) - generate_cpl_tables(); + generate_cplb_tables(); #endif #ifdef CONFIG_BFIN_ICACHE @@ -101,7 +101,7 @@ void __init bf53x_cache_init(void) #endif } -void __init bf53x_relocate_l1_mem(void) +void __init bfin_relocate_l1_mem(void) { unsigned long l1_code_length; unsigned long l1_data_a_length; @@ -860,7 +860,7 @@ void __init setup_arch(char **cmdline_p) != SAFE_USER_INSTRUCTION - FIXED_CODE_START); init_exception_vectors(); - bf53x_cache_init(); + bfin_cache_init(); } static int __init topology_init(void) diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S index 7cb21cfcbf28..eb9eef0e23b7 100644 --- a/arch/blackfin/mach-common/head.S +++ b/arch/blackfin/mach-common/head.S @@ -141,7 +141,7 @@ ENTRY(__start) #endif /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ - call _bf53x_relocate_l1_mem; + call _bfin_relocate_l1_mem; #ifdef CONFIG_BFIN_KERNEL_CLOCK call _start_dma_code; #endif -- cgit v1.2.3 From 9df10281e1c03b1c04d17f387bc59eb932c0bb87 Mon Sep 17 00:00:00 2001 From: Robin Getz Date: Wed, 8 Oct 2008 18:03:33 +0800 Subject: Blackfin arch: Use DTEST rather than DMA to poke at L1 SRAM during exception context Signed-off-by: Robin Getz Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/bfin-global.h | 2 + arch/blackfin/kernel/traps.c | 3 +- arch/blackfin/mach-common/head.S | 10 ++ arch/blackfin/mm/Makefile | 2 +- arch/blackfin/mm/isram-driver.c | 201 ++++++++++++++++++++++++++++++++ 5 files changed, 215 insertions(+), 3 deletions(-) create mode 100644 arch/blackfin/mm/isram-driver.c (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h index 7ba70de66f2b..e1f9cbd00a09 100644 --- a/arch/blackfin/include/asm/bfin-global.h +++ b/arch/blackfin/include/asm/bfin-global.h @@ -92,6 +92,8 @@ extern int sram_free(const void*); extern void *sram_alloc_with_lsl(size_t, unsigned long); extern int sram_free_with_lsl(const void*); +extern void *isram_memcpy(void *dest, const void *src, size_t n); + extern const char bfin_board_name[]; extern unsigned long bfin_sic_iwr[]; diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index 0112ba407f63..89cff2c7e8b1 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c @@ -40,7 +40,6 @@ #include #include #include -#include #ifdef CONFIG_KGDB # include @@ -632,7 +631,7 @@ bool get_instruction(unsigned short *val, unsigned short *address) #if L1_CODE_LENGTH != 0 if (addr >= L1_CODE_START && (addr + 2) <= (L1_CODE_START + L1_CODE_LENGTH)) { - dma_memcpy(val, address, 2); + isram_memcpy(val, address, 2); return true; } #endif diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S index eb9eef0e23b7..3069df580729 100644 --- a/arch/blackfin/mach-common/head.S +++ b/arch/blackfin/mach-common/head.S @@ -68,6 +68,16 @@ ENTRY(__start) M2 = r0; M3 = r0; + /* + * Clear ITEST_COMMAND and DTEST_COMMAND registers, + * Leaving these as non-zero can confuse the emulator + */ + p0.L = LO(DTEST_COMMAND); + p0.H = HI(DTEST_COMMAND); + [p0] = R0; + [p0 + (ITEST_COMMAND - DTEST_COMMAND)] = R0; + CSYNC; + trace_buffer_init(p0,r0); P0 = R1; R0 = R1; diff --git a/arch/blackfin/mm/Makefile b/arch/blackfin/mm/Makefile index 81aacbc32d3c..d489f894f4b1 100644 --- a/arch/blackfin/mm/Makefile +++ b/arch/blackfin/mm/Makefile @@ -2,4 +2,4 @@ # arch/blackfin/mm/Makefile # -obj-y := sram-alloc.o init.o +obj-y := sram-alloc.o isram-driver.o init.o diff --git a/arch/blackfin/mm/isram-driver.c b/arch/blackfin/mm/isram-driver.c new file mode 100644 index 000000000000..22913e7a1818 --- /dev/null +++ b/arch/blackfin/mm/isram-driver.c @@ -0,0 +1,201 @@ +/* + * Description: Instruction SRAM accessor functions for the Blackfin + * + * Copyright 2008 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include + +#include + +/* + * IMPORTANT WARNING ABOUT THESE FUNCTIONS + * + * The emulator will not function correctly if a write command is left in + * ITEST_COMMAND or DTEST_COMMAND AND access to cache memory is needed by + * the emulator. To avoid such problems, ensure that both ITEST_COMMAND + * and DTEST_COMMAND are zero when exiting these functions. + */ + + +/* + * On the Blackfin, L1 instruction sram (which operates at core speeds) can not + * be accessed by a normal core load, so we need to go through a few hoops to + * read/write it. + * To try to make it easier - we export a memcpy interface, where either src or + * dest can be in this special L1 memory area. + * The low level read/write functions should not be exposed to the rest of the + * kernel, since they operate on 64-bit data, and need specific address alignment + */ + +static DEFINE_SPINLOCK(dtest_lock); + +/* Takes a void pointer */ +#define IADDR2DTEST(x) \ + ({ unsigned long __addr = (unsigned long)(x); \ + (__addr & 0x47F8) | /* address bits 14 & 10:3 */ \ + (__addr & 0x0800) << 15 | /* address bit 11 */ \ + (__addr & 0x3000) << 4 | /* address bits 13:12 */ \ + (__addr & 0x8000) << 8 | /* address bit 15 */ \ + (0x1000004); /* isram access */ \ + }) + +/* Takes a pointer, and returns the offset (in bits) which things should be shifted */ +#define ADDR2OFFSET(x) ((((unsigned long)(x)) & 0x7) * 8) + +/* Takes a pointer, determines if it is the last byte in the isram 64-bit data type */ +#define ADDR2LAST(x) ((((unsigned long)x) & 0x7) == 0x7) + +static void isram_write(const void *addr, uint64_t data) +{ + uint32_t cmd; + unsigned long flags; + + if (addr >= (void *)(L1_CODE_START + L1_CODE_LENGTH)) + return; + + cmd = IADDR2DTEST(addr) | 1; /* write */ + + /* + * Writes to DTEST_DATA[0:1] need to be atomic with write to DTEST_COMMAND + * While in exception context - atomicity is guaranteed or double fault + */ + spin_lock_irqsave(&dtest_lock, flags); + + bfin_write_DTEST_DATA0(data & 0xFFFFFFFF); + bfin_write_DTEST_DATA1(data >> 32); + + /* use the builtin, since interrupts are already turned off */ + __builtin_bfin_csync(); + bfin_write_DTEST_COMMAND(cmd); + __builtin_bfin_csync(); + + bfin_write_DTEST_COMMAND(0); + __builtin_bfin_csync(); + + spin_unlock_irqrestore(&dtest_lock, flags); +} + +static uint64_t isram_read(const void *addr) +{ + uint32_t cmd; + unsigned long flags; + uint64_t ret; + + if (addr > (void *)(L1_CODE_START + L1_CODE_LENGTH)) + return 0; + + cmd = IADDR2DTEST(addr) | 0; /* read */ + + /* + * Reads of DTEST_DATA[0:1] need to be atomic with write to DTEST_COMMAND + * While in exception context - atomicity is guaranteed or double fault + */ + spin_lock_irqsave(&dtest_lock, flags); + /* use the builtin, since interrupts are already turned off */ + __builtin_bfin_csync(); + bfin_write_DTEST_COMMAND(cmd); + __builtin_bfin_csync(); + ret = bfin_read_DTEST_DATA0() | ((uint64_t)bfin_read_DTEST_DATA1() << 32); + + bfin_write_DTEST_COMMAND(0); + __builtin_bfin_csync(); + spin_unlock_irqrestore(&dtest_lock, flags); + + return ret; +} + +static bool isram_check_addr(const void *addr, size_t n) +{ + if ((addr >= (void *)L1_CODE_START) && + (addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))) { + if ((addr + n) >= (void *)(L1_CODE_START + L1_CODE_LENGTH)) { + show_stack(NULL, NULL); + printk(KERN_ERR "isram_memcpy: copy involving %p length " + "(%zu) too long\n", addr, n); + } + return true; + } + return false; +} + +/* + * The isram_memcpy() function copies n bytes from memory area src to memory area dest. + * The isram_memcpy() function returns a pointer to dest. + * Either dest or src can be in L1 instruction sram. + */ +void *isram_memcpy(void *dest, const void *src, size_t n) +{ + uint64_t data_in = 0, data_out = 0; + size_t count; + bool dest_in_l1, src_in_l1, need_data, put_data; + unsigned char byte, *src_byte, *dest_byte; + + src_byte = (unsigned char *)src; + dest_byte = (unsigned char *)dest; + + dest_in_l1 = isram_check_addr(dest, n); + src_in_l1 = isram_check_addr(src, n); + + need_data = true; + put_data = true; + for (count = 0; count < n; count++) { + if (src_in_l1) { + if (need_data) { + data_in = isram_read(src + count); + need_data = false; + } + + if (ADDR2LAST(src + count)) + need_data = true; + + byte = (unsigned char)((data_in >> ADDR2OFFSET(src + count)) & 0xff); + + } else { + /* src is in L2 or L3 - so just dereference*/ + byte = src_byte[count]; + } + + if (dest_in_l1) { + if (put_data) { + data_out = isram_read(dest + count); + put_data = false; + } + + data_out &= ~((uint64_t)0xff << ADDR2OFFSET(dest + count)); + data_out |= ((uint64_t)byte << ADDR2OFFSET(dest + count)); + + if (ADDR2LAST(dest + count)) { + put_data = true; + isram_write(dest + count, data_out); + } + } else { + /* dest in L2 or L3 - so just dereference */ + dest_byte[count] = byte; + } + } + + /* make sure we dump the last byte if necessary */ + if (dest_in_l1 && !put_data) + isram_write(dest + count, data_out); + + return dest; +} +EXPORT_SYMBOL(isram_memcpy); + -- cgit v1.2.3 From f099f39acf7575eff3dee3c562cec4e592876c33 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Thu, 9 Oct 2008 14:11:57 +0800 Subject: Blackfin arch: Make L2 SRAM cacheable Signed-off-by: Sonic Zhang Signed-off-by: Bryan Wu --- arch/blackfin/Kconfig | 7 +++++++ arch/blackfin/include/asm/cplb.h | 8 +++++++- arch/blackfin/kernel/cplb-mpu/cplbinit.c | 10 ++++++++++ arch/blackfin/kernel/cplb-nompu/cplbinit.c | 4 ++-- 4 files changed, 26 insertions(+), 3 deletions(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index 554ac5827c1d..10c97efbd91f 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -772,6 +772,13 @@ config BFIN_WT endchoice +config BFIN_L2_CACHEABLE + bool "Cache L2 SRAM" + depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || BF561) + default n + help + Select to make L2 SRAM cacheable in L1 data and instruction cache. + config MPU bool "Enable the memory protection unit (EXPERIMENTAL)" default n diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h index 05d6f05fb748..9e8b4035fcec 100644 --- a/arch/blackfin/include/asm/cplb.h +++ b/arch/blackfin/include/asm/cplb.h @@ -55,7 +55,13 @@ #endif #define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON) -#define L2_MEMORY (CPLB_COMMON) +#ifdef CONFIG_BFIN_L2_CACHEABLE +#define L2_IMEMORY (SDRAM_IGENERIC) +#define L2_DMEMORY (SDRAM_DGENERIC) +#else +#define L2_IMEMORY (CPLB_COMMON) +#define L2_DMEMORY (CPLB_COMMON) +#endif #define SDRAM_DNON_CHBL (CPLB_COMMON) #define SDRAM_EBIU (CPLB_COMMON) #define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY) diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c index d4257d0ad6a8..55af729f8495 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c @@ -83,8 +83,18 @@ void __init generate_cplb_tables(void) dcplb_tbl[i_d].addr = L1_DATA_A_START; dcplb_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; #endif +#if L1_CODE_LENGTH > 0 icplb_tbl[i_i].addr = L1_CODE_START; icplb_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; +#endif + + /* Cover L2 memory */ +#if L2_LENGTH > 0 + dcplb_tbl[i_d].addr = L2_START; + dcplb_tbl[i_d++].data = L2_DMEMORY | PAGE_SIZE_1MB; + icplb_tbl[i_i].addr = L2_START; + icplb_tbl[i_i++].data = L2_IMEMORY | PAGE_SIZE_1MB; +#endif first_mask_dcplb = i_d; first_switched_dcplb = i_d + (1 << page_mask_order); diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 2c45c16c3520..301252e84441 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c @@ -168,8 +168,8 @@ static struct cplb_desc cplb_data[] = { .end = L2_START + L2_LENGTH, .psize = SIZE_1M, .attr = SWITCH_T | I_CPLB | D_CPLB, - .i_conf = L2_MEMORY, - .d_conf = L2_MEMORY, + .i_conf = L2_IMEMORY, + .d_conf = L2_DMEMORY, .valid = (L2_LENGTH > 0), .name = "L2 Memory", }, -- cgit v1.2.3 From f5a817e3f707759882e423060badd2f2e52b66a4 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 9 Oct 2008 15:22:56 +0800 Subject: Blackfin arch: ptrace - make sure PT_ORIG_R0 and PT_ORIG_P0 offsets are declared Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/ptrace.h | 2 ++ arch/blackfin/kernel/asm-offsets.c | 1 + 2 files changed, 3 insertions(+) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/ptrace.h b/arch/blackfin/include/asm/ptrace.h index a45a80e54adc..e3f086dc7268 100644 --- a/arch/blackfin/include/asm/ptrace.h +++ b/arch/blackfin/include/asm/ptrace.h @@ -158,6 +158,8 @@ extern void show_regs(struct pt_regs *); #define PT_SEQSTAT 8 #define PT_IPEND 4 +#define PT_ORIG_R0 208 +#define PT_ORIG_P0 212 #define PT_SYSCFG 216 #define PT_TEXT_ADDR 220 #define PT_TEXT_END_ADDR 224 diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c index 881afe9082c7..9bb85dd5ccb3 100644 --- a/arch/blackfin/kernel/asm-offsets.c +++ b/arch/blackfin/kernel/asm-offsets.c @@ -60,6 +60,7 @@ int main(void) DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE); /* offsets into the pt_regs */ + DEFINE(PT_ORIG_R0, offsetof(struct pt_regs, orig_r0)); DEFINE(PT_ORIG_P0, offsetof(struct pt_regs, orig_p0)); DEFINE(PT_ORIG_PC, offsetof(struct pt_regs, orig_pc)); DEFINE(PT_R0, offsetof(struct pt_regs, r0)); -- cgit v1.2.3 From 6c3fc69a173868c0a3c20bc1bba5ede463b5029c Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 9 Oct 2008 17:13:39 +0800 Subject: Blackfin arch: avoid using actual config name in comment avoid using actual config name in comment as a text search is done to see what files need to be rebuilt Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/bfin-global.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h index e1f9cbd00a09..f842ea3bfc19 100644 --- a/arch/blackfin/include/asm/bfin-global.h +++ b/arch/blackfin/include/asm/bfin-global.h @@ -106,7 +106,7 @@ extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[], _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[], _ebss_l2[], _l2_lma_start[]; -/* only used when CONFIG_MTD_UCLINUX */ +/* only used when MTD_UCLINUX */ extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size; #ifdef CONFIG_BFIN_ICACHE_LOCK -- cgit v1.2.3 From e482cad241c0b7108cbc94959307a73d19ba17d5 Mon Sep 17 00:00:00 2001 From: Robin Getz Date: Fri, 10 Oct 2008 18:21:45 +0800 Subject: Blackfin arch: print out error/warning if you are running on the incorrect CPU type Signed-off-by: Robin Getz Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/processor.h | 6 ++++ arch/blackfin/kernel/setup.c | 43 +++++++++++++++++---------- arch/blackfin/mach-bf527/include/mach/bf527.h | 19 ++++++++++-- arch/blackfin/mach-bf533/include/mach/bf533.h | 10 +++---- arch/blackfin/mach-bf537/include/mach/bf537.h | 10 +++---- arch/blackfin/mach-bf548/include/mach/bf548.h | 23 +++++++------- arch/blackfin/mach-bf561/include/mach/bf561.h | 6 ++-- 7 files changed, 76 insertions(+), 41 deletions(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/processor.h b/arch/blackfin/include/asm/processor.h index 6f3995b119d8..e3e9b41fa8db 100644 --- a/arch/blackfin/include/asm/processor.h +++ b/arch/blackfin/include/asm/processor.h @@ -134,6 +134,12 @@ static inline uint32_t __pure bfin_revid(void) return revid; } +static inline uint16_t __pure bfin_cpuid(void) +{ + return (bfin_read_CHIPID() & CHIPID_FAMILY) >> 12; + +} + static inline uint32_t __pure bfin_compiled_revid(void) { #if defined(CONFIG_BF_REV_0_0) diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 4267523912bd..74370f3707b9 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -813,17 +813,23 @@ void __init setup_arch(char **cmdline_p) printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU); else printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid()); - if (bfin_revid() != bfin_compiled_revid()) { - if (bfin_compiled_revid() == -1) - printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n", - bfin_revid()); - else if (bfin_compiled_revid() != 0xffff) - printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n", - bfin_compiled_revid(), bfin_revid()); + + if (unlikely(CPUID != bfin_cpuid())) + printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n", + CPU, bfin_cpuid(), bfin_revid()); + else { + if (bfin_revid() != bfin_compiled_revid()) { + if (bfin_compiled_revid() == -1) + printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n", + bfin_revid()); + else if (bfin_compiled_revid() != 0xffff) + printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n", + bfin_compiled_revid(), bfin_revid()); + } + if (bfin_revid() <= CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX) + printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n", + CPU, bfin_revid()); } - if (bfin_revid() <= CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX) - printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n", - CPU, bfin_revid()); printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); @@ -997,13 +1003,18 @@ static int show_cpuinfo(struct seq_file *m, void *v) } seq_printf(m, "processor\t: %d\n" - "vendor_id\t: %s\n" - "cpu family\t: 0x%x\n" - "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n" - "stepping\t: %d\n", + "vendor_id\t: %s\n", *(unsigned int *)v, - vendor, - (bfin_read_CHIPID() & CHIPID_FAMILY), + vendor); + + if (CPUID == bfin_cpuid()) + seq_printf(m, "cpu family\t: 0x%04x\n", CPUID); + else + seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n", + CPUID, bfin_cpuid()); + + seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n" + "stepping\t: %d\n", cpu, cclk/1000000, sclk/1000000, #ifdef CONFIG_MPU "mpu on", diff --git a/arch/blackfin/mach-bf527/include/mach/bf527.h b/arch/blackfin/mach-bf527/include/mach/bf527.h index 330041fde546..144f08d3f8ea 100644 --- a/arch/blackfin/mach-bf527/include/mach/bf527.h +++ b/arch/blackfin/mach-bf527/include/mach/bf527.h @@ -110,16 +110,31 @@ #ifdef CONFIG_BF527 #define CPU "BF527" +#define CPUID 0x27e4 +#endif +#ifdef CONFIG_BF526 +#define CPU "BF526" +#define CPUID 0x27e4 #endif #ifdef CONFIG_BF525 #define CPU "BF525" +#define CPUID 0x27e4 +#endif +#ifdef CONFIG_BF524 +#define CPU "BF524" +#define CPUID 0x27e4 +#endif +#ifdef CONFIG_BF523 +#define CPU "BF523" +#define CPUID 0x27e4 #endif #ifdef CONFIG_BF522 #define CPU "BF522" +#define CPUID 0x27e4 #endif + #ifndef CPU -#define CPU "UNKNOWN" -#define CPUID 0x0 +#error Unknown CPU type - This kernel doesn't seem to be configured properly #endif #endif /* __MACH_BF527_H__ */ diff --git a/arch/blackfin/mach-bf533/include/mach/bf533.h b/arch/blackfin/mach-bf533/include/mach/bf533.h index 949801112303..dfc8c1ad2d7a 100644 --- a/arch/blackfin/mach-bf533/include/mach/bf533.h +++ b/arch/blackfin/mach-bf533/include/mach/bf533.h @@ -141,19 +141,19 @@ #ifdef CONFIG_BF533 #define CPU "BF533" -#define CPUID 0x027a5000 +#define CPUID 0x27a5 #endif #ifdef CONFIG_BF532 #define CPU "BF532" -#define CPUID 0x0275A000 +#define CPUID 0x275A #endif #ifdef CONFIG_BF531 #define CPU "BF531" -#define CPUID 0x027a5000 +#define CPUID 0x27a5 #endif + #ifndef CPU -#define CPU "UNKNOWN" -#define CPUID 0x0 +#error Unknown CPU type - This kernel doesn't seem to be configured properly #endif #endif /* __MACH_BF533_H__ */ diff --git a/arch/blackfin/mach-bf537/include/mach/bf537.h b/arch/blackfin/mach-bf537/include/mach/bf537.h index 7a047e04e383..24d5c9d42323 100644 --- a/arch/blackfin/mach-bf537/include/mach/bf537.h +++ b/arch/blackfin/mach-bf537/include/mach/bf537.h @@ -121,19 +121,19 @@ #ifdef CONFIG_BF537 #define CPU "BF537" -#define CPUID 0x027c8000 +#define CPUID 0x27c8 #endif #ifdef CONFIG_BF536 #define CPU "BF536" -#define CPUID 0x027c8000 +#define CPUID 0x27c8 #endif #ifdef CONFIG_BF534 #define CPU "BF534" -#define CPUID 0x027c6000 +#define CPUID 0x27c6 #endif + #ifndef CPU -#define CPU "UNKNOWN" -#define CPUID 0x0 +#error Unknown CPU type - This kernel doesn't seem to be configured properly #endif #endif /* __MACH_BF537_H__ */ diff --git a/arch/blackfin/mach-bf548/include/mach/bf548.h b/arch/blackfin/mach-bf548/include/mach/bf548.h index 14f8a7b84544..49f9b403d458 100644 --- a/arch/blackfin/mach-bf548/include/mach/bf548.h +++ b/arch/blackfin/mach-bf548/include/mach/bf548.h @@ -106,20 +106,23 @@ #if defined(CONFIG_BF542) # define CPU "BF542" -# define CPUID 0x027c8000 +# define CPUID 0x27de #elif defined(CONFIG_BF544) -# define CPU "BF544" -# define CPUID 0x027c8000 +# define CPU "BF544" +# define CPUID 0x27de #elif defined(CONFIG_BF547) -# define CPU "BF547" +# define CPU "BF547" +# define CPUID 0x27de #elif defined(CONFIG_BF548) -# define CPU "BF548" -# define CPUID 0x027c6000 +# define CPU "BF548" +# define CPUID 0x27de #elif defined(CONFIG_BF549) -# define CPU "BF549" -#else -# define CPU "UNKNOWN" -# define CPUID 0x0 +# define CPU "BF549" +# define CPUID 0x27de +#endif + +#ifndef CPU +#error Unknown CPU type - This kernel doesn't seem to be configured properly #endif #endif /* __MACH_BF48_H__ */ diff --git a/arch/blackfin/mach-bf561/include/mach/bf561.h b/arch/blackfin/mach-bf561/include/mach/bf561.h index 7787caad3555..18b1b3a223ab 100644 --- a/arch/blackfin/mach-bf561/include/mach/bf561.h +++ b/arch/blackfin/mach-bf561/include/mach/bf561.h @@ -211,11 +211,11 @@ #ifdef CONFIG_BF561 #define CPU "BF561" -#define CPUID 0x027bb000 +#define CPUID 0x27bb #endif + #ifndef CPU -#define CPU "UNKNOWN" -#define CPUID 0x0 +#error Unknown CPU type - This kernel doesn't seem to be configured properly #endif #endif /* __MACH_BF561_H__ */ -- cgit v1.2.3 From 9a6f5ae1f1f3c37aad938a1c82db248a3f95a629 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Fri, 10 Oct 2008 18:57:21 +0800 Subject: Blackfin arch: bfin_reset() is an internal reboot function ... everyone should go through machine_restart() Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/bfin-global.h | 1 - arch/blackfin/kernel/reboot.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h index f842ea3bfc19..56dcb0a2d244 100644 --- a/arch/blackfin/include/asm/bfin-global.h +++ b/arch/blackfin/include/asm/bfin-global.h @@ -63,7 +63,6 @@ extern void bfin_dcache_init(void); extern void init_exception_vectors(void); extern void program_IAR(void); -extern void bfin_reset(void); extern asmlinkage void lower_to_irq14(void); extern asmlinkage void bfin_return_from_exception(void); extern asmlinkage void evt14_softirq(void); diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c index b0a8f89cc9b6..d0ead640d992 100644 --- a/arch/blackfin/kernel/reboot.c +++ b/arch/blackfin/kernel/reboot.c @@ -20,7 +20,7 @@ * the core reset. */ __attribute__((l1_text)) -void bfin_reset(void) +static void bfin_reset(void) { /* Wait for completion of "system" events such as cache line * line fills so that we avoid infinite stalls later on as -- cgit v1.2.3 From cdbf4c3c5f4909767c21f47f68f2ee57a8b36b3b Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 13 Oct 2008 11:33:43 +0800 Subject: Blackfin arch: use the Blackfin on-chip ROM to do software reset when possible Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/bfrom.h | 85 +++++++++++++++++++++++++++++++++++++++ arch/blackfin/kernel/reboot.c | 10 ++++- 2 files changed, 94 insertions(+), 1 deletion(-) create mode 100644 arch/blackfin/include/asm/bfrom.h (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/bfrom.h b/arch/blackfin/include/asm/bfrom.h new file mode 100644 index 000000000000..cfe8024c3b2f --- /dev/null +++ b/arch/blackfin/include/asm/bfrom.h @@ -0,0 +1,85 @@ +/* Blackfin on-chip ROM API + * + * Copyright 2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#ifndef __BFROM_H__ +#define __BFROM_H__ + +#include + +/* Possible syscontrol action flags */ +#define SYSCTRL_READ 0x00000000 /* read registers */ +#define SYSCTRL_WRITE 0x00000001 /* write registers */ +#define SYSCTRL_SYSRESET 0x00000002 /* perform system reset */ +#define SYSCTRL_CORERESET 0x00000004 /* perform core reset */ +#define SYSCTRL_SOFTRESET 0x00000006 /* perform core and system reset */ +#define SYSCTRL_VRCTL 0x00000010 /* read/write VR_CTL register */ +#define SYSCTRL_EXTVOLTAGE 0x00000020 /* VDDINT supplied externally */ +#define SYSCTRL_INTVOLTAGE 0x00000000 /* VDDINT generated by on-chip regulator */ +#define SYSCTRL_OTPVOLTAGE 0x00000040 /* For Factory Purposes Only */ +#define SYSCTRL_PLLCTL 0x00000100 /* read/write PLL_CTL register */ +#define SYSCTRL_PLLDIV 0x00000200 /* read/write PLL_DIV register */ +#define SYSCTRL_LOCKCNT 0x00000400 /* read/write PLL_LOCKCNT register */ +#define SYSCTRL_PLLSTAT 0x00000800 /* read/write PLL_STAT register */ + +typedef struct ADI_SYSCTRL_VALUES { + uint16_t uwVrCtl; + uint16_t uwPllCtl; + uint16_t uwPllDiv; + uint16_t uwPllLockCnt; + uint16_t uwPllStat; +} ADI_SYSCTRL_VALUES; + +static uint32_t (* const bfrom_SysControl)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_settings, void *reserved) = (void *)0xEF000038; + +/* We need a dedicated function since we need to screw with the stack pointer + * when resetting. The on-chip ROM will save/restore registers on the stack + * when doing a system reset, so the stack cannot be outside of the chip. + */ +__attribute__((__noreturn__)) +static inline void bfrom_SoftReset(void *new_stack) +{ + while (1) + __asm__ __volatile__( + "sp = %[stack];" + "jump (%[bfrom_syscontrol]);" + : : [bfrom_syscontrol] "p"(bfrom_SysControl), + "q0"(SYSCTRL_SOFTRESET), + "q1"(0), + "q2"(NULL), + [stack] "p"(new_stack) + ); +} + +/* OTP Functions */ +static uint32_t (* const bfrom_OtpCommand)(uint32_t command, uint32_t value) = (void *)0xEF000018; +static uint32_t (* const bfrom_OtpRead)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001A; +static uint32_t (* const bfrom_OtpWrite)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001C; + +/* otp command: defines for "command" */ +#define OTP_INIT 0x00000001 +#define OTP_CLOSE 0x00000002 + +/* otp read/write: defines for "flags" */ +#define OTP_LOWER_HALF 0x00000000 /* select upper/lower 64-bit half (bit 0) */ +#define OTP_UPPER_HALF 0x00000001 +#define OTP_NO_ECC 0x00000010 /* do not use ECC */ +#define OTP_LOCK 0x00000020 /* sets page protection bit for page */ +#define OTP_CHECK_FOR_PREV_WRITE 0x00000080 + +/* Return values for all functions */ +#define OTP_SUCCESS 0x00000000 +#define OTP_MASTER_ERROR 0x001 +#define OTP_WRITE_ERROR 0x003 +#define OTP_READ_ERROR 0x005 +#define OTP_ACC_VIO_ERROR 0x009 +#define OTP_DATA_MULT_ERROR 0x011 +#define OTP_ECC_MULT_ERROR 0x021 +#define OTP_PREV_WR_ERROR 0x041 +#define OTP_DATA_SB_WARN 0x100 +#define OTP_ECC_SB_WARN 0x200 + +#endif diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c index d0ead640d992..ae97ca407b0d 100644 --- a/arch/blackfin/kernel/reboot.c +++ b/arch/blackfin/kernel/reboot.c @@ -10,6 +10,7 @@ #include #include #include +#include /* A system soft reset makes external memory unusable so force * this function into L1. We use the compiler ssync here rather @@ -74,7 +75,14 @@ void machine_restart(char *cmd) { native_machine_restart(cmd); local_irq_disable(); - bfin_reset(); + if (ANOMALY_05000353 || ANOMALY_05000386) + bfin_reset(); + else + /* the bootrom checks to see how it was reset and will + * automatically perform a software reset for us when + * it starts executing boot + */ + asm("raise 1;"); } __attribute__((weak)) -- cgit v1.2.3 From fecc8d6d5611a6b1dce4a6cff4713f390056aa1c Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Fri, 10 Oct 2008 21:23:29 +0800 Subject: Blackfin arch: Remove useless head file Signed-off-by: Graf Yang Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/cpumask.h | 6 ------ 1 file changed, 6 deletions(-) delete mode 100644 arch/blackfin/include/asm/cpumask.h (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/cpumask.h b/arch/blackfin/include/asm/cpumask.h deleted file mode 100644 index b20a8e9012cb..000000000000 --- a/arch/blackfin/include/asm/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_BLACKFIN_CPUMASK_H -#define _ASM_BLACKFIN_CPUMASK_H - -#include - -#endif /* _ASM_BLACKFIN_CPUMASK_H */ -- cgit v1.2.3 From 58c35bd31f8b577e03d904c214b55b3d91369a85 Mon Sep 17 00:00:00 2001 From: Vitja Makarov Date: Mon, 13 Oct 2008 15:23:56 +0800 Subject: Blackfin arch: introducing bfin_addr_dcachable This patch introduces bfin_addr_dcachable() predicate, that simply tests is address in cachable region or not. Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/cplbinit.h | 14 ++++++++++++++ arch/blackfin/kernel/setup.c | 1 + 2 files changed, 15 insertions(+) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/cplbinit.h b/arch/blackfin/include/asm/cplbinit.h index 9d23cd1ff7d9..d179b747ff03 100644 --- a/arch/blackfin/include/asm/cplbinit.h +++ b/arch/blackfin/include/asm/cplbinit.h @@ -92,4 +92,18 @@ extern unsigned long reserved_mem_icache_on; extern void generate_cplb_tables(void); +static inline int bfin_addr_dcachable(unsigned long addr) +{ +#ifdef CONFIG_BFIN_DCACHE + if (addr < (_ramend - DMA_UNCACHED_REGION)) + return 1; +#endif + + if (reserved_mem_dcache_on && + addr >= _ramend && addr < physical_mem_end) + return 1; + + return 0; +} + #endif diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 7054594831c5..7f35d1046cd8 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -42,6 +42,7 @@ EXPORT_SYMBOL(memory_start); EXPORT_SYMBOL(memory_end); EXPORT_SYMBOL(physical_mem_end); EXPORT_SYMBOL(_ramend); +EXPORT_SYMBOL(reserved_mem_dcache_on); #ifdef CONFIG_MTD_UCLINUX unsigned long memory_mtd_end, memory_mtd_start, mtd_size; -- cgit v1.2.3 From 0b59268285ca6cdc46191f2995bf632088e3e277 Mon Sep 17 00:00:00 2001 From: Martin Schwidefsky Date: Thu, 16 Oct 2008 15:39:57 +0200 Subject: [PATCH] remove unused ibcs2/PER_SVR4 in SET_PERSONALITY The SET_PERSONALITY macro is always called with a second argument of 0. Remove the ibcs argument and the various tests to set the PER_SVR4 personality. Signed-off-by: Martin Schwidefsky --- arch/alpha/include/asm/elf.h | 4 ++-- arch/arm/include/asm/elf.h | 2 +- arch/avr32/include/asm/elf.h | 2 +- arch/blackfin/include/asm/elf.h | 2 +- arch/h8300/include/asm/elf.h | 2 +- arch/ia64/ia32/binfmt_elf32.c | 2 +- arch/ia64/ia32/ia32priv.h | 4 ++-- arch/ia64/include/asm/elf.h | 2 +- arch/m68knommu/include/asm/elf.h | 2 +- arch/mips/include/asm/elf.h | 10 +++------- arch/parisc/kernel/binfmt_elf32.c | 2 +- arch/powerpc/include/asm/elf.h | 4 ++-- arch/s390/include/asm/elf.h | 8 +++----- arch/sh/include/asm/elf.h | 2 +- arch/sparc/include/asm/elf_32.h | 2 +- arch/sparc/include/asm/elf_64.h | 6 ++---- fs/binfmt_elf.c | 6 +++--- include/asm-cris/elf.h | 2 +- include/asm-frv/elf.h | 2 +- include/asm-m32r/elf.h | 2 +- include/asm-m68k/elf.h | 2 +- include/asm-mn10300/elf.h | 2 +- include/asm-parisc/elf.h | 2 +- include/asm-um/elf-i386.h | 2 +- include/asm-um/elf-ppc.h | 2 +- include/asm-um/elf-x86_64.h | 2 +- include/asm-x86/elf.h | 4 ++-- include/asm-xtensa/elf.h | 2 +- 28 files changed, 39 insertions(+), 47 deletions(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/alpha/include/asm/elf.h b/arch/alpha/include/asm/elf.h index fc1002ea1e0c..5c75c1b2352a 100644 --- a/arch/alpha/include/asm/elf.h +++ b/arch/alpha/include/asm/elf.h @@ -144,9 +144,9 @@ extern int dump_elf_task_fp(elf_fpreg_t *dest, struct task_struct *task); : amask (AMASK_CIX) ? "ev6" : "ev67"); \ }) -#define SET_PERSONALITY(EX, IBCS2) \ +#define SET_PERSONALITY(EX) \ set_personality(((EX).e_flags & EF_ALPHA_32BIT) \ - ? PER_LINUX_32BIT : (IBCS2) ? PER_SVR4 : PER_LINUX) + ? PER_LINUX_32BIT : PER_LINUX) extern int alpha_l1i_cacheshape; extern int alpha_l1d_cacheshape; diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h index 5be016980c19..a58378c343b9 100644 --- a/arch/arm/include/asm/elf.h +++ b/arch/arm/include/asm/elf.h @@ -107,6 +107,6 @@ extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int); #define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0 extern void elf_set_personality(const struct elf32_hdr *); -#define SET_PERSONALITY(ex, ibcs2) elf_set_personality(&(ex)) +#define SET_PERSONALITY(ex) elf_set_personality(&(ex)) #endif diff --git a/arch/avr32/include/asm/elf.h b/arch/avr32/include/asm/elf.h index 64ce40ee1d58..d5d1d41c600a 100644 --- a/arch/avr32/include/asm/elf.h +++ b/arch/avr32/include/asm/elf.h @@ -103,6 +103,6 @@ typedef struct user_fpu_struct elf_fpregset_t; #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT) #endif /* __ASM_AVR32_ELF_H */ diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h index 67a03a8a353e..cdbfcfc30f6a 100644 --- a/arch/blackfin/include/asm/elf.h +++ b/arch/blackfin/include/asm/elf.h @@ -122,6 +122,6 @@ do { \ #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) #endif diff --git a/arch/h8300/include/asm/elf.h b/arch/h8300/include/asm/elf.h index a8b57d1f4128..94e2284c8816 100644 --- a/arch/h8300/include/asm/elf.h +++ b/arch/h8300/include/asm/elf.h @@ -55,7 +55,7 @@ typedef unsigned long elf_fpregset_t; #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) #define R_H8_NONE 0 #define R_H8_DIR32 1 diff --git a/arch/ia64/ia32/binfmt_elf32.c b/arch/ia64/ia32/binfmt_elf32.c index 4f0c30c38e99..f92bdaac8976 100644 --- a/arch/ia64/ia32/binfmt_elf32.c +++ b/arch/ia64/ia32/binfmt_elf32.c @@ -41,7 +41,7 @@ randomize_stack_top(unsigned long stack_top); #define elf_map elf32_map #undef SET_PERSONALITY -#define SET_PERSONALITY(ex, ibcs2) elf32_set_personality() +#define SET_PERSONALITY(ex) elf32_set_personality() #define elf_read_implies_exec(ex, have_pt_gnu_stack) (!(have_pt_gnu_stack)) diff --git a/arch/ia64/ia32/ia32priv.h b/arch/ia64/ia32/ia32priv.h index dd0c53687a96..0f15349c3c6b 100644 --- a/arch/ia64/ia32/ia32priv.h +++ b/arch/ia64/ia32/ia32priv.h @@ -332,8 +332,8 @@ void ia64_elf32_init(struct pt_regs *regs); #define ELF_PLATFORM NULL #ifdef __KERNEL__ -# define SET_PERSONALITY(EX,IBCS2) \ - (current->personality = (IBCS2) ? PER_SVR4 : PER_LINUX) +# define SET_PERSONALITY(EX) \ + (current->personality = PER_LINUX) #endif #define IA32_EFLAG 0x200 diff --git a/arch/ia64/include/asm/elf.h b/arch/ia64/include/asm/elf.h index 2acb6b6543c9..86eddee029cb 100644 --- a/arch/ia64/include/asm/elf.h +++ b/arch/ia64/include/asm/elf.h @@ -202,7 +202,7 @@ extern void ia64_elf_core_copy_regs (struct pt_regs *src, elf_gregset_t dst); relevant until we have real hardware to play with... */ #define ELF_PLATFORM NULL -#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) #define elf_read_implies_exec(ex, executable_stack) \ ((executable_stack!=EXSTACK_DISABLE_X) && ((ex).e_flags & EF_IA_64_LINUX_EXECUTABLE_STACK) != 0) diff --git a/arch/m68knommu/include/asm/elf.h b/arch/m68knommu/include/asm/elf.h index 27f0ec70fba8..b8046837f384 100644 --- a/arch/m68knommu/include/asm/elf.h +++ b/arch/m68knommu/include/asm/elf.h @@ -105,6 +105,6 @@ typedef struct user_m68kfp_struct elf_fpregset_t; #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) #endif diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h index f69f7acba637..a8eac1697b3d 100644 --- a/arch/mips/include/asm/elf.h +++ b/arch/mips/include/asm/elf.h @@ -247,10 +247,8 @@ extern struct mips_abi mips_abi_n32; #ifdef CONFIG_32BIT -#define SET_PERSONALITY(ex, ibcs2) \ +#define SET_PERSONALITY(ex) \ do { \ - if (ibcs2) \ - set_personality(PER_SVR4); \ set_personality(PER_LINUX); \ \ current->thread.abi = &mips_abi; \ @@ -296,7 +294,7 @@ do { \ #define __SET_PERSONALITY32(ex) do { } while (0) #endif -#define SET_PERSONALITY(ex, ibcs2) \ +#define SET_PERSONALITY(ex) \ do { \ clear_thread_flag(TIF_32BIT_REGS); \ clear_thread_flag(TIF_32BIT_ADDR); \ @@ -306,9 +304,7 @@ do { \ else \ current->thread.abi = &mips_abi; \ \ - if (ibcs2) \ - set_personality(PER_SVR4); \ - else if (current->personality != PER_LINUX32) \ + if (current->personality != PER_LINUX32) \ set_personality(PER_LINUX); \ } while (0) diff --git a/arch/parisc/kernel/binfmt_elf32.c b/arch/parisc/kernel/binfmt_elf32.c index ecb10a4f63c6..f61692d2b557 100644 --- a/arch/parisc/kernel/binfmt_elf32.c +++ b/arch/parisc/kernel/binfmt_elf32.c @@ -85,7 +85,7 @@ struct elf_prpsinfo32 * could set a processor dependent flag in the thread_struct. */ -#define SET_PERSONALITY(ex, ibcs2) \ +#define SET_PERSONALITY(ex) \ set_thread_flag(TIF_32BIT); \ current->thread.map_base = DEFAULT_MAP_BASE32; \ current->thread.task_size = DEFAULT_TASK_SIZE32 \ diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h index 64c6ee22eefd..d812929390e4 100644 --- a/arch/powerpc/include/asm/elf.h +++ b/arch/powerpc/include/asm/elf.h @@ -232,7 +232,7 @@ typedef elf_vrregset_t elf_fpxregset_t; #endif /* __powerpc64__ */ #ifdef __powerpc64__ -# define SET_PERSONALITY(ex, ibcs2) \ +# define SET_PERSONALITY(ex) \ do { \ unsigned long new_flags = 0; \ if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ @@ -256,7 +256,7 @@ do { \ # define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \ (exec_stk != EXSTACK_DISABLE_X) : 0) #else -# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) +# define SET_PERSONALITY(ex) set_personality(PER_LINUX) #endif /* __powerpc64__ */ extern int dcache_bsize; diff --git a/arch/s390/include/asm/elf.h b/arch/s390/include/asm/elf.h index 3cad56923815..261785ab5b22 100644 --- a/arch/s390/include/asm/elf.h +++ b/arch/s390/include/asm/elf.h @@ -166,13 +166,11 @@ extern char elf_platform[]; #define ELF_PLATFORM (elf_platform) #ifndef __s390x__ -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) #else /* __s390x__ */ -#define SET_PERSONALITY(ex, ibcs2) \ +#define SET_PERSONALITY(ex) \ do { \ - if (ibcs2) \ - set_personality(PER_SVR4); \ - else if (current->personality != PER_LINUX32) \ + if (current->personality != PER_LINUX32) \ set_personality(PER_LINUX); \ if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ set_thread_flag(TIF_31BIT); \ diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h index f01449a8d378..ee02db110f0d 100644 --- a/arch/sh/include/asm/elf.h +++ b/arch/sh/include/asm/elf.h @@ -189,7 +189,7 @@ do { \ } while (0) #endif -#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT) struct task_struct; extern int dump_task_regs (struct task_struct *, elf_gregset_t *); extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *); diff --git a/arch/sparc/include/asm/elf_32.h b/arch/sparc/include/asm/elf_32.h index b7ab60547827..381a1b5256d6 100644 --- a/arch/sparc/include/asm/elf_32.h +++ b/arch/sparc/include/asm/elf_32.h @@ -137,6 +137,6 @@ typedef struct { #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) #endif /* !(__ASMSPARC_ELF_H) */ diff --git a/arch/sparc/include/asm/elf_64.h b/arch/sparc/include/asm/elf_64.h index 0818a1308f4e..425c2f9be6d5 100644 --- a/arch/sparc/include/asm/elf_64.h +++ b/arch/sparc/include/asm/elf_64.h @@ -195,7 +195,7 @@ static inline unsigned int sparc64_elf_hwcap(void) #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex, ibcs2) \ +#define SET_PERSONALITY(ex) \ do { unsigned long new_flags = current_thread_info()->flags; \ new_flags &= _TIF_32BIT; \ if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ @@ -208,9 +208,7 @@ do { unsigned long new_flags = current_thread_info()->flags; \ else \ clear_thread_flag(TIF_ABI_PENDING); \ /* flush_thread will update pgd cache */ \ - if (ibcs2) \ - set_personality(PER_SVR4); \ - else if (current->personality != PER_LINUX32) \ + if (current->personality != PER_LINUX32) \ set_personality(PER_LINUX); \ } while (0) diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c index 655ed8d30a86..c76afa26edf7 100644 --- a/fs/binfmt_elf.c +++ b/fs/binfmt_elf.c @@ -683,7 +683,7 @@ static int load_elf_binary(struct linux_binprm *bprm, struct pt_regs *regs) * switch really is going to happen - do this in * flush_thread(). - akpm */ - SET_PERSONALITY(loc->elf_ex, 0); + SET_PERSONALITY(loc->elf_ex); interpreter = open_exec(elf_interpreter); retval = PTR_ERR(interpreter); @@ -734,7 +734,7 @@ static int load_elf_binary(struct linux_binprm *bprm, struct pt_regs *regs) goto out_free_dentry; } else { /* Executables without an interpreter also need a personality */ - SET_PERSONALITY(loc->elf_ex, 0); + SET_PERSONALITY(loc->elf_ex); } /* Flush all traces of the currently running executable */ @@ -748,7 +748,7 @@ static int load_elf_binary(struct linux_binprm *bprm, struct pt_regs *regs) /* Do this immediately, since STACK_TOP as used in setup_arg_pages may depend on the personality. */ - SET_PERSONALITY(loc->elf_ex, 0); + SET_PERSONALITY(loc->elf_ex); if (elf_read_implies_exec(loc->elf_ex, executable_stack)) current->personality |= READ_IMPLIES_EXEC; diff --git a/include/asm-cris/elf.h b/include/asm-cris/elf.h index 001f64ad11e8..f0d17fbc81ba 100644 --- a/include/asm-cris/elf.h +++ b/include/asm-cris/elf.h @@ -88,6 +88,6 @@ typedef unsigned long elf_fpregset_t; #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) #endif diff --git a/include/asm-frv/elf.h b/include/asm-frv/elf.h index 9fb946bb7dc9..7279ec07d62e 100644 --- a/include/asm-frv/elf.h +++ b/include/asm-frv/elf.h @@ -137,6 +137,6 @@ do { \ #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) #endif diff --git a/include/asm-m32r/elf.h b/include/asm-m32r/elf.h index 67bcd77494a5..0cc34c94bf2b 100644 --- a/include/asm-m32r/elf.h +++ b/include/asm-m32r/elf.h @@ -129,6 +129,6 @@ typedef elf_fpreg_t elf_fpregset_t; intent than poking at uname or /proc/cpuinfo. */ #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) #endif /* _ASM_M32R__ELF_H */ diff --git a/include/asm-m68k/elf.h b/include/asm-m68k/elf.h index 14ea42152b97..0b0f49eb876b 100644 --- a/include/asm-m68k/elf.h +++ b/include/asm-m68k/elf.h @@ -114,6 +114,6 @@ typedef struct user_m68kfp_struct elf_fpregset_t; #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) #endif diff --git a/include/asm-mn10300/elf.h b/include/asm-mn10300/elf.h index 256a70466ca4..bf09f8bb392e 100644 --- a/include/asm-mn10300/elf.h +++ b/include/asm-mn10300/elf.h @@ -141,7 +141,7 @@ do { \ #define ELF_PLATFORM (NULL) #ifdef __KERNEL__ -#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) #endif #endif /* _ASM_ELF_H */ diff --git a/include/asm-parisc/elf.h b/include/asm-parisc/elf.h index d0a4a8262818..7fa675799e6d 100644 --- a/include/asm-parisc/elf.h +++ b/include/asm-parisc/elf.h @@ -236,7 +236,7 @@ typedef unsigned long elf_greg_t; #define ELF_PLATFORM ("PARISC\0") -#define SET_PERSONALITY(ex, ibcs2) \ +#define SET_PERSONALITY(ex) \ current->personality = PER_LINUX; \ current->thread.map_base = DEFAULT_MAP_BASE; \ current->thread.task_size = DEFAULT_TASK_SIZE \ diff --git a/include/asm-um/elf-i386.h b/include/asm-um/elf-i386.h index 23d6893e8617..d0da9d7c5371 100644 --- a/include/asm-um/elf-i386.h +++ b/include/asm-um/elf-i386.h @@ -86,7 +86,7 @@ extern long elf_aux_hwcap; extern char * elf_aux_platform; #define ELF_PLATFORM (elf_aux_platform) -#define SET_PERSONALITY(ex, ibcs2) do { } while (0) +#define SET_PERSONALITY(ex) do { } while (0) extern unsigned long vsyscall_ehdr; extern unsigned long vsyscall_end; diff --git a/include/asm-um/elf-ppc.h b/include/asm-um/elf-ppc.h index d3b90b7ac3e9..af9463cd8ce5 100644 --- a/include/asm-um/elf-ppc.h +++ b/include/asm-um/elf-ppc.h @@ -5,7 +5,7 @@ extern long elf_aux_hwcap; #define ELF_HWCAP (elf_aux_hwcap) -#define SET_PERSONALITY(ex, ibcs2) do ; while(0) +#define SET_PERSONALITY(ex) do ; while(0) #define ELF_EXEC_PAGESIZE 4096 diff --git a/include/asm-um/elf-x86_64.h b/include/asm-um/elf-x86_64.h index 3b2d5224a7e1..6e8a9195e952 100644 --- a/include/asm-um/elf-x86_64.h +++ b/include/asm-um/elf-x86_64.h @@ -114,6 +114,6 @@ extern long elf_aux_hwcap; #define ELF_PLATFORM "x86_64" -#define SET_PERSONALITY(ex, ibcs2) do ; while(0) +#define SET_PERSONALITY(ex) do ; while(0) #endif diff --git a/include/asm-x86/elf.h b/include/asm-x86/elf.h index 5c4745bec906..26bc15f01e78 100644 --- a/include/asm-x86/elf.h +++ b/include/asm-x86/elf.h @@ -186,7 +186,7 @@ do { \ set_fs(USER_DS); \ } while (0) -#define COMPAT_SET_PERSONALITY(ex, ibcs2) \ +#define COMPAT_SET_PERSONALITY(ex) \ do { \ if (test_thread_flag(TIF_IA32)) \ clear_thread_flag(TIF_ABI_PENDING); \ @@ -267,7 +267,7 @@ extern int force_personality32; For the moment, we have only optimizations for the Intel generations, but that could change... */ -#define SET_PERSONALITY(ex, ibcs2) set_personality_64bit() +#define SET_PERSONALITY(ex) set_personality_64bit() /* * An executable for which elf_read_implies_exec() returns TRUE will diff --git a/include/asm-xtensa/elf.h b/include/asm-xtensa/elf.h index ca6e5101a2cb..c3f53e755ca5 100644 --- a/include/asm-xtensa/elf.h +++ b/include/asm-xtensa/elf.h @@ -189,7 +189,7 @@ typedef struct { #endif } elf_xtregs_t; -#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) +#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT) struct task_struct; -- cgit v1.2.3 From 121e598f5d5a9cc7e3bbd203a5c97afa1c46c521 Mon Sep 17 00:00:00 2001 From: Bryan Wu Date: Thu, 16 Oct 2008 22:31:56 +0800 Subject: Blackfin arch: add read/write IO accessor functions to Blackfin This is to kill some compiling warning on DM9000 netdev driver. Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/io.h | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h index cbbf7ffdbbff..7dc77a21fdf3 100644 --- a/arch/blackfin/include/asm/io.h +++ b/arch/blackfin/include/asm/io.h @@ -134,6 +134,36 @@ extern void dma_insb(unsigned long port, void *addr, unsigned short count); extern void dma_insw(unsigned long port, void *addr, unsigned short count); extern void dma_insl(unsigned long port, void *addr, unsigned short count); +static inline void readsl(const void __iomem *addr, void *buf, int len) +{ + insl((unsigned long)addr, buf, len); +} + +static inline void readsw(const void __iomem *addr, void *buf, int len) +{ + insw((unsigned long)addr, buf, len); +} + +static inline void readsb(const void __iomem *addr, void *buf, int len) +{ + insb((unsigned long)addr, buf, len); +} + +static inline void writesl(const void __iomem *addr, const void *buf, int len) +{ + outsl((unsigned long)addr, buf, len); +} + +static inline void writesw(const void __iomem *addr, const void *buf, int len) +{ + outsw((unsigned long)addr, buf, len); +} + +static inline void writesb(const void __iomem *addr, const void *buf, int len) +{ + outsb((unsigned long)addr, buf, len); +} + /* * Map some physical address range into the kernel address space. */ -- cgit v1.2.3 From 04be80ef0bab044e89ab04b84ccea14a5dc4543b Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 16 Oct 2008 23:33:53 +0800 Subject: Blackfin arch: move bfin_addr_dcachable() and friends into the cacheflush header where it belongs Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/cacheflush.h | 17 +++++++++++++++++ arch/blackfin/include/asm/cplbinit.h | 17 ----------------- arch/blackfin/kernel/cplb-nompu/cplbinit.c | 1 + 3 files changed, 18 insertions(+), 17 deletions(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h index 5ef9e35e9c3b..c2d5b6c9fb4d 100644 --- a/arch/blackfin/include/asm/cacheflush.h +++ b/arch/blackfin/include/asm/cacheflush.h @@ -85,4 +85,21 @@ do { memcpy(dst, src, len); \ # define flush_dcache_page(page) do { } while (0) #endif +extern unsigned long reserved_mem_dcache_on; +extern unsigned long reserved_mem_icache_on; + +static inline int bfin_addr_dcachable(unsigned long addr) +{ +#ifdef CONFIG_BFIN_DCACHE + if (addr < (_ramend - DMA_UNCACHED_REGION)) + return 1; +#endif + + if (reserved_mem_dcache_on && + addr >= _ramend && addr < physical_mem_end) + return 1; + + return 0; +} + #endif /* _BLACKFIN_ICACHEFLUSH_H */ diff --git a/arch/blackfin/include/asm/cplbinit.h b/arch/blackfin/include/asm/cplbinit.h index d179b747ff03..f845b41147ba 100644 --- a/arch/blackfin/include/asm/cplbinit.h +++ b/arch/blackfin/include/asm/cplbinit.h @@ -87,23 +87,6 @@ extern u_long dpdt_swapcount_table[]; #endif /* CONFIG_MPU */ -extern unsigned long reserved_mem_dcache_on; -extern unsigned long reserved_mem_icache_on; - extern void generate_cplb_tables(void); -static inline int bfin_addr_dcachable(unsigned long addr) -{ -#ifdef CONFIG_BFIN_DCACHE - if (addr < (_ramend - DMA_UNCACHED_REGION)) - return 1; -#endif - - if (reserved_mem_dcache_on && - addr >= _ramend && addr < physical_mem_end) - return 1; - - return 0; -} - #endif diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 301252e84441..512f8c92ead5 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c @@ -23,6 +23,7 @@ #include #include +#include #include #include -- cgit v1.2.3 From 8fb4f8f056977464fa022ff7263ca91af3c2b94d Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 16 Oct 2008 23:39:12 +0800 Subject: Blackfin arch: update cache flush prototypes with argument names to make them less mysterious Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/cacheflush.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h index c2d5b6c9fb4d..4403415583fa 100644 --- a/arch/blackfin/include/asm/cacheflush.h +++ b/arch/blackfin/include/asm/cacheflush.h @@ -30,11 +30,11 @@ #ifndef _BLACKFIN_CACHEFLUSH_H #define _BLACKFIN_CACHEFLUSH_H -extern void blackfin_icache_dcache_flush_range(unsigned int, unsigned int); -extern void blackfin_icache_flush_range(unsigned int, unsigned int); -extern void blackfin_dcache_flush_range(unsigned int, unsigned int); -extern void blackfin_dcache_invalidate_range(unsigned int, unsigned int); -extern void blackfin_dflush_page(void *); +extern void blackfin_icache_dcache_flush_range(unsigned long start_address, unsigned long end_address); +extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address); +extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address); +extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address); +extern void blackfin_dflush_page(void *page); #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) -- cgit v1.2.3 From 1390da4ee75168b6e4d8354e93e3b5f0a0291f2f Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 16 Oct 2008 23:55:41 +0800 Subject: Blackfin arch: make sure cycles is marked as volatile so gcc doesnt reorder on us Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/timex.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/blackfin/include/asm') diff --git a/arch/blackfin/include/asm/timex.h b/arch/blackfin/include/asm/timex.h index 22b0806161bb..248aeb066805 100644 --- a/arch/blackfin/include/asm/timex.h +++ b/arch/blackfin/include/asm/timex.h @@ -16,7 +16,7 @@ typedef unsigned long long cycles_t; static inline cycles_t get_cycles(void) { unsigned long tmp, tmp2; - __asm__("%0 = cycles; %1 = cycles2;" : "=d"(tmp), "=d"(tmp2)); + __asm__ __volatile__("%0 = cycles; %1 = cycles2;" : "=d"(tmp), "=d"(tmp2)); return tmp | ((cycles_t)tmp2 << 32); } -- cgit v1.2.3