From 8c6e105558628b63292ae770198f11a1d5535660 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 27 Dec 2022 12:55:55 +0000 Subject: arm64/sysreg: Fix errors in 32 bit enumeration values The recently converted 32 bit ID registers have errors in MVFR0_EL1.FPSP, MVFR0_EL1.SIMDReg and MVFR1_EL1.SIMDHP where enumeration values which should be 0b0010 are specified as 0b0001. Correct these. Fixes: e79c94a2a487 ("arm64/sysreg: Convert MVFR0_EL1 to automatic generation") Fixes: c9b718eda706 ("arm64/sysreg: Convert MVFR1_EL1 to automatic generation") Reviewed-by: Mark Rutland Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20221207-arm64-sysreg-helpers-v3-2-0d71a7b174a8@kernel.org Signed-off-by: Catalin Marinas --- arch/arm64/tools/sysreg | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm64/tools/sysreg') diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 184e58fd5631..e8fb6684d7f3 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -689,17 +689,17 @@ EndEnum Enum 11:8 FPDP 0b0000 NI 0b0001 VFPv2 - 0b0001 VFPv3 + 0b0010 VFPv3 EndEnum Enum 7:4 FPSP 0b0000 NI 0b0001 VFPv2 - 0b0001 VFPv3 + 0b0010 VFPv3 EndEnum Enum 3:0 SIMDReg 0b0000 NI 0b0001 IMP_16x64 - 0b0001 IMP_32x64 + 0b0010 IMP_32x64 EndEnum EndSysreg @@ -718,7 +718,7 @@ EndEnum Enum 23:20 SIMDHP 0b0000 NI 0b0001 SIMDHP - 0b0001 SIMDHP_FLOAT + 0b0010 SIMDHP_FLOAT EndEnum Enum 19:16 SIMDSP 0b0000 NI -- cgit v1.2.3 From 541826afb2c7426ada6a414c3611352c86f95ad5 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 27 Dec 2022 17:05:03 +0000 Subject: arm64/sysreg: Add definition for ICC_NMIAR1_EL1 FEAT_NMI adds a new interrupt status register for NMIs, ICC_NMIAR1_EL1. Add the definition for this register as per IHI0069H. Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20221208-arm64-isr-el1-v2-1-89f7073a1ca9@kernel.org Signed-off-by: Catalin Marinas --- arch/arm64/tools/sysreg | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm64/tools/sysreg') diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index e8fb6684d7f3..12b127342f49 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -1842,3 +1842,8 @@ Field 23:16 LD Res0 15:8 Field 7:0 LR EndSysreg + +Sysreg ICC_NMIAR1_EL1 3 0 12 9 5 +Res0 63:24 +Field 23:0 INTID +EndSysreg -- cgit v1.2.3 From df5f1775aab2ab819caac73f1ccbb65929848e4e Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 27 Dec 2022 17:05:04 +0000 Subject: arm64/sysreg: Add definition of ISR_EL1 Add a definition of ISR_EL1 as per DDI0487I.a. This register was not previously defined in sysreg.h, no functional changes. Acked-by: Marc Zyngier Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20221208-arm64-isr-el1-v2-2-89f7073a1ca9@kernel.org Signed-off-by: Catalin Marinas --- arch/arm64/tools/sysreg | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm64/tools/sysreg') diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 12b127342f49..e87c378fb941 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -1843,6 +1843,16 @@ Res0 15:8 Field 7:0 LR EndSysreg +Sysreg ISR_EL1 3 0 12 1 0 +Res0 63:11 +Field 10 IS +Field 9 FS +Field 8 A +Field 7 I +Field 6 F +Res0 5:0 +EndSysreg + Sysreg ICC_NMIAR1_EL1 3 0 12 9 5 Res0 63:24 Field 23:0 INTID -- cgit v1.2.3 From 0f3bbe0edf788f1d43400a68a84eb37c9f13dfa5 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 16 Jan 2023 16:04:38 +0000 Subject: arm64/sysreg: Update system registers for SME 2 and 2.1 FEAT_SME2 and FEAT_SME2P1 introduce several new SME features which can be enumerated via ID_AA64SMFR0_EL1 and a new register ZT0 access to which is controlled via SMCR_ELn, add the relevant register description. Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20221208-arm64-sme2-v4-3-f2fa0aef982f@kernel.org Signed-off-by: Catalin Marinas --- arch/arm64/tools/sysreg | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) (limited to 'arch/arm64/tools/sysreg') diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 184e58fd5631..13c87d8a42f1 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -894,6 +894,7 @@ EndEnum Enum 27:24 SME 0b0000 NI 0b0001 IMP + 0b0010 SME2 EndEnum Res0 23:20 Enum 19:16 MPAM_frac @@ -975,7 +976,9 @@ Enum 63 FA64 EndEnum Res0 62:60 Enum 59:56 SMEver - 0b0000 IMP + 0b0000 SME + 0b0001 SME2 + 0b0010 SME2p1 EndEnum Enum 55:52 I16I64 0b0000 NI @@ -986,7 +989,19 @@ Enum 48 F64F64 0b0 NI 0b1 IMP EndEnum -Res0 47:40 +Enum 47:44 I16I32 + 0b0000 NI + 0b0101 IMP +EndEnum +Enum 43 B16B16 + 0b0 NI + 0b1 IMP +EndEnum +Enum 42 F16F16 + 0b0 NI + 0b1 IMP +EndEnum +Res0 41:40 Enum 39:36 I8I32 0b0000 NI 0b1111 IMP @@ -999,7 +1014,10 @@ Enum 34 B16F32 0b0 NI 0b1 IMP EndEnum -Res0 33 +Enum 33 BI32I32 + 0b0 NI + 0b1 IMP +EndEnum Enum 32 F32F32 0b0 NI 0b1 IMP @@ -1599,7 +1617,8 @@ EndSysreg SysregFields SMCR_ELx Res0 63:32 Field 31 FA64 -Res0 30:9 +Field 30 EZT0 +Res0 29:9 Raz 8:4 Field 3:0 LEN EndSysregFields -- cgit v1.2.3