From 82a29bf9952acd1be7e76783604686abeb4e5b1d Mon Sep 17 00:00:00 2001 From: Amelie Delaunay Date: Wed, 21 Jun 2017 16:32:05 +0200 Subject: spi: Document the STM32 SPI bindings This patch adds the documentation of device tree bindings for the STM32 SPI controller. Signed-off-by: Amelie Delaunay Signed-off-by: Mark Brown --- .../devicetree/bindings/spi/spi-stm32.txt | 60 ++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt b/Documentation/devicetree/bindings/spi/spi-stm32.txt new file mode 100644 index 000000000000..3958bf6e8b37 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt @@ -0,0 +1,60 @@ +STMicroelectronics STM32 SPI Controller + +The STM32 SPI controller is used to communicate with external devices using +the Serial Peripheral Interface. It supports full-duplex, half-duplex and +simplex synchronous serial communication with external devices. It supports +from 4 to 32-bit data size. Although it can be configured as master or slave, +only master is supported by the driver. + +Required properties: +- compatible: Must be "st,stm32-spi". +- reg: Offset and length of the device's register set. +- interrupts: Must contain the interrupt id. +- clocks: Must contain an entry for spiclk (which feeds the internal clock + generator). +- #address-cells: Number of cells required to define a chip select address. +- #size-cells: Should be zero. + +Optional properties: +- resets: Must contain the phandle to the reset controller. +- A pinctrl state named "default" may be defined to set pins in mode of + operation for SPI transfer. +- dmas: DMA specifiers for tx and rx dma. DMA fifo mode must be used. See the + STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt. +- dma-names: DMA request names should include "tx" and "rx" if present. +- cs-gpios: list of GPIO chip selects. See the SPI bus bindings, + Documentation/devicetree/bindings/spi/spi-bus.txt + + +Child nodes represent devices on the SPI bus + See ../spi/spi-bus.txt + +Optional properties: +- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in + nanoseconds inserted between two consecutive data frames. + + +Example: + spi2: spi@40003800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-spi"; + reg = <0x40003800 0x400>; + interrupts = <36>; + clocks = <&rcc SPI2_CK>; + resets = <&rcc 1166>; + dmas = <&dmamux1 0 39 0x400 0x01>, + <&dmamux1 1 40 0x400 0x01>; + dma-names = "rx", "tx"; + pinctrl-0 = <&spi2_pins_b>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&gpioa 11 0>; + + spidev@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <4000000>; + st,spi-midi = <4000>; + }; + }; -- cgit v1.2.3 From 567300d11ef54f7779aa7324510fd4dbd470f73e Mon Sep 17 00:00:00 2001 From: Amelie Delaunay Date: Tue, 27 Jun 2017 17:45:13 +0200 Subject: spi: stm32: use SoC specific compatible This patch replaces st,stm32-spi compatible with st,stm32h7-spi SoC specific compatible and updates the example accondingly. Signed-off-by: Amelie Delaunay Acked-by: Rob Herring Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/spi-stm32.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt b/Documentation/devicetree/bindings/spi/spi-stm32.txt index 3958bf6e8b37..415378bca480 100644 --- a/Documentation/devicetree/bindings/spi/spi-stm32.txt +++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt @@ -7,7 +7,7 @@ from 4 to 32-bit data size. Although it can be configured as master or slave, only master is supported by the driver. Required properties: -- compatible: Must be "st,stm32-spi". +- compatible: Must be "st,stm32h7-spi". - reg: Offset and length of the device's register set. - interrupts: Must contain the interrupt id. - clocks: Must contain an entry for spiclk (which feeds the internal clock @@ -38,7 +38,7 @@ Example: spi2: spi@40003800 { #address-cells = <1>; #size-cells = <0>; - compatible = "st,stm32-spi"; + compatible = "st,stm32h7-spi"; reg = <0x40003800 0x400>; interrupts = <36>; clocks = <&rcc SPI2_CK>; -- cgit v1.2.3 From 5fd3d9433217908e1e8e1c2f841c3b28c75509d6 Mon Sep 17 00:00:00 2001 From: Amelie Delaunay Date: Tue, 27 Jun 2017 17:45:15 +0200 Subject: spi: stm32: fix example with st, spi-midi-ns property This patch aligns example with the optional property description, removes status and replace spidev unvalid compatible with Aarvark SPI Host Adapter one. In slave mode, Aardvark SPI Host Adapter requires 4ms delay between the end of byte n and the start of byte n+1, hence the use of the optional property st,spi-midi-ns. Signed-off-by: Amelie Delaunay Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/spi-stm32.txt | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt b/Documentation/devicetree/bindings/spi/spi-stm32.txt index 415378bca480..1b3fa2c119d5 100644 --- a/Documentation/devicetree/bindings/spi/spi-stm32.txt +++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt @@ -48,13 +48,12 @@ Example: dma-names = "rx", "tx"; pinctrl-0 = <&spi2_pins_b>; pinctrl-names = "default"; - status = "okay"; cs-gpios = <&gpioa 11 0>; - spidev@0 { - compatible = "spidev"; + aardvark@0 { + compatible = "totalphase,aardvark"; reg = <0>; spi-max-frequency = <4000000>; - st,spi-midi = <4000>; + st,spi-midi-ns = <4000>; }; }; -- cgit v1.2.3