From 03656dc61deb014fb536b728da8750bff45eedb2 Mon Sep 17 00:00:00 2001 From: Laura Nao Date: Tue, 25 Nov 2025 17:16:51 +0100 Subject: dt-bindings: thermal: mediatek: Add LVTS thermal controller support for MT8196 Add LVTS thermal controller binding for MediaTek MT8196. Acked-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Tested-by: AngeloGioacchino Del Regno Tested-by: Frank Wunderlich Signed-off-by: Laura Nao Link: https://patch.msgid.link/20251125-mt8196-lvts-v4-v5-1-6db7eb903fb7@collabora.com Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml index 0259cd3ce9c5..beccdabe110b 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml @@ -26,6 +26,8 @@ properties: - mediatek,mt8192-lvts-mcu - mediatek,mt8195-lvts-ap - mediatek,mt8195-lvts-mcu + - mediatek,mt8196-lvts-ap + - mediatek,mt8196-lvts-mcu reg: maxItems: 1 -- cgit v1.2.3 From 1460b9dff9af392bf7ea76861187bf2c1cac0a0e Mon Sep 17 00:00:00 2001 From: Laura Nao Date: Tue, 25 Nov 2025 17:16:58 +0100 Subject: dt-bindings: nvmem: mediatek: efuse: Add support for MT8196 The MT8196 eFuse layout is compatible with MT8186 and shares the same decoding scheme for the gpu-speedbin cell. Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Tested-by: AngeloGioacchino Del Regno Tested-by: Frank Wunderlich Signed-off-by: Laura Nao Link: https://patch.msgid.link/20251125-mt8196-lvts-v4-v5-8-6db7eb903fb7@collabora.com Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml b/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml index c9bf34ee0efb..f9323b3ecfc8 100644 --- a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml @@ -28,6 +28,7 @@ properties: - enum: - mediatek,mt8188-efuse - mediatek,mt8189-efuse + - mediatek,mt8196-efuse - const: mediatek,mt8186-efuse - const: mediatek,mt8186-efuse -- cgit v1.2.3 From aee1950f73f40c29271e8ed07b8be106390ed0b8 Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Tue, 23 Dec 2025 18:56:26 +0100 Subject: dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT7987 Add thermal controller definition for MT7987. Signed-off-by: Frank Wunderlich Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20251223175710.25850-2-linux@fw-web.de Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml | 1 + include/dt-bindings/thermal/mediatek,lvts-thermal.h | 3 +++ 2 files changed, 4 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml index beccdabe110b..975235130670 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml @@ -18,6 +18,7 @@ description: | properties: compatible: enum: + - mediatek,mt7987-lvts-ap - mediatek,mt7988-lvts-ap - mediatek,mt8186-lvts - mediatek,mt8188-lvts-ap diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h index 0ec8ad184d47..350f98178b26 100644 --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h @@ -7,6 +7,9 @@ #ifndef __MEDIATEK_LVTS_DT_H #define __MEDIATEK_LVTS_DT_H +#define MT7987_CPU 0 +#define MT7987_ETH2P5G 1 + #define MT7988_CPU_0 0 #define MT7988_CPU_1 1 #define MT7988_ETH2P5G_0 2 -- cgit v1.2.3 From 96b0bb4a2310302307bafe62edbc3455fae8b723 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 9 Dec 2025 09:11:13 +0000 Subject: dt-bindings: thermal: r9a09g047-tsu: Document RZ/V2N TSU The Renesas RZ/V2N SoC includes a Thermal Sensor Unit (TSU) block designed to measure the junction temperature. The device provides real-time temperature measurements for thermal management, utilizing two dedicated channels for temperature sensing. The Renesas RZ/V2N SoC is using the same TSU IP found on the RZ/G3E SoC, the only difference being that it has two channels instead of one. Add new compatible string "renesas,r9a09g056-tsu" for RZ/V2N and use "renesas,r9a09g047-tsu" as a fallback compatible to indicate hardware compatibility with the RZ/G3E implementation. Signed-off-by: Ovidiu Panait Acked-by: Rob Herring (Arm) Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20251209091115.8541-2-ovidiu.panait.rb@renesas.com Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml index befdc8b7a082..c959b9834620 100644 --- a/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml +++ b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml @@ -19,7 +19,9 @@ properties: oneOf: - const: renesas,r9a09g047-tsu # RZ/G3E - items: - - const: renesas,r9a09g057-tsu # RZ/V2H + - enum: + - renesas,r9a09g056-tsu # RZ/V2N + - renesas,r9a09g057-tsu # RZ/V2H - const: renesas,r9a09g047-tsu # RZ/G3E reg: -- cgit v1.2.3 From f41eaaa5f2c9fb4fc816e45e2061d80c0b927d39 Mon Sep 17 00:00:00 2001 From: Cosmin Tanislav Date: Thu, 8 Jan 2026 21:52:22 +0200 Subject: dt-bindings: thermal: r9a09g047-tsu: document RZ/T2H and RZ/N2H The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs include a Temperature Sensor Unit (TSU). The device provides real-time temperature measurements for thermal management, utilizing a single dedicated channel for temperature sensing. Compared to the previously supported RZ/G3E, the RZ/T2H and RZ/N2H SoCs do not have a reset for the TSU peripheral, and the OTP data is exposed via ARM SMC, as opposed to a system register. Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Signed-off-by: Cosmin Tanislav Link: https://patch.msgid.link/20260108195223.193531-5-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Daniel Lezcano --- .../bindings/thermal/renesas,r9a09g047-tsu.yaml | 30 +++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml index c959b9834620..d560c58be4d6 100644 --- a/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml +++ b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml @@ -17,12 +17,17 @@ description: properties: compatible: oneOf: - - const: renesas,r9a09g047-tsu # RZ/G3E + - enum: + - renesas,r9a09g047-tsu # RZ/G3E + - renesas,r9a09g077-tsu # RZ/T2H - items: - enum: - renesas,r9a09g056-tsu # RZ/V2N - renesas,r9a09g057-tsu # RZ/V2H - const: renesas,r9a09g047-tsu # RZ/G3E + - items: + - const: renesas,r9a09g087-tsu # RZ/N2H + - const: renesas,r9a09g077-tsu # RZ/T2H reg: maxItems: 1 @@ -65,12 +70,31 @@ required: - compatible - reg - clocks - - resets - power-domains - interrupts - interrupt-names - "#thermal-sensor-cells" - - renesas,tsu-trim + +allOf: + - if: + properties: + compatible: + contains: + const: renesas,r9a09g047-tsu + then: + required: + - resets + - renesas,tsu-trim + + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-tsu + then: + properties: + resets: false + renesas,tsu-trim: false additionalProperties: false -- cgit v1.2.3