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2024-01-30soc: apple: mailbox: error pointers are negative integersLinus Torvalds
In an entirely unrelated discussion where I pointed out a stupid thinko of mine, Rasmus piped up and noted that that obvious mistake already existed elsewhere in the kernel tree. An "error pointer" is the negative error value encoded as a pointer, making the whole "return error or valid pointer" use-case simple and straightforward. We use it all over the kernel. But the key here is that errors are _negative_ error numbers, not the horrid UNIX user-level model of "-1 and the value of 'errno'". The Apple mailbox driver used the positive error values, and thus just returned invalid normal pointers instead of actual errors. Of course, the reason nobody ever noticed is that the errors presumably never actually happen, so this is fixing a conceptual bug rather than an actual one. Reported-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Link: https://lore.kernel.org/all/5c30afe0-f9fb-45d5-9333-dd914a1ea93a@prevas.dk/ Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2024-01-17Merge tag 'char-misc-6.8-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver updates from Greg KH: "Here is the big set of char/misc and other driver subsystem changes for 6.8-rc1. Other than lots of binder driver changes (as you can see by the merge conflicts) included in here are: - lots of iio driver updates and additions - spmi driver updates - eeprom driver updates - firmware driver updates - ocxl driver updates - mhi driver updates - w1 driver updates - nvmem driver updates - coresight driver updates - platform driver remove callback api changes - tags.sh script updates - bus_type constant marking cleanups - lots of other small driver updates All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (341 commits) android: removed duplicate linux/errno uio: Fix use-after-free in uio_open drivers: soc: xilinx: add check for platform firmware: xilinx: Export function to use in other module scripts/tags.sh: remove find_sources scripts/tags.sh: use -n to test archinclude scripts/tags.sh: add local annotation scripts/tags.sh: use more portable -path instead of -wholename scripts/tags.sh: Update comment (addition of gtags) firmware: zynqmp: Convert to platform remove callback returning void firmware: turris-mox-rwtm: Convert to platform remove callback returning void firmware: stratix10-svc: Convert to platform remove callback returning void firmware: stratix10-rsu: Convert to platform remove callback returning void firmware: raspberrypi: Convert to platform remove callback returning void firmware: qemu_fw_cfg: Convert to platform remove callback returning void firmware: mtk-adsp-ipc: Convert to platform remove callback returning void firmware: imx-dsp: Convert to platform remove callback returning void firmware: coreboot_table: Convert to platform remove callback returning void firmware: arm_scpi: Convert to platform remove callback returning void firmware: arm_scmi: Convert to platform remove callback returning void ...
2024-01-12Merge tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drmLinus Torvalds
Pull drm updates from Dave Airlie: "This contains two major new drivers: - imagination is a first driver for Imagination Technologies devices, it only covers very specific devices, but there is hope to grow it - xe is a reboot of the i915 GPU (shares display) side using a more upstream focused development model, and trying to maximise code sharing. It's not enabled for any hw by default, and will hopefully get switched on for Intel's Lunarlake. This also drops a bunch of the old UMS ioctls. It's been dead long enough. amdgpu has a bunch of new color management code that is being used in the Steam Deck. amdgpu also has a new ACPI WBRF interaction to help avoid radio interference. Otherwise it's the usual lots of changes in lots of places. Detailed summary: new drivers: - imagination - new driver for Imagination Technologies GPU - xe - new driver for Intel GPUs using core drm concepts core: - add CLOSE_FB ioctl - remove old UMS ioctls - increase max objects to accomodate AMD color mgmt encoder: - create per-encoder debugfs directory edid: - split out drm_eld - SAD helpers - drop edid_firmware module parameter format-helper: - cache format conversion buffers sched: - move from kthread to workqueue - rename some internals - implement dynamic job-flow control gpuvm: - provide more features to handle GEM objects client: - don't acquire module reference displayport: - add mst path property documentation fdinfo: - alignment fix dma-buf: - add fence timestamp helper - add fence deadline support bridge: - transparent aux-bridge for DP/USB-C - lt8912b: add suspend/resume support and power regulator support panel: - edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49 - chromebook panel support - elida-kd35t133: rework pm - powkiddy RK2023 panel - himax-hx8394: drop prepare/unprepare and shutdown logic - BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G - Evervision VGG644804, SDC ATNA45AF01 - nv3052c: register docs, init sequence fixes, fascontek FS035VG158 - st7701: Anbernic RG-ARC support - r63353 panel controller - Ilitek ILI9805 panel controller - AUO G156HAN04.0 simplefb: - support memory regions - support power domains amdgpu: - add new 64-bit sequence number infrastructure - add AMD specific color management - ACPI WBRF support for RF interference handling - GPUVM updates - RAS updates - DCN 3.5 updates - Rework PCIe link speed handling - Document GPU reset types - DMUB fixes - eDP fixes - NBIO 7.9/7.11 updates - SubVP updates - XGMI PCIe state dumping for aqua vanjaram - GFX11 golden register updates - enable tunnelling on high pri compute amdkfd: - Migrate TLB flushing logic to amdgpu - Trap handler fixes - Fix restore workers handling on suspend/resume - Fix possible memory leak in pqm_uninit() - support import/export of dma-bufs using GEM handles radeon: - fix possible overflows in command buffer checking - check for errors in ring_lock i915: - reorg display code for reuse in xe driver - fdinfo memory stats printing - DP MST bandwidth mgmt improvements - DP panel replay enabling - MTL C20 phy state verification - MTL DP DSC fractional bpp support - Audio fastset support - use dma_fence interfaces instead of i915_sw_fence - Separate gem and display code - AUX register macro refactoring - Separate display module/device parameters - Move display capabilities debugfs under display - Makefile cleanups - Register cleanups - Move display lock inits under display/ - VLV/CHV DPIO PHY register and interface refactoring - DSI VBT sequence refactoring - C10/C20 PHY PLL hardware readout - DPLL code cleanups - Cleanup PXP plane protection checks - Improve display debug msgs - PSR selective fetch fixes/improvements - DP MST fixes - Xe2LPD FBC restrictions removed - DGFX uses direct VBT pin mapping - more MTL WAs - fix MTL eDP bug - eliminate use of kmap_atomic habanalabs: - sysfs entry to identify a device minor id with debugfs path - sysfs entry to expose device module id - add signed device info retrieval through INFO ioctl - add Gaudi2C device support - pcie reset prepare/done hooks msm: - Add support for SDM670, SM8650 - Handle the CFG interconnect to fix the obscure hangs / timeouts - Kconfig fix for QMP dependency - use managed allocators - DPU: SDM670, SM8650 support - DPU: Enable SmartDMA on SM8350 and SM8450 - DP: enable runtime PM support - GPU: add metadata UAPI - GPU: move devcoredumps to GPU device - GPU: convert to drm_exec ivpu: - update FW API - new debugfs file - a new NOP job submission test mode - improve suspend/resume - PM improvements - MMU PT optimizations - firmware profile frequency support - support for uncached buffers - switch to gem shmem helpers - replace kthread with threaded irqs rockchip: - rk3066_hdmi: convert to atomic - vop2: support nv20 and nv30 - rk3588 support mediatek: - use devm_platform_ioremap_resource - stop using iommu_present - MT8188 VDOSYS1 display support panfrost: - PM improvements - improve interrupt handling as poweroff qaic: - allow to run with single MSI - support host/device time sync - switch to persistent DRM devices exynos: - fix potential error pointer dereference - fix wrong error checking - add missing call to drm_atomic_helper_shutdown omapdrm: - dma-fence lockdep annotation fix tidss: - dma-fence lockdep annotation fix - support for AM62A7 v3d: - BCM2712 - rpi5 support - fdinfo + gputop support - uapi for CPU job handling virtio-gpu: - add context debug name" * tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm: (2340 commits) drm/amd/display: Allow z8/z10 from driver drm/amd/display: fix bandwidth validation failure on DCN 2.1 drm/amdgpu: apply the RV2 system aperture fix to RN/CZN as well drm/amd/display: Move fixpt_from_s3132 to amdgpu_dm drm/amd/display: Fix recent checkpatch errors in amdgpu_dm Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole" drm/amd/display: avoid stringop-overflow warnings for dp_decide_lane_settings() drm/amd/display: Fix power_helpers.c codestyle drm/amd/display: Fix hdcp_log.h codestyle drm/amd/display: Fix hdcp2_execution.c codestyle drm/amd/display: Fix hdcp_psp.h codestyle drm/amd/display: Fix freesync.c codestyle drm/amd/display: Fix hdcp_psp.c codestyle drm/amd/display: Fix hdcp1_execution.c codestyle drm/amd/pm/smu7: fix a memleak in smu7_hwmgr_backend_init drm/amdkfd: Fix iterator used outside loop in 'kfd_add_peer_prop()' drm/amdgpu: Drop 'fence' check in 'to_amdgpu_amdkfd_fence()' drm/amdkfd: Confirm list is non-empty before utilizing list_first_entry in kfd_topology.c drm/amdgpu: Fix '*fw' from request_firmware() not released in 'amdgpu_ucode_request()' drm/amdgpu: Fix variable 'mca_funcs' dereferenced before NULL check in 'amdgpu_mca_smu_get_mca_entry()' ...
2024-01-11Merge tag 'soc-arm-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM SoC code updates from Arnd Bergmann: "There are two notable changes this time: - add a arch/arm/Kconfig.platforms file to simplify the platforms that have no code except their Kconfig file (Andrew Davis) - remove support for the ARM11MPCore CPU in the versatile/realview platform. Since this is the last remaining one after removing ox820, some core code can go as well (Linus Walleij) The other changes are minor cleanups and bugfixes" * tag 'soc-arm-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: davinci: always select CONFIG_CPU_ARM926T soc: pxa: ssp: fix casts ARM: debug: fix DEBUG_UNCOMPRESS help for !MULTIPLATFORM ARM: MAINTAINERS: drop empty entries for removed boards ARM: Delete ARM11MPCore perf leftovers ARM: mach-nspire: Rework support and directory structure ARM: mach-sunplus: Rework support and directory structure ARM: mach-airoha: Rework support and directory structure ARM: mach-moxart: Move MOXA ART support into Kconfig.platforms ARM: mach-uniphier: Move Socionext UniPhier support into Kconfig.platforms ARM: mach-rda: Move RDA Micro support into Kconfig.platforms ARM: mach-asm9260: Move ASM9260 support into Kconfig.platforms ARM: Kconfig: move platform selection into its own Kconfig file ARM: Delete ARM11MPCore (ARM11 ARMv6K SMP) support MAINTAINERS: add Marvell MBus driver to Marvell EBU SoCs support ARM: mxs: Do not search for "fsl,clkctrl" ARM: imx: Use device_get_match_data() MAINTAINERS: add omap bus drivers to OMAP2+ SUPPORT ARM: at91: pm: set soc_pm.data.mode in at91_pm_secure_init()
2024-01-09soc: pxa: ssp: fix castsDuje Mihanović
On ARM64 platforms, id->data is a 64-bit value and casting it to a 32-bit integer causes build errors. Cast it to uintptr_t instead. The id->driver_data cast is unnecessary, so drop it. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20240106-pxa-ssp-v2-1-69ac9f028bba@skole.hr Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-01-04drivers: soc: xilinx: add check for platformJay Buddhabhatti
Some error event IDs for Versal and Versal NET are different. Both the platforms should access their respective error event IDs so use sub_family_code to check for platform and check error IDs for respective platforms. The family code is passed via platform data to avoid platform detection again. Platform data is setup when even driver is registered. Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Link: https://lore.kernel.org/r/20231219055025.27570-3-jay.buddhabhatti@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-12-22Merge tag 'riscv-cache-for-v6.8' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V cache drivers for v6.8 The SiFive composable cache driver moves to the cache driver subdirectory from the drivers/soc and grows support for non-coherent cache operations. The immediate user for these is the jh7100 SoC, that a rake of people have on VisionFive v1 or Beagle-V Starlight boards. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-cache-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: errata: Make ERRATA_STARFIVE_JH7100 depend on !DMA_DIRECT_REMAP riscv: errata: Add StarFive JH7100 errata soc: sifive: ccache: Add StarFive JH7100 support dt-bindings: cache: sifive,ccache0: Add StarFive JH7100 compatible soc: sifive: shunt ccache driver to drivers/cache Link: https://lore.kernel.org/r/20231221-catatonic-monday-d4c61283b136@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22Merge tag 'riscv-soc-drivers-for-v6.8' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V SoC drivers for v6.8 There's only one set of changes here, the addition of "Auto Update" support for PolarFire SoC. Auto Update is one of the ways that the FPGA bitstream can be updated, and the only one suitable for use from Linux as it does not immediately initiate a reboot when started. The driver was not accepted in the FPGA manager subsystem as the update only occurs after a reboot and makes no use of the FPGA manager framework. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-soc-drivers-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: MAINTAINERS: add auto-update driver to mpfs entry firmware: microchip: Replace of_device.h with explicit include firmware: microchip: add PolarFire SoC Auto Update support soc: microchip: mpfs: add auto-update subdev to system controller soc: microchip: mpfs: print service status in warning message soc: microchip: mpfs: enable access to the system controller's flash dt-bindings: soc: microchip: add a property for system controller flash firmware_loader: Expand Firmware upload error codes with firmware invalid error Link: https://lore.kernel.org/r/20231221-droop-unblock-81e4fe14acee@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22Merge tag 'samsung-drivers-6.8' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers Samsung SoC driver changes for v6.8 1. Add support for Google GS101 SoC to different drivers: clock controller, serial and watchdog. The clock driver changes depend on few bindings headers, which I put in a topic branch with the bindings refactoring and GS101 support, therefore this this pull request includes that bindings topic branch. The rest of the bindings topic branch is not necessary here, however keeping everything together makes it easier to share between branches. The bindings topic branch is mostly refactoring all the compatibles to add SoC-specific compatible followed by fallback. 2. Exynos ChipID: recognize ExynosAutov920. * tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (40 commits) dt-bindings: clock: google,gs101: rename CMU_TOP gate defines watchdog: s3c2410_wdt: Add support for Google gs101 SoC watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro watchdog: s3c2410_wdt: Add support for WTCON register DBGACK_MASK bit tty: serial: samsung: Add gs101 compatible and common fifoszdt_serial_drv_data clk: samsung: clk-gs101: Add cmu_top, cmu_misc and cmu_apm support clk: samsung: clk-pll: Add support for pll_{0516,0517,518} dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix dt-bindings: soc: samsung: usi: add google,gs101-usi compatible dt-bindings: serial: samsung: Make samsung,uart-fifosize a required property dt-bindings: serial: samsung: Add google-gs101-uart compatible dt-bindings: watchdog: Document Google gs101 watchdog bindings dt-bindings: samsung: exynos-sysreg: combine exynosautov920 with other enum dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101 dt-bindings: clock: Add Google gs101 clock management unit bindings dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible dt-bindings: watchdog: samsung: add specific compatible for Tesla FSD dt-bindings: samsung: exynos-pmu: add specific compatible for Tesla FSD dt-bindings: serial: samsung: add specific compatible for Tesla FSD dt-bindings: pwm: samsung: add specific compatible for Tesla FSD ... Link: https://lore.kernel.org/r/20231220084722.22149-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22Merge tag 'qcom-drivers-for-6.8' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.8 Support for SM8650 and X1E is added to the LLCC driver, the LLCC_TRP_ATTR2_CFGn register stride is corrected, and a bug where for each iteration looping over slices previous settings for dis_cap_alloc and retain_on_pc are overwritten. A quirk is introduced in UCSI, for implementations that does not handle UCSI_GET_PDOS for non-PD partners. With this, USCI support is enabled by default in pmic_glink. It is later reverted for SC8280XP due reported errors. A few memory leaks in error paths of qseecom are taken care of. A small driver to expose the ADSP PDCharger ULOG debug log is introduced, to aid debugging issues with pmic_glink. The identiy of SM8650, PM8937 and a few DSPs are added to the Qualcomm socinfo driver. The Qualcomm sleep stats driver is extended to allow getting detailed statistics about usage of various DDR states. Unfortunately this ABI does not seem to be stable across platforms, so this addition is dropped again while the reported problems are investigated further. Andy is moved from MAINTAINERS to CREDITS. Thank you, Andy. * tag 'qcom-drivers-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (34 commits) soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offset firmware: qcom: qseecom: fix memory leaks in error paths soc: qcom: llcc: Fix typo in kernel-doc dt-bindings: soc: qcom,aoss-qmp: document the X1E80100 Always-On Subsystem side channel MAINTAINERS: qcom: move Andy Gross to credits soc: qcom: pmic_glink: drop stray semicolons soc: qcom: pmic_glink: disable UCSI on sc8280xp soc: qcom: llcc: Fix dis_cap_alloc and retain_on_pc configuration soc: qcom: pmic_pdcharger_ulog: Fix hypothetical ulog request message endianess soc: qcom: pmic_pdcharger_ulog: Move TRACE_SYSTEM out of #if protection soc: qcom: pmic_pdcharger_ulog: Search current directory for headers soc: qcom: socinfo: Add few DSPs to get their image details soc: qcom: llcc: Add missing description for members in slice config Revert "soc: qcom: stats: Add DDR sleep stats" dt-bindings: firmware: qcom,scm: Allow interconnect for everyone dt-bindings: firmware: qcom,scm: document SCM on X1E80100 SoCs soc: qcom: socinfo: Add PM8937 Power IC soc: qcom: llcc: Add configuration data for X1E80100 dt-bindings: cache: qcom,llcc: Add X1E80100 compatible soc: qcom: pmic_glink_altmode: fix port sanity check ... Link: https://lore.kernel.org/r/20231219041855.732578-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22Merge tag 'ti-driver-soc-for-v6.8' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/drivers TI SoC driver updates for v6.8 - ti_sci: Minor fixup for off by one error in debugfs_create - k3-socinfo: Refactoring and add j721e detection, j722s * tag 'ti-driver-soc-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: soc: ti: k3-socinfo: Add JTAG ID for J722S soc: ti: k3-socinfo: Revamp driver to accommodate different rev structs firmware: ti_sci: Fix an off-by-one in ti_sci_debugfs_create() Link: https://lore.kernel.org/r/20231218153043.r5psxbjjpccusjg4@september Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22Merge tag 'zynqmp-soc-for-6.8' of https://github.com/Xilinx/linux-xlnx into ↵Arnd Bergmann
soc/drivers arm64: ZynqMP SoC changes for 6.8 power driver: - Move to remove_new hook - Report error around unsupported callback - Fix long messages event driver: - Fix cpu_id handling - Fix warning message * tag 'zynqmp-soc-for-6.8' of https://github.com/Xilinx/linux-xlnx: soc: xilinx: Add error message for invalid payload received from IPI callback. soc: xilinx: fix unhandled SGI warning message soc: xilinx: fix quoted string split across lines soc: xilinx: Fix for call trace due to the usage of smp_processor_id() soc/xilinx: zynqmp_power: Convert to platform remove callback returning void Link: https://lore.kernel.org/r/CAHTX3dJ=6y=vEgmH7Qqe=6TJZT=D-egKDmLLER4fS0=OHJRGZA@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22Merge tag 'renesas-drivers-for-v6.8-tag1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers Renesas driver updates for v6.8 - Remove duplicate setup of soc_device_attribute.family, - Make RZ/Five depend on !DMA_DIRECT_REMAP. * tag 'renesas-drivers-for-v6.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: Make RZ/Five depend on !DMA_DIRECT_REMAP soc: renesas: Remove duplicate setup of soc_device_attribute.family Link: https://lore.kernel.org/r/cover.1702642340.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22Merge tag 'mtk-soc-for-v6.8' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers MediaTek soc driver updates for v6.8 This adds a refactoring of the MediaTek Smart Voltage Scaling (SVS) driver and the addition of support for MT8186 and MT8195 in it, and adds support for the MT8188 VDOSYS and resets in the MMSYS driver. * tag 'mtk-soc-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (24 commits) soc: mediatek: mtk-svs: Constify runtime-immutable members of svs_bank soc: mediatek: mtk-svs: Use ULONG_MAX to compare floor frequency soc: mediatek: mtk-svs: Check if SVS mode is available in the beginning soc: mediatek: mtk-svs: Cleanup of svs_probe() function soc: mediatek: mtk-svs: Compress of_device_id entries soc: mediatek: mtk-svs: Remove redundant print in svs_get_efuse_data soc: mediatek: mtk-svs: Commonize MT8192 probe function for MT8186 soc: mediatek: mtk-svs: Drop supplementary svs per-bank pointer soc: mediatek: mtk-svs: Commonize efuse parse function for most SoCs soc: mediatek: mtk-svs: Move t-calibration-data retrieval to svs_probe() soc: mediatek: mtk-svs: Add SVS-Thermal coefficient to SoC platform data soc: mediatek: mtk-svs: Add a map to retrieve fused values soc: mediatek: mtk-svs: Change the thermal sensor device name soc: mediatek: mtk-svs: Reduce memory footprint of struct svs_bank soc: mediatek: mtk-svs: Build bank name string dynamically soc: mediatek: mtk-svs: Convert sw_id and type to enumerations soc: mediatek: mtk-svs: Subtract offset from regs_v2 to avoid conflict soc: mediatek: Add MT8188 VDOSYS reset bit map soc: mediatek: Support reset bit mapping in mmsys driver soc: mediatek: Support MT8188 VDOSYS1 Padding in mtk-mmsys ... Link: https://lore.kernel.org/r/20231212114515.121695-2-angelogioacchino.delregno@collabora.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22Merge tag 'fsl_qmc_tsa_v6.8' of https://github.com//hcodina/linux into ↵Arnd Bergmann
soc/drivers PowerQUICC QMC and TSA drivers updates for v6.8 This pull request contains updates to prepare the support for the QMC HDLC driver. - Perform some fixes - Add support for child devices - Add QMC dynamic timeslot support Signed-off-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22Merge tag 'hisi-drivers-for-6.8' of https://github.com/hisilicon/linux-hisi ↵Arnd Bergmann
into soc/drivers HiSilicon driver updates for v6.8 - Add support for the platform with PCC type3 and interrupt ack - Few cleanups and improvements: correct the format of some strings and domain typo, add failure log * tag 'hisi-drivers-for-6.8' of https://github.com/hisilicon/linux-hisi: soc: hisilicon: kunpeng_hccs: Support the platform with PCC type3 and interrupt ack doc: kunpeng_hccs: Fix incorrect email domain name soc: hisilicon: kunpeng_hccs: Remove an unused blank line soc: hisilicon: kunpeng_hccs: Add failure log for no _CRS method soc: hisilicon: kunpeng_hccs: Fix some incorrect format strings Link: https://lore.kernel.org/r/6572C41B.6050703@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-18soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offsetAbel Vesa
According to documentation, it has increments of 4, not 8. Fixes: c72ca343f911 ("soc: qcom: llcc: Add v4.1 HW version support") Reported-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com> Reviewed-by: Satya Durga Srinivasu Prabhala <quic_satyap@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20231012160509.184891-1-abel.vesa@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17soc: qcom: llcc: Fix typo in kernel-docGhanshyam Agrawal
Fixed spelling of "descriptor". Signed-off-by: Ghanshyam Agrawal <ghanshyam1898@gmail.com> Link: https://lore.kernel.org/r/20231215070707.560350-1-ghanshyam1898@gmail.com [bjorn: Rewrote commit message] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15soc: qcom: pmic_glink: drop stray semicolonsJohan Hovold
Drop stray semicolons after function definitions to avoid having this be reproduced elsewhere. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20231208125827.10363-1-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15soc: qcom: pmic_glink: disable UCSI on sc8280xpJohan Hovold
Enabling UCSI on sc8280xp and the Lenovo ThinkPad X13s in particular results in a number of errors and timeouts during boot: [ 9.012421] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: GET_CONNECTOR_STATUS failed (-95) [ 14.047379] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: timeout waiting for UCSI sync write response [ 14.050708] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: GET_CONNECTOR_STATUS failed (-110) [ 20.192382] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: timeout waiting for UCSI sync write response [ 20.192542] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: GET_CONNECTOR_STATUS failed (-110) Disable UCSI on sc8280xp until this has been resolved. Fixes: 4db09e7b967b ("soc: qcom: pmic_glink: enable UCSI by default) Link: https://lore.kernel.org/r/ZXL5jvDHr-MuxMoz@hovoldconsulting.com Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231208125730.10323-1-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15soc: qcom: llcc: Fix dis_cap_alloc and retain_on_pc configurationAtul Dhudase
Commit c14e64b46944 ("soc: qcom: llcc: Support chipsets that can write to llcc") add the support for chipset where capacity based allocation and retention through power collapse can be programmed based on content of SCT table mentioned in the llcc driver where the target like sdm845 where the entire programming related to it is controlled in firmware. However, the commit introduces a bug where capacity/retention register get overwritten each time it gets programmed for each slice and that results in misconfiguration of the register based on SCT table and that is not expected behaviour instead it should be read modify write to retain the configuration of other slices. This issue is totally caught from code review and programming test and not through any power/perf numbers so, it is not known what impact this could make if we don't have this change however, this feature are for these targets and they should have been programmed accordingly as per their configuration mentioned in SCT table like others bits information. This change brings one difference where it keeps capacity/retention bits of the slices that are not mentioned in SCT table in unknown state where as earlier it was initialized to zero. Fixes: c14e64b46944 ("soc: qcom: llcc: Support chipsets that can write to llcc") Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/1701876771-10695-1-git-send-email-quic_mojha@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15soc: qcom: pmic_pdcharger_ulog: Fix hypothetical ulog request message endianessAndrew Halaney
Sparse reports the following: % ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make C=2 W=1 drivers/soc/qcom/pmic_pdcharger_ulog.o ... CC drivers/soc/qcom/pmic_pdcharger_ulog.o CHECK drivers/soc/qcom/pmic_pdcharger_ulog.c drivers/soc/qcom/pmic_pdcharger_ulog.c:57:34: warning: incorrect type in initializer (different base types) drivers/soc/qcom/pmic_pdcharger_ulog.c:57:34: expected restricted __le32 [usertype] owner drivers/soc/qcom/pmic_pdcharger_ulog.c:57:34: got int drivers/soc/qcom/pmic_pdcharger_ulog.c:58:33: warning: incorrect type in initializer (different base types) drivers/soc/qcom/pmic_pdcharger_ulog.c:58:33: expected restricted __le32 [usertype] type drivers/soc/qcom/pmic_pdcharger_ulog.c:58:33: got int drivers/soc/qcom/pmic_pdcharger_ulog.c:59:35: warning: incorrect type in initializer (different base types) drivers/soc/qcom/pmic_pdcharger_ulog.c:59:35: expected restricted __le32 [usertype] opcode drivers/soc/qcom/pmic_pdcharger_ulog.c:59:35: got int Let's deal with endianness conversion in the rare case this ever runs on a big-endian machine (and to quiet down sparse for this file). Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312060355.M0eJtq4X-lkp@intel.com/ Fixes: 086fdb48bc65 ("soc: qcom: add ADSP PDCharger ULOG driver") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231205-pmicpdcharger-ulog-fixups-v1-3-71c95162cb84@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15soc: qcom: pmic_pdcharger_ulog: Move TRACE_SYSTEM out of #if protectionAndrew Halaney
As specified in samples/trace_events/trace-events-sample.h: * Notice that TRACE_SYSTEM should be defined outside of #if * protection, just like TRACE_INCLUDE_FILE. Fixes: 086fdb48bc65 ("soc: qcom: add ADSP PDCharger ULOG driver") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231205-pmicpdcharger-ulog-fixups-v1-2-71c95162cb84@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15soc: qcom: pmic_pdcharger_ulog: Search current directory for headersAndrew Halaney
As specified in samples/trace_events/Makefile: If you include a trace header outside of include/trace/events then the file that does the #define CREATE_TRACE_POINTS must have that tracer file in its main search path. This is because define_trace.h will include it, and must be able to find it from the include/trace directory. Without this the following compilation error is seen: CC drivers/soc/qcom/pmic_pdcharger_ulog.o In file included from drivers/soc/qcom/pmic_pdcharger_ulog.h:36, from drivers/soc/qcom/pmic_pdcharger_ulog.c:15: ./include/trace/define_trace.h:95:42: fatal error: ./pmic_pdcharger_ulog.h: No such file or directory 95 | #include TRACE_INCLUDE(TRACE_INCLUDE_FILE) | ^ compilation terminated. Fixes: 086fdb48bc65 ("soc: qcom: add ADSP PDCharger ULOG driver") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231205-pmicpdcharger-ulog-fixups-v1-1-71c95162cb84@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15soc: qcom: socinfo: Add few DSPs to get their image detailsNaman Jain
Add support to get image details from SMEM for DSPs like DSPS (Sensors DSP), CDSP (Compute DSP), GPDSP (General purpose DSP) while also supporting this for more than one DSP of certain types. Signed-off-by: Naman Jain <quic_namajain@quicinc.com> Link: https://lore.kernel.org/r/20231205101018.6079-1-quic_namajain@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15soc: qcom: llcc: Add missing description for members in slice configAbel Vesa
Fix all warnings thrown due to missing description for some of the members in llcc_slice_config. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312050519.mup4Q8mD-lkp@intel.com/ Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20231205-llcc-fix-slice-config-warnings-v1-1-d6331d601dd3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15Revert "soc: qcom: stats: Add DDR sleep stats"Konrad Dybcio
After recent reports ([1], [2]) of older platforms (particularly 8150 and 7180) breaking after DDR sleep stats introduction, revert the following: Commit 73380e2573c3 ("soc: qcom: stats: fix 64-bit division") Commit e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats") The feature itself is rather useful for debugging DRAM power management, however it looks like the shared RPMh stats data structures differ on previous SoCs. Revert its addition for now to un-break booting on these earlier SoCs, while I try to come up with a better way to enable it conditionally. [1] https://lore.kernel.org/linux-arm-msm/20231209215601.3543895-2-dmitry.baryshkov@linaro.org/ [2] https://lore.kernel.org/linux-arm-msm/CAD=FV=XX4wLg1NNVL15RK4D4tLvuSzZyUv=k_tS4bSb3=7QJzQ@mail.gmail.com/ Reported-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reported-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20231214-topic-undo_ddr_stats-v1-1-1fe32c258e56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-13soc: renesas: Make RZ/Five depend on !DMA_DIRECT_REMAPConor Dooley
Randy reported yet another build issue with randconfigs on rv32: WARNING: unmet direct dependencies detected for DMA_GLOBAL_POOL Depends on [n]: !ARCH_HAS_DMA_SET_UNCACHED [=n] && !DMA_DIRECT_REMAP [=y] Selected by [y]: - ARCH_R9A07G043 [=y] && SOC_RENESAS [=y] && RISCV [=y] && NONPORTABLE [=y] && RISCV_ALTERNATIVE [=y] && !RISCV_ISA_ZICBOM [=n] && RISCV_SBI [=y] This happens when DMA_DIRECT_REMAP is selected by the T-Head CMO erratum option and DMA_GLOBAL_POOL is selected by the Andes CMO erratum. Block selecting the RZ/Five config option, and by extension DMA_GLOBAL_POOL, if DMA_DIRECT_REMAP has already been enabled. Reported-by: Randy Dunlap <rdunlap@infradead.org> Closes: https://lore.kernel.org/all/24942b4d-d16a-463f-b39a-f9dfcb89d742@infradead.org/ Tested-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231211-primate-arbitrate-fbcd307a0b00@spud Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-12-13soc: renesas: Remove duplicate setup of soc_device_attribute.familyGeert Uytterhoeven
As of commit 3f84aa5ec052dba9 ("base: soc: populate machine name in soc_device_register if empty") in v6.4, soc_device_register() fills in soc_device_attribute.family when it is still empty. Hence the identical code in renesas_soc_init() doing the same can be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/4c5e4d0d1819028466748ed684254fec41aae816.1701696627.git.geert+renesas@glider.be
2023-12-13soc: xilinx: Add error message for invalid payload received from IPI callback.Naman Trivedi Manojbhai
payload[0] of response buffer of zynqmp_pm_get_callback_data() contains valid payload or error code in case of error. Added error message to inform user about the error code received in payload[0]. Signed-off-by: Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/85749bde3e71148533d31ea2092f4514ec347768.1701962639.git.michal.simek@amd.com
2023-12-13soc: ti: k3-socinfo: Add JTAG ID for J722SVaishnav Achath
Add JTAG ID info for the J722S SoC family to enable SoC detection. More details about this SoC can be found in the TRM: https://www.ti.com/lit/zip/sprujb3 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20231211132600.25289-1-vaishnav.a@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-12-12soc: fsl: cpm1: qmc: Introduce functions to change timeslots at runtimeHerve Codina
Introduce qmc_chan_{get,set}_ts_info() function to allow timeslots modification at runtime. The modification is provided using qmc_chan_set_ts_info() and will be applied on next qmc_chan_start(). qmc_chan_set_ts_info() must be called with the channel rx and/or tx stopped. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-18-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Remove timeslots handling from setup_chan()Herve Codina
Timeslots setting is done at channel start() and stop(). There is no more need to do that during setup_chan(). Simply remove timeslot setting from setup_chan(). Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-17-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Handle timeslot entries at channel start() and stop()Herve Codina
In order to support runtime timeslot route changes, enable the channel timeslot entries at channel start() and disable them at channel stop(). Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-16-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Introduce is_tsa_64rxtx flagHerve Codina
In order to support runtime timeslot route changes, some operations will be different according the routing table used (common Rx and Tx table or one table for Rx and one for Tx). The is_tsa_64rxtx flag is introduced to avoid extra computation to determine the table format each time we need it. It is set once at initialization. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-15-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Split Tx and Rx TSA entries setupHerve Codina
The Tx and Rx entries for a given channel are set in one function. In order to modify Rx entries and Tx entries independently of one other, split this function in one for the Rx part and one for the Tx part. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-14-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Add support for disabling channel TSA entriesHerve Codina
In order to allow runtime timeslot route changes, disabling channel TSA entries needs to be supported. Add support for this new feature. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-13-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Check available timeslots in qmc_check_chans()Herve Codina
The timeslots checked in qmc_check_chans() are the timeslots used. With the introduction of the available timeslots, the used timeslots are a subset of the available timeslots. The timeslots checked during the qmc_check_chans() call should be the available ones. Simply update and check the available timeslots instead of the used timeslots in qmc_check_chans(). Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-12-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Remove no more needed checks from qmc_check_chans()Herve Codina
The newly introduced qmc_chan_setup_tsa* functions check that the channel entries are not already used. These checks are also performed by qmc_check_chans() and are no more needed. Remove them from qmc_check_chans(). Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-11-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Introduce qmc_chan_setup_tsa*Herve Codina
Introduce the qmc_chan_setup_tsa* functions to setup entries related to the given channel. Use them during QMC channels setup. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-10-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Rename qmc_setup_tsa* to qmc_init_tsa*Herve Codina
qmc_setup_tsa* are called once at initialisation. They initialize the QMC TSA table. In order to introduce setup function later on for dynamic timeslots management, rename the function to avoid later confusion. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-9-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Introduce available timeslots masksHerve Codina
Available timeslots masks define timeslots available for the related channel. These timeslots are defined by the QMC binding. Timeslots used are initialized to available timeslots but can be a subset of available timeslots. This prepares the dynamic timeslots management (ie. changing timeslots at runtime). Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-8-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Add support for child devicesHerve Codina
QMC child devices support is needed to avoid orphan DT nodes that use a simple DT phandle to reference a QMC channel. Allow to instantiate child devices and also extend the API to get the qmc_chan using a child device. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/20231205152116.122512-7-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Remove inline function specifiersHerve Codina
The inline function specifier is present on some functions but it is better to let the compiler decide inlining or not these functions. Remove inline specifiers. Fixes: 3178d58e0b97 ("soc: fsl: cpm1: Add support for QMC") Signed-off-by: Herve Codina <herve.codina@bootlin.com> Suggested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-6-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Extend the API to provide Rx statusHerve Codina
In HDLC mode, some status flags related to the data read transfer can be set by the hardware and need to be known by a QMC consumer for further analysis. Extend the API in order to provide these transfer status flags at the read complete() call. In TRANSPARENT mode, these flags have no meaning. Keep only one read complete() API and update the consumers working in transparent mode. In this case, the newly introduced flags parameter is simply unused. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-5-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Fix rx channel resetHerve Codina
The qmc_chan_reset_rx() set the is_rx_stopped flag. This leads to an inconsistent state in the following sequence. qmc_chan_stop() qmc_chan_reset() Indeed, after the qmc_chan_reset() call, the channel must still be stopped. Only a qmc_chan_start() call can move the channel from stopped state to started state. Fix the issue removing the is_rx_stopped flag setting from qmc_chan_reset() Fixes: 3178d58e0b97 ("soc: fsl: cpm1: Add support for QMC") Cc: stable@vger.kernel.org Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-4-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: qmc: Fix __iomem addresses declarationHerve Codina
Running sparse (make C=1) on qmc.c raises a lot of warning such as: ... warning: incorrect type in assignment (different address spaces) expected struct cpm_buf_desc [usertype] *[noderef] __iomem bd got struct cpm_buf_desc [noderef] [usertype] __iomem *txbd_free ... Indeed, some variable were declared 'type *__iomem var' instead of 'type __iomem *var'. Use the correct declaration to remove these warnings. Fixes: 3178d58e0b97 ("soc: fsl: cpm1: Add support for QMC") Cc: stable@vger.kernel.org Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-3-herve.codina@bootlin.com
2023-12-12soc: fsl: cpm1: tsa: Fix __iomem addresses declarationHerve Codina
Running sparse (make C=1) on tsa.c raises a lot of warning such as: --- 8< --- warning: incorrect type in assignment (different address spaces) expected void *[noderef] si_regs got void [noderef] __iomem * --- 8< --- Indeed, some variable were declared 'type *__iomem var' instead of 'type __iomem *var'. Use the correct declaration to remove these warnings. Fixes: 1d4ba0b81c1c ("soc: fsl: cpm1: Add support for TSA") Cc: stable@vger.kernel.org Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312051959.9YdRIYbg-lkp@intel.com/ Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-2-herve.codina@bootlin.com
2023-12-11soc: mediatek: mtk-svs: Constify runtime-immutable members of svs_bankAngeloGioacchino Del Regno
Some members of struct svs_bank are not changed during runtime, so those are not variables but constants: move all of those to a new structure called svs_bank_pdata and refactor the code to make use of that and reorder members by size where possible. This effectively moves at least 50 bytes to the text segment. While at it, also uniform the thermal zone names across the banks. Link: https://lore.kernel.org/r/20231121125044.78642-19-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11soc: mediatek: mtk-svs: Use ULONG_MAX to compare floor frequencyAngeloGioacchino Del Regno
The `freq` variable is of type unsigned long and, even though it does currently work with u32 because no frequency is higher than U32_MAX, it is not guaranteed that in the future we will see one. Initialize the freq variable with ULONG_MAX instead of U32_MAX. Link: https://lore.kernel.org/r/20231121125044.78642-18-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>