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path: root/drivers/net/wireless/ath/ath10k/hw.h
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2023-12-07wifi: ath10k: add support to allow broadcast action frame RXJames Prestwood
Broadcast action frames are needed for the Device Provisioning Protocol (DPP) for Presence and PKEX Exchange requests. Currently just ath9k has this capability so this is being enabled for ath10k (for at least one hardware variant). Add a new capability flag in ath10k_hw_params to indicate support for receiving multicast action frames. This bit is then checked when configuring the RX filter and (if set) multicast action frame registration is enabled. Until more hardware can be tested only the "qca6174 hw3.2" variant is enabling this feature. Note: I went ahead and removed the 'changed_flags' mask operation since it had no effect, that parameter was not being used anywhere. Tested-on: QCA6174 hw3.2 WLAN.RM.4.4.1-00288- Signed-off-by: James Prestwood <prestwoj@gmail.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20231116173246.40458-1-prestwoj@gmail.com
2023-11-30wifi: ath10k: Update Qualcomm Innovation Center, Inc. copyrightsJeff Johnson
Update the copyright for all ath10k files modified on behalf of Qualcomm Innovation Center, Inc. in 2021 through 2023. Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20231128-ath12kcopyrights-v1-3-be0b7408cbac@quicinc.com
2022-10-19wifi: ath10k: Delay the unmapping of the bufferYoughandhar Chintala
On WCN3990, we are seeing a rare scenario where copy engine hardware is sending a copy complete interrupt to the host driver while still processing the buffer that the driver has sent, this is leading into an SMMU fault triggering kernel panic. This is happening on copy engine channel 3 (CE3) where the driver normally enqueues WMI commands to the firmware. Upon receiving a copy complete interrupt, host driver will immediately unmap and frees the buffer presuming that hardware has processed the buffer. In the issue case, upon receiving copy complete interrupt, host driver will unmap and free the buffer but since hardware is still accessing the buffer (which in this case got unmapped in parallel), SMMU hardware will trigger an SMMU fault resulting in a kernel panic. In order to avoid this, as a work around, add a delay before unmapping the copy engine source DMA buffer. This is conditionally done for WCN3990 and only for the CE3 channel where issue is seen. Below is the crash signature: wifi smmu error: kernel: [ 10.120965] arm-smmu 15000000.iommu: Unhandled context fault: fsr=0x402, iova=0x7fdfd8ac0, fsynr=0x500003,cbfrsynra=0xc1, cb=6 arm-smmu 15000000.iommu: Unhandled context fault:fsr=0x402, iova=0x7fe06fdc0, fsynr=0x710003, cbfrsynra=0xc1, cb=6 qcom-q6v5-mss 4080000.remoteproc: fatal error received: err_qdi.c:1040:EF:wlan_process:0x1:WLAN RT:0x2091: cmnos_thread.c:3998:Asserted in copy_engine.c:AXI_ERROR_DETECTED:2149 remoteproc remoteproc0: crash detected in 4080000.remoteproc: type fatal error <3> remoteproc remoteproc0: handling crash #1 in 4080000.remoteproc pc : __arm_lpae_unmap+0x500/0x514 lr : __arm_lpae_unmap+0x4bc/0x514 sp : ffffffc011ffb530 x29: ffffffc011ffb590 x28: 0000000000000000 x27: 0000000000000000 x26: 0000000000000004 x25: 0000000000000003 x24: ffffffc011ffb890 x23: ffffffa762ef9be0 x22: ffffffa77244ef00 x21: 0000000000000009 x20: 00000007fff7c000 x19: 0000000000000003 x18: 0000000000000000 x17: 0000000000000004 x16: ffffffd7a357d9f0 x15: 0000000000000000 x14: 00fd5d4fa7ffffff x13: 000000000000000e x12: 0000000000000000 x11: 00000000ffffffff x10: 00000000fffffe00 x9 : 000000000000017c x8 : 000000000000000c x7 : 0000000000000000 x6 : ffffffa762ef9000 x5 : 0000000000000003 x4 : 0000000000000004 x3 : 0000000000001000 x2 : 00000007fff7c000 x1 : ffffffc011ffb890 x0 : 0000000000000000 Call trace: __arm_lpae_unmap+0x500/0x514 __arm_lpae_unmap+0x4bc/0x514 __arm_lpae_unmap+0x4bc/0x514 arm_lpae_unmap_pages+0x78/0xa4 arm_smmu_unmap_pages+0x78/0x104 __iommu_unmap+0xc8/0x1e4 iommu_unmap_fast+0x38/0x48 __iommu_dma_unmap+0x84/0x104 iommu_dma_free+0x34/0x50 dma_free_attrs+0xa4/0xd0 ath10k_htt_rx_free+0xc4/0xf4 [ath10k_core] ath10k_core_stop+0x64/0x7c [ath10k_core] ath10k_halt+0x11c/0x180 [ath10k_core] ath10k_stop+0x54/0x94 [ath10k_core] drv_stop+0x48/0x1c8 [mac80211] ieee80211_do_open+0x638/0x77c [mac80211] ieee80211_open+0x48/0x5c [mac80211] __dev_open+0xb4/0x174 __dev_change_flags+0xc4/0x1dc dev_change_flags+0x3c/0x7c devinet_ioctl+0x2b4/0x580 inet_ioctl+0xb0/0x1b4 sock_do_ioctl+0x4c/0x16c compat_ifreq_ioctl+0x1cc/0x35c compat_sock_ioctl+0x110/0x2ac __arm64_compat_sys_ioctl+0xf4/0x3e0 el0_svc_common+0xb4/0x17c el0_svc_compat_handler+0x2c/0x58 el0_svc_compat+0x8/0x2c Tested-on: WCN3990 hw1.0 SNOC WLAN.HL.2.0-01387-QCAHLSWMTPLZ-1 Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Youghandhar Chintala <quic_youghand@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20221012142733.32420-1-quic_youghand@quicinc.com
2022-08-09wifi: ath10k: Set tx credit to one for WCN3990 snoc based devicesYoughandhar Chintala
Currently host can send two WMI commands at once. There is possibility to cause SMMU issues or corruption, if host wants to initiate 2 DMA transfers, it is possible when copy complete interrupt for first DMA reaches host, CE has already updated SRRI (Source ring read index) for both DMA transfers and is in the middle of 2nd DMA. Host uses SRRI (Source ring read index) to interpret how many DMA’s have been completed and tries to unmap/free both the DMA entries. Hence now it is limiting to one.Because CE is still in the middle of 2nd DMA which can cause these issues when handling two DMA transfers. This change will not impact other targets, as it is only for WCN3990. Tested-on: WCN3990 hw1.0 SNOC WLAN.HL.2.0-01387-QCAHLSWMTPLZ-1 Signed-off-by: Youghandhar Chintala <quic_youghand@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220801134941.15216-1-quic_youghand@quicinc.com
2022-03-21ath10k: Trigger sta disconnect on hardware restartYoughandhar Chintala
Currently after the hardware restart triggered from the driver, the station interface connection remains intact, since a disconnect trigger is not sent to userspace. This can lead to a problem in targets where the wifi mac sequence is added by the firmware. After the target restart, its wifi mac sequence number gets reset to zero. Hence AP to which our device is connected will receive frames with a wifi mac sequence number jump to the past, thereby resulting in the AP dropping all these frames, until the frame arrives with a wifi mac sequence number which AP was expecting. To avoid such frame drops, its better to trigger a station disconnect upon target hardware restart which can be done with API ieee80211_reconfig_disconnect exposed to mac80211. The other targets are not affected by this change, since the hardware params flag is not set. Tested-on: WCN3990 hw1.0 SNOC WLAN.HL.3.1-01040-QCAHLSWMTPLZ-1 Tested-on: QCA6174 hw3.2 PCI WLAN.RM.4.4.1-00110-QCARMSWP-1 Tested-on: QCA6174 hw3.2 SDIO WLAN.RMH.4.4.1-00048 Signed-off-by: Youghandhar Chintala <youghand@codeaurora.org> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220315082944.12406-3-youghand@codeaurora.org
2022-01-17ath10k: abstract htt_rx_desc structureFrancesco Magliocca
QCA6174 card often hangs with the current htt_rx_desc memory layout in some circumstances, because its firmware fails to handle length differences. Therefore we must abstract the htt_rx_desc structure and operations on it, to allow different wireless cards to use different, unrelated rx descriptor structures. Define a base htt_rx_desc structure and htt_rx_desc_v1 for use with the QCA family of ath10k supported cards and htt_rx_desc_v2 for use with the WCN3990 card. Define htt_rx_desc_ops which contains the abstract operations to access the generic htt_rx_desc, give implementations for each card and update htt_rx.c to use the defined abstract interface to rx descriptors. Fixes: e3def6f7ddf8 ("ath10k: Update rx descriptor for WCN3990 target") Tested-on: QCA6174 hw3.2 PCI WLAN.RM.4.4.1-00157-QCARMSWPZ-1 Co-developed-by: Enrico Lumetti <enrico@fracta.dev> Signed-off-by: Enrico Lumetti <enrico@fracta.dev> Signed-off-by: Francesco Magliocca <franciman12@gmail.com> Link: https://lore.kernel.org/ath10k/CAH4F6usFu8-A6k5Z7rU9__iENcSC6Zr-NtRhh_aypR74UvN1uQ@mail.gmail.com/ Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20211216151823.68878-1-franciman12@gmail.com
2021-12-07ath10k: Fix the MTU size on QCA9377 SDIOFabio Estevam
On an imx6dl-pico-pi board with a QCA9377 SDIO chip, simply trying to connect via ssh to another machine causes: [ 55.824159] ath10k_sdio mmc1:0001:1: failed to transmit packet, dropping: -12 [ 55.832169] ath10k_sdio mmc1:0001:1: failed to submit frame: -12 [ 55.838529] ath10k_sdio mmc1:0001:1: failed to push frame: -12 [ 55.905863] ath10k_sdio mmc1:0001:1: failed to transmit packet, dropping: -12 [ 55.913650] ath10k_sdio mmc1:0001:1: failed to submit frame: -12 [ 55.919887] ath10k_sdio mmc1:0001:1: failed to push frame: -12 , leading to an ssh connection failure. One user inspected the size of frames on Wireshark and reported the followig: "I was able to narrow the issue down to the mtu. If I set the mtu for the wlan0 device to 1486 instead of 1500, the issue does not happen. The size of frames that I see on Wireshark is exactly 1500 after setting it to 1486." Clearing the HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE avoids the problem and the ssh command works successfully after that. Introduce a 'credit_size_workaround' field to ath10k_hw_params for the QCA9377 SDIO, so that the HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE is not set in this case. Tested with QCA9377 SDIO with firmware WLAN.TF.1.1.1-00061-QCATFSWPZ-1. Fixes: 2f918ea98606 ("ath10k: enable alt data of TX path for sdio") Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20211124131047.713756-1-festevam@denx.de
2021-01-28ath10k: allow dynamic SAR power limits via common APICarl Huang
ath10k assigns ath10k_mac_set_sar_specs to ath10k_ops, and this function is called when user space application calls NL80211_CMD_SET_SAR_SPECS. ath10k also registers SAR type, and supported frequency ranges to wiphy so user space can query SAR capabilities. This SAR power limitation is compared to regulatory txpower and selects the minimal one to set when station is connected. Otherwise, it delays until the station is connected. If the station is disconnected, it returns to regulatory txpower. This feature is controlled by hw parameter: dynamic_sar_support. Tested-on: QCA6174 hw3.2 PCI WLAN.RM.4.4.1-00110-QCARMSWP-1 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Reviewed-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Abhishek Kumar <kuabhs@chromium.org> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20201203103728.3034-4-cjhuang@codeaurora.org
2020-09-01ath10k: Get rid of "per_ce_irq" hw paramDouglas Anderson
As of the patch ("ath10k: Keep track of which interrupts fired, don't poll them") we now have no users of this hardware parameter. Remove it. Suggested-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200709082024.v2.2.I083faa4e62e69f863311c89ae5eb28ec5a229b70@changeid
2020-05-11ath10k: Replace zero-length array with flexible-arrayGustavo A. R. Silva
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] sizeof(flexible-array-member) triggers a warning because flexible array members have incomplete type[1]. There are some instances of code in which the sizeof operator is being incorrectly/erroneously applied to zero-length arrays and the result is zero. Such instances may be hiding some bugs. So, this work (flexible-array member conversions) will also help to get completely rid of those sorts of issues. This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200507041127.GA31587@embeddedor
2020-04-28ath10k: add rx bitrate report for SDIOWen Gong
For SDIO chip, its rx indication is struct htt_rx_indication_hl, which does not include the bitrate info as well as PCIe, for PCIe, it use function ath10k_htt_rx_h_rates to parse the bitrate info in struct rx_ppdu_start and then report it to mac80211 via ieee80211_rx_status. SDIO does not have the same info as PCIe, then iw command can not get the rx bitrate by "iw wlan0 station dump". for example, it always show 6.0 MBit/s localhost ~ # iw wlan0 link Connected to 3c:28:6d:96:fd:69 (on wlan0) SSID: kukui_test freq: 5180 RX: 111800 bytes (595 packets) TX: 35419 bytes (202 packets) signal: -41 dBm rx bitrate: 6.0 MBit/s This patch is to send WMI_TLV_REQUEST_PEER_STATS_INFO_CMDID to firmware for ath10k_sta_statistics and save the rx bitrate for WMI event WMI_TLV_PEER_STATS_INFO_EVENTID. This patch only effect SDIO chip, ath10k_mac_sta_get_peer_stats_info has check for bitrate_statistics of hw_params, this patch only enable it for "qca6174 hw3.2 sdio". Tested with QCA6174 SDIO firmware WLAN.RMH.4.4.1-00042. Signed-off-by: Wen Gong <wgong@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200427080416.8265-3-wgong@codeaurora.org
2020-04-09ath10k: disable TX complete indication of htt for sdioWen Gong
For sdio chip, it is high latency bus, all the TX packet's content will be tranferred from HOST memory to firmware memory via sdio bus, then it need much more memory in firmware than low latency bus chip, for low latency chip, such as PCI-E, it only need to transfer the TX descriptor via PCI-E bus to firmware memory. For sdio chip, reduce the complexity of TX logic will help TX efficiency since its memory is limited, and it will reduce the TX circle's time of each packet and then firmware will have more memory for TX since TX complete also need memeory. This patch disable TX complete indication from firmware for htt data packet, it will not have TX complete indication from firmware to ath10k. It will cut the cost of bus bandwidth of TX complete and make the TX logic of firmware simpler, it results in significant performance improvement on TX path. Udp TX throughout is 130Mbps without this patch, and it arrives 400Mbps with this patch. The downside of this patch is the command "iw wlan0 station dump" will show 0 for "tx retries" and "tx failed" since all tx packet's status is success. This patch only effect sdio chip, it will not effect PCI, SNOC etc. Tested with QCA6174 SDIO with firmware WLAN.RMH.4.4.1-00017-QCARMSWPZ-1 Signed-off-by: Wen Gong <wgong@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200212080415.31265-2-wgong@codeaurora.org
2020-03-11ath10k: add QCA9377 sdio hw_param itemErik Stromdahl
Add hardware parameters for QCA9377 sdio devices, it's now properly supported. Signed-off-by: Erik Stromdahl <erik.stromdahl@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2020-01-26Revert "ath10k: fix DMA related firmware crashes on multiple devices"Zhi Chen
This reverts commit 76d164f582150fd0259ec0fcbc485470bcd8033e. PCIe hung issue was observed on multiple platforms. The issue was reproduced when DUT was configured as AP and associated with 50+ STAs. For QCA9984/QCA9888, the DMA_BURST_SIZE register controls the AXI burst size of the RD/WR access to the HOST MEM. 0 - No split , RAW read/write transfer size from MAC is put out on bus as burst length 1 - Split at 256 byte boundary 2,3 - Reserved With PCIe protocol analyzer, we can see DMA Read crossing 4KB boundary when issue happened. It broke PCIe spec and caused PCIe stuck. So revert the default value from 0 to 1. Tested: IPQ8064 + QCA9984 with firmware 10.4-3.10-00047 QCS404 + QCA9984 with firmware 10.4-3.9.0.2--00044 Synaptics AS370 + QCA9888 with firmware 10.4-3.9.0.2--00040 Signed-off-by: Zhi Chen <zhichen@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-11-25ath10k: add large size for BMI download data for SDIOWen Gong
Download firmware time cost of SDIO is too long, it is about 480ms, add large size 2048 bytes for BMI download for SDIO chip, its time cost will reduced to 240ms. This will optimize the download firmware time cost. Tested with QCA6174 SDIO with firmware WLAN.RMH.4.4.1-00017-QCARMSWP-1. Signed-off-by: Wen Gong <wgong@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-10-02ath10k: add support for hardware rfkillWen Gong
When hardware rfkill is enabled in the firmware it will report the capability via using WMI_TLV_SYS_CAP_INFO_RFKILL bit in the WMI_SERVICE_READY event to the host. ath10k will check the capability, and if it is enabled then ath10k will set the GPIO information to firmware using WMI_PDEV_SET_PARAM. When the firmware detects hardware rfkill is enabled by the user, it will report it via WMI_RFKILL_STATE_CHANGE_EVENTID. Once ath10k receives the event it will send wmi command WMI_PDEV_SET_PARAM to the firmware to enable/disable the radio and also notifies cfg80211. We can't power off the device when rfkill is enabled, as otherwise the firmware would not be able to detect GPIO changes and report them to the host. So when rfkill is enabled, we need to keep the firmware running. Tested with QCA6174 PCI with firmware WLAN.RM.4.4.1-00109-QCARMSWPZ-1. Signed-off-by: Alan Liu <alanliu@codeaurora.org> Signed-off-by: Wen Gong <wgong@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-06-27ath10k: add new hw_ops for sdio chipWen Gong
It report error message while suspend/resume test. dmesg log: [ 150.749962] ath10k_sdio mmc1:0001:1: hif read32 not supported [ 150.755728] ath10k_sdio mmc1:0001:1: failed to set coverage class: expected integer microsecond value in register Reason is sdio chip does not support set_coverage_class as well as pcie chip, remove the set_coverage_class handler will avoid it. callstack of the error message: OUTLINED_FUNCTION_6+0xc/0x14 [ath10k_core] ath10k_mac_op_set_coverage_class+0x2c/0x40 [ath10k_core] ieee80211_reconfig+0x5d0/0x108c [mac80211] ieee80211_resume+0x34/0x6c [mac80211] wiphy_resume+0xbc/0x13c [cfg80211] dpm_run_callback+0xa4/0x168 device_resume+0x1d4/0x200 async_resume+0x1c/0x34 async_run_entry_fn+0x48/0xf8 process_one_work+0x178/0x2f8 worker_thread+0x1d8/0x2cc kthread+0x11c/0x12c ret_from_fork+0x10/0x18 the error log will not happen after this patch applied. Tested with QCA6174 SDIO with firmware WLAN.RMH.4.4.1-00007-QCARMSWP-1. Signed-off-by: Wen Gong <wgong@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-06-25ath10k: enabling tx stats support over pktlogBalaji Pothunoori
For QCA988X target, pktlog gives details of the tx bitrate which is used in the driver for station info. Enabling pktlog by default will cause more interrupts in target to host CE pipe, which can impact more CPU usage for targets ex:WCN3990 and also not required for all other platforms (eg: WCN3990), for getting tx bitrate. Enable pktlog only for QCA988X based on hardware params. Tested HW : WCN3990 Tested FW : WLAN.HL.3.1-00784-QCAHLSWMTPLZ-1 Fixes: e8123bb74c4e ("ath10k: add per peer tx stats support for 10.2.4") Signed-off-by: Balaji Pothunoori <bpothuno@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-06-25ath10k: change firmware file name for UTF mode of SDIO/USBWen Gong
Firmware name for UTF mode of SDIO has changed from utf-2.bin to utf-sdio-2.bin, so it need to change in ath10k, otherwise it will fail for UTF mode. After change the name in ath10k, it will success for UTF mode of SDIO/USB. Tested with QCA6174 SDIO with firmware WLAN.RMH.4.4.1-00007-QCARMSWP-1. Signed-off-by: Wen Gong <wgong@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-06-25ath10k: add support for firmware crash recovery on SDIO chipWen Gong
The command to simulate firmware crash: echo soft > /sys/kernel/debug/ieee80211/phy0/ath10k/simulate_fw_crash It will send WMI_FORCE_FW_HANG_ASSERT to firmware, then it will trigger CPU interrupt status register for SDIO chip, ath10k driver need to configure it while enable SDIO interrupt, otherwise ath10k driver will not get the assert error info. After this change, it will success for simulate firmware crash. Tested with QCA6174 SDIO with firmware WLAN.RMH.4.4.1-00007-QCARMSWP-1. Signed-off-by: Wen Gong <wgong@codeaurora.org> Tested-by: Claire Chang <tientzu@chromium.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-04-29ath10k: enable QCA6174 hw3.2 SDIO hardwareWen Gong
After implementing PN replay check we can enable SDIO support on QCA6174. Tested with client mode on all security modes, and fragmentation as well. AP mode does not work yet. Also tone down the warning about SDIO being not ready yet. Tested on QCA6174 SDIO with firmware WLAN.RMH.4.4.1-00007-QCARMSWP-1. AP mode is not working yet. Signed-off-by: Wen Gong <wgong@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-04-23ath10k: sdio: workaround firmware UART pin configuration bugWen Gong
On QCA6174 SDIO devices the SDIO interrupt will fail if UART is disabled from ath10k. SDIO firmware enables UART printouts by default. If ath10k will try to enable UART again the firmware will configure it's GPIO line incorrectly and SDIO interrupts won't work anymore. The workaround is to set UART pin again (19 for QCA6174 SDIO) if uart_print is 0. Tested with QCA6174 SDIO with firmware WLAN.RMH.4.4.1-00007-QCARMSWP-1. Signed-off-by: Wen Gong <wgong@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-02-26ath10k: update the max num of peers supported for WCN3990Abhishek Ambure
WCN3990 firmware versions WLAN.HL.2.0-01617-QCAHLSWMTPLZ-1 & onwards supports maximum 33 peers including self peer. To support maximum peers, send updated peer param to firmware during initialization. Tested HW: WCN3990 Tested FW: WLAN.HL.3.1-00784-QCAHLSWMTPLZ-1 Signed-off-by: Abhishek Ambure <aambure@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-02-26ath10k: add support for ack rssi value of data tx packetsAbhishek Ambure
In WCN3990, WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI service Indicates that the firmware has the capability to send the RSSI value of the ACK for all data and management packets transmitted. If WMI_RSRC_CFG_FLAG_TX_ACK_RSSI is set in host capability then firmware sends RSSI value in "data" tx completion event. Host extracts ack rssi values of data packets from their tx completion event. Tested HW: WCN3990 Tested FW: WLAN.HL.2.0-01617-QCAHLSWMTPLZ-1 Signed-off-by: Abhishek Ambure <aambure@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-02-20ath10k: switch to use SPDX license identifiersKalle Valo
Use SPDX identifiers everywhere in ath10k. Makefile was incorrectly marked in commit b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license"), fix that as well. Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-02-07ath10k: reduce transmit msdu countAlagu Sankar
Reduce the transmit MSDU count for SDIO, to match with the descriptors as used by the firmware. This also acts as a high watermark level for transmit. Too many packets to the firmware results in transmit overflow interrupt. It only affect SDIO chip, it will not cause functionaly changes to other hardware. Tested with QCA6174 SDIO with firmware WLAN.RMH.4.4.1-00005-QCARMSWP-1. Signed-off-by: Alagu Sankar <alagusankar@silex-india.com> Signed-off-by: Wen Gong <wgong@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-02-04ath10k: Set DMA address mask to 35 bit for WCN3990Rakesh Pillai
WCN3990 is a 37-bit target but can address memory range only upto 35 bits. The 36th bit is used to control the smmu/iommu translation and the 37th bit is used by the internal bus masters to access the wifi subsystem internal SRAM. With the DMA mask set to 37i-bit, the host driver can get 37-bit dma address, which leads to incorrect address access in the target. Hence the host driver can used addresses upto 35-bit for WCN3990. Fix the dma mask for wcn3990 to 35-bit, instead of 37-bit. Tested HW: WCN3990 Tested FW: WLAN.HL.2.0-01188-QCAHLSWMTPLZ-1 Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-12-20ath10k: fix warning due to msdu limit errorBhagavathi Perumal S
Some hardwares variants (QCA99x0) are limiting msdu deaggregation with some threshold value(default limit in QCA99x0 is 64 msdus), it was introduced to avoid excessive MSDU-deaggregation in error cases. When number of sub frames exceeds the limit, target hardware will send all msdus starting from present msdu in RAW format as a single msdu packet and it will be indicated with error status bit "RX_MSDU_END_INFO0_MSDU_LIMIT_ERR" set in rx descriptor. This msdu frame is a partial raw MSDU and does't have first msdu and ieee80211 header. It caused below warning message. [ 320.151332] ------------[ cut here ]------------ [ 320.155006] WARNING: CPU: 0 PID: 3 at drivers/net/wireless/ath/ath10k/htt_rx.c:1188 In our issue case, MSDU limit error happened due to FCS error and generated this warning message. This fixes the warning by handling the MSDU limit error. If msdu limit error happens, driver adds first MSDU's ieee80211 header and sets A-MSDU present bit in QOS header so that upper layer processes this frame if it is valid or drop it if FCS error set. And removed the warning message, hence partial msdus without first msdu is expected in msdu limit error cases. Tested on QCA9984, Firmware 10.4-3.6-00104 Signed-off-by: Bhagavathi Perumal S <bperumal@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-09-06ath10k: add bus type check in ath10k_init_hw_paramsErik Stromdahl
The bus type is used together with the other hw parameters to find a matching entry in ath10k_hw_params_list for the device. This is necessary since HL devices can have the same dev_id and target_version as a corresponding LL device (same chipset) and yet use a totally different configuration. Signed-off-by: Erik Stromdahl <erik.stromdahl@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-09-06ath10k: download firmware via diag Copy Engine for QCA6174 and QCA9377.Carl Huang
Downloading firmware via BMI protocol takes too long time. For example, a ~700K bytes firmware takes about 500ms to download via BMI protocol. This is too long especially in suspend and resume scenario where firmware is re-downloaded unless WoWLAN is enabled. Downloading firmware via diag CE can reduce the time to ~40ms for a ~700K bytes firmware binary. Ath10k driver parses the firmware to segments and downloads the segments to the specified address directly. If the firmware is compressed or has unsupported segments, ath10k driver will try BMI download again. It's tested with QCA6174 hw3.2 and firmware-6.bin_WLAN.RM.4.4.1-00111-QCARMSWP-1. QCA9377 is also affected. Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-09-06ath10k: support extended board data download for dual-band QCA9984Sathishkumar Muruganandam
To support dual-band variant of QCA9984, new extended board data (eBDF) is introduced since existing board data ran out of space. Below is the brief implementation & design detail, ---------------------------------------------------- 1. New OTP changes to inform eBDF support in existing OTP download to fetch board ID and chip ID. This is backward compatible and older card sends 0 by default for eBDF support bit (bit 18 of OTP response) we check in ath10k driver. 2. If eBDF is supported, then we need to fetch eBDF ID which is bundled in downloaded board data. So again OTP is executed for knowing the eBDF ID. This is done once we set 'board_data_initialized' bit. If eBDF ID returned is zero, we continue booting with previous board data downloaded. 3. Based on the eBDF ID fetched, ath10k driver tries to download the extended board data to a new offset ahead of already downloaded board data address. 4. A new BD IE type, ATH10K_BD_IE_BOARD_EXT is added to differentiate in bundling eBDF separately in board-2.bin and also to parse through board bundle for eBDF download in ath10k boot. 5. If eBDF is not present in the board-2.bin bundle or when board ID is zero, we do a fallback boot to "eboard.bin" in the same QCA9984/hw1.0 dir. This is same as done to existing "board.bin" if board ID is not present in board-2.bin bundle. Current design is that eBDF size will be 2KB and eBDF ID will be byte value. Tested the above changes with dual-band variant of QCA9984 card. OTP update needed for the test will be part of next FW release 10.4-3.6-xxxx. Below are the logs with ath10k BOOT debugs enabled. First OTP response : --------------------- .. boot upload otp to 0x1234 len 9478 for board id boot get otp board id result 0x00040400 board_id 1 chip_id 0 ext_bid_support 1 .. Second OTP response : --------------------- .. boot upload otp to 0x1234 len 9478 for ext board id boot get otp ext board id result 0x00000005 ext_board_id 5 boot using eboard name 'bus=pci,bmi-chip-id=0,bmi-eboard-id=5' .. Extended board data download: ------------------------------ .. board name 00000000: 62 75 73 3d 70 63 69 2c 62 6d 69 2d 63 68 69 70 bus=pci,bmi-chip 00000010: 2d 69 64 3d 30 2c 62 6d 69 2d 65 62 6f 61 72 64 -id=0,bmi-eboard 00000020: 2d 69 64 3d 35 -id=5 boot found match for name 'bus=pci,bmi-chip-id=0,bmi-eboard-id=5' boot found eboard data for 'bus=pci,bmi-chip-id=0,bmi-eboard-id=5' using board api 2 boot writing ext board data to addr 0xc3000 .. Fallback Extended board data download from "eboard.bin": --------------------------------------------------------- .. board name 00000000: 62 75 73 3d 70 63 69 2c 62 6d 69 2d 63 68 69 70 bus=pci,bmi-chip 00000010: 2d 69 64 3d 30 2c 62 6d 69 2d 62 6f 61 72 64 2d -id=0,bmi-board- 00000020: 69 64 3d 31 30 id=10 failed to fetch board data for bus=pci,bmi-chip-id=0,bmi-eboard-id=5 from ath10k/QCA9984/hw1.0/board-2.bin boot fw request 'ath10k/QCA9984/hw1.0/eboard.bin': 0 using board api 1 boot writing ext board data to addr 0xc3000 .. Signed-off-by: Sathishkumar Muruganandam <murugana@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-08-28ath10k: skip resetting rx filter for WCN3990Rakesh Pillai
WCN3990 has the MAC_PCU_ADDR1 configured properly and hence it will not send spurious ack frames during boot up. Hence the reset_rx_filter workaround is not needed for WCN3990. Add a hw_param to indicate if hardware rx filter reset is needed and skip the reset_rx_filter for WCN3990. Tested HW: WCN3990 Tested FW: WLAN.HL.2.0-01188-QCAHLSWMTPLZ-1 Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-07-30ath10k: handle mgmt tx completion eventRakesh Pillai
WCN3990 transmits management frames via WMI with reference. Currently, with the management tx completion not being handled, these frames are not getting freed even after the transmission status is returned by the firmware. The transmitted management frames should be freed when the firmware sends the over-the-air tx status of the corresponding management frames. Handle the wmi mgmt tx completion event and free the corresponding management frame. Tested HW: WCN3990 Tested FW: WLAN.HL.2.0-01188-QCAHLSWMTPLZ-1 Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-06-14ath10k: fix spectral scan for QCA9984 and QCA9888 chipsetsKarthikeyan Periyasamy
The spectral scan has been always broken on QCA9984 and QCA9888. Introduce a hardware parameter 'spectral_bin_offset' to resolve this issue for QCA9984 and QCA9888 chipsets. For other chipsets, the hardware parameter 'spectral_bin_offset' is zero so that existing behaviour is retained as it is. In QCA9984 and QCA9888 chipsets, hardware param value 'spectral_bin_discard' is 12 bytes. This 12 bytes is derived as the sum of segment index (4 bytes), extra bins before the actual data (4 bytes) and extra bins after the actual data (4 bytes). Always discarding (12 bytes) happens at end of the samples and incorrect samples got dumped, so that user can find incorrect arrangement samples in spectral scan dump. To fix this issue, we have to discard first 8 bytes and last 4 bytes in every samples, so totally 12 bytes are discarded. In every sample we need to consider the offset while taking the actual spectral data. For QCA9984, QCA9888 the offset is 8 bytes (segment index + extra bins before actual data). Hardware tested: QCA9984 and QCA9888 Firmware tested: 10.4-3.5.3-00053 Signed-off-by: Karthikeyan Periyasamy <periyasa@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-05-12ath10k: hw: make consistent usage of ATH10K_FW_DIR in pathsMarcus Folkesson
For some reason not all entries used ATH10K_FW_DIR so fix that. No functional changes. Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-04-24ath10k: enable SRRI/DRRI support on ddr for WCN3990Govind Singh
SRRI/DRRI are not mapped in the HW Shadow block and can lead to un-clocked access if common subsystem in the target is powered down due to idle mode. To mitigate this problem SRRI/DRRI can be read from DDR instead of doing an actual hardware read. Host allocates non cached memory on ddr and configures the physical address of this memory to the CE hardware. The hardware updates the RRI on this particular location. Read SRRI/DRRI from DDR location instead of direct target read. Enable retention restore on ddr using hw params to enable in specific targets. Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-04-24ath10k: add hw params for shadow register supportRakesh Pillai
wcn3990 supports shadow register for ce write. Add a hw param for shadow register support. Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-04-19ath10k: fix fw path name for WCN3990 targetGovind Singh
FW path is mapped incorrectly for the WCN3990 hw version. Fix fw path with correct hw1.0 name. Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-04-19ath10k: check all CE for data if irq summary is not retainedRakesh Pillai
WCN3990 has interrupts per CE and the interrupt summary is not retained after the interrupt handler has finished execution. We need to check if we received any ce in rx and tx completion path. Generate a interrupt summary with all CE interrupts if the target does not retain interrupt summary after the execution of interrupt handler. Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-02-07ath10k: add support for Ubiquiti rebranded QCA988X v2Tobias Schramm
Some modern Ubiquiti devices contain a rebranded QCA988X rev2 with a custom Ubiquiti vendor and device id. This patch adds support for those devices, treating them as a QCA988X v2. Signed-off-by: Tobias Schramm <tobleminer@gmail.com> [kvalo@codeaurora.org: rebase, add missing fields in hw_params, fix a long line in pci.c:61] Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-12-27ath10k: update copyright yearKalle Valo
Update year for Qualcomm Atheros, Inc. copyrights. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: add memory dump support for QCA6174/QCA9377Alan Liu
Add memory dump to the firmware crash data file which is provided to user space via devcoredump interface. This makes it easier for firmware engineers to debug firmware crashes. Due to increased memory consumption the memory dump is disabled by default. To enable it make sure that bit 3 is set in coredump_mask module parameter: modprobe ath10k_core coredump_mask=0xffffffff When RAMDUMP is enabled a buffer for the dump is allocated with vmalloc during device probe. The actual memory layout is different in hardware versions and the layouts are defined in coredump.c. The memory is split to regions and, to get even finegrained control of what to copy, the region can split to smaller sections as not all registers are readable (which could cause the whole system to stall). Signed-off-by: Alan Liu <alanliu@qca.qualcomm.com> [kvalo@qca.qualcomm.com: refactoring and cleanup] Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Add hw param for rx ring size supportGovind Singh
WCN3990 uses larger ring size in comparison to existing ring size value. Add rx ring size hw param for supporting different rx ring size across multiple target. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-27ath10k: Add hw param for 64-bit address supportRakesh Pillai
WCN3990 target supports 37-bit addressing mode. In order to accommodate extended address support, add hw param to indicate if the target supports addressing above 32-bits. Signed-off-by: Rakesh Pillai <pillair@qti.qualcomm.com> Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-14ath10k: wmi: add hw params entry for wcn3990Rakesh Pillai
Add hw params entry for wcn3990 and populate various target specific values for wcn3990. Signed-off-by: Rakesh Pillai <pillair@qti.qualcomm.com> Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-12-14ath10k: wmi: get wmi init parameter values from hw paramsRakesh Pillai
The parameter values for skid limit, number of peers and wds entries values which are sent in wmi init cmd are hardware specific. Add support to obtain skid limit, number of peers and wds entries values from hw params which will have the hw specific values for these parameters. Signed-off-by: Rakesh Pillai <pillair@qti.qualcomm.com> Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-10-13ath10k: add new cipher suite supportRajkumar Manoharan
QCA99x0 and QCA4019 family chips support CCMP-256, GCMP-128, and GCMP-256 ciphers in hardware, so advertise support for these. As firmware does not support group management frame ciphers (BIP), handle them in software (mac80211). Reviewed-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Cc: Jouni Malinen <jouni@qca.qualcomm.com> Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-09-25ath10k: make ath10k_hw_ce_regs constBhumika Goyal
Make them const as they are not modified in the file referencing them. They are only stored in the const field 'hw_ce_reg' of an ath10k structure. Also, make the declarations in the header const. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-08-03ath10k: add tdls support for 10.4 firmwaresManikanta Pubbisetty
This patch adds the support of TDLS feature for 10.4 firmware versions. A new WMI service is added to advertise the support of TDLS for 10.4 firmwares. Signed-off-by: Manikanta Pubbisetty <mpubbise@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2017-07-06ath10k: add copy engine register MAP for wcn3990 targetGovind Singh
Copy engine is a host to target communication interface between wlan firmware and wlan wcn3990 platform driver. Add copy engine register map for wcn3990 wlan module. This add support for the copy engine source/destination ring configuration for wcn3990 chipset. Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>