Age | Commit message (Expand) | Author |
---|---|---|
2024-08-10 | irqchip/riscv-aplic: Retrigger MSI interrupt on source configuration | Yong-Xuan Wang |
2024-04-09 | irqchip/riscv-aplic: Fix spelling mistake "forwared" -> "forwarded" | Colin Ian King |
2024-03-25 | irqchip/riscv-aplic: Add support for MSI-mode | Anup Patel |