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drm
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tegra
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sor.c
Age
Commit message (
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Author
2014-06-09
drm/tegra: sor - Remove obsolete comment
Thierry Reding
2014-06-09
drm/tegra: sor - Enable only the necessary number of lanes
Thierry Reding
2014-06-09
drm/tegra: sor - Power on only the necessary lanes
Thierry Reding
2014-06-09
drm/tegra: sor - Do not program interlaced mode registers
Thierry Reding
2014-06-09
drm/tegra: sor - Do not hardcode link speed
Thierry Reding
2014-06-09
drm/tegra: sor - Do not hardcode number of blank symbols
Thierry Reding
2014-06-09
drm/tegra: sor - Don't hardcode link parameters
Thierry Reding
2014-06-09
drm/tegra: sor - Change power down ordering
Stéphane Marchesin
2014-06-09
drm/tegra: sor - Fix copy/paste error
Stéphane Marchesin
2014-06-09
drm/tegra: sor - Remove pixel clock rounding
Stéphane Marchesin
2014-06-06
drm/tegra: sor - Make debugfs setup consistent
Thierry Reding
2014-06-06
drm/tegra: sor - Recursively remove debugfs tree
Thierry Reding
2014-06-05
drm/tegra: Remove host1x drm_bus implementation
Thierry Reding
2014-06-05
drm/tegra: sor - Protect CRC debugfs against enable state
Thierry Reding
2014-06-05
drm/tegra: dc - Compute shift clock divider in output drivers
Thierry Reding
2014-06-05
drm/tegra: sor - Add CRC debugfs support
Thierry Reding
2014-04-04
drm/tegra: Add eDP support
Thierry Reding