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If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 520x QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The ColdFire FEC is common to quite a few ColdFire CPUs. No need to duplicate
its platform setup code for every CPU family member that has it. Merge all the
setup code into a single shared file.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 532x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 528x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 527x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 5272 FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 523x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 520x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Some ColdFire CPU UART hardware modules can configure the IRQ they use.
Currently the same setup code is duplicated in the init code for each of
these ColdFire CPUs. Merge all this code to a single instance.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The ColdFire UART is common to all ColdFire CPU's. No need to duplicate
its platform setup code for every CPU family member. Merge all the setup
code into a single shared file.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 54xx UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5407 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 532x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 528x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5307 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 527x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5272 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5249 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 523x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 520x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5206 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The MMU and non-MMU varients of the m68k arch process.c code are pretty
much the same. Only a few minor details differ between the two. The
majority of the difference is to deal with having or wanting hardware FPU
support. So merge them back into a single process.c file.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
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The classic m68k code has always supported an FPU (although it may have
been a software emulated one). The non-MMU m68k code has never supported FPU
hardware. To help in merging common code create a configation setting that
signifies if we are builing in FPU support or not.
This switch, CONFIG_FPU, is set as per the current use cases. So it is
always enabled if CONFIG_MMU is set, and disabled otherwise. With a little
extra code it will be possible to disable it on the classic m68k platforms
as well, and to enable it on non-MMU platforms that do have hardware FPU.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
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Most of the code in the non-mmu ptrace_no.c file is the same as the mmu
version ptrace_mm.c. So merge them back into a single file.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
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The set_rtc_mmss() function is defined "static inline" but is never used
in this file. Remove it.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
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There is only trivial differences between the mmu time_mm.c and non-mmu
time_no.c files. Merge them back into a single time.c.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
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The CONFIG_GENERIC_CMOS_UPDATE switch is always enabled for the non-MMU
m68k case. But the underlying code to support it, update_persistent_clock(),
doesn't end up doing anything on the currently supported non-MMU platforms.
No platforms supply the necessary function support for writing back the RTC.
So lets remove this option and support code. This also brings m68knommu
in line with the m68k, which doesn't enabled this switch either.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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With a few small changes we can make the m68knommu timer init code the
same as the m68k code. By using the mach_sched_init function pointer
and reworking the current timer initializers to keep track of the common
m68k timer_interrupt() handler we end up with almost identical code for
m68knommu.
This will allow us to more easily merge the mmu and non-mmu m68k time.c
in future patches.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The read_persistent_clock() code is different on m68knommu, for really no
reason. With a few changes to support function names and some code
re-organization the code can be made the same.
This will make it easier to merge the arch/m68k/kernel/time.c for m68k and
m68knommu in a future patch.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The base of the real RAM resident hardware vectors, _ramvec, is declared in
our asm/traps.h. No need to have local declarations spread around in other
files that use this. So remove them.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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There is a lot of years of collected cruft in the m68knommu linker script.
Clean it all up and use the well defined linker script support macros.
Support is maintained for building both ROM/FLASH based and RAM based setups.
No major changes to section layouts, though the rodata section is now lumped
in with the read/write data section.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The ColdFire MBAR register that holds the mapping of the peripheral region
on some ColdFire CPUs is configurable. It can be configured at some address
different to that of the bootloader that loaded the kernel. So hard set
the MBAR register mapping at kernel startup time.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6
PARISC fixes from James Bottomley:
"This is a set of build fixes to get the cross compiled architecture
testbeds building again"
* tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6:
[PARISC] don't unconditionally override CROSS_COMPILE for 64 bit.
[PARISC] include <linux/prefetch.h> in drivers/parisc/iommu-helpers.h
[PARISC] fix compile break caused by iomap: make IOPORT/PCI mapping functions conditional
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/kvm: Fix Host-Only/Guest-Only counting with SVM disabled
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It turned out that a performance counter on AMD does not
count at all when the GO or HO bit is set in the control
register and SVM is disabled in EFER.
This patch works around this issue by masking out the HO bit
in the performance counter control register when SVM is not
enabled.
The GO bit is not touched because it is only set when the
user wants to count in guest-mode only. So when SVM is
disabled the counter should not run at all and the
not-counting is the intended behaviour.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Avi Kivity <avi@redhat.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Gleb Natapov <gleb@redhat.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: stable@vger.kernel.org # v3.2
Link: http://lkml.kernel.org/r/1330523852-19566-1-git-send-email-joerg.roedel@amd.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 fixes from Martin Schwidefsky
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
[S390] memory hotplug: prevent memory zone interleave
[S390] crash_dump: remove duplicate include
[S390] KEYS: Enable the compat keyctl wrapper on s390x
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Arnd Bergmann says:
"Another set of arm-soc bug fixes on top of v3.3-rc5. The few larger
bits are all for devices that still need to get set up in board code.
Only three platforms are in this set of fixes: omap2+, pxa and lpc32xx."
* tag 'fixes-3.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
ARM: LPC32xx: serial.c: Fixed loop limit
ARM: LPC32xx: serial.c: HW bug workaround
ARM: LPC32xx: irq.c: Clear latched event
ARM: LPC32xx: Fix interrupt controller init
ARM: LPC32xx: Fix irq on GPI_28
ARM: OMAP2: fix mailbox init code
ARM: OMAP2+: gpmc-smsc911x: add required smsc911x regulators
ARM: OMAP1: Fix out-of-bounds array access for Innovator
OMAP3 EVM: remove out-of-bounds array access of gpio_leds
ARM: OMAP: Fix build error when mmc_omap is built as module
ARM: OMAP: Fix kernel panic with HSMMC when twl4030_gpio is a module
pxa/hx4700: add platform device and I2C info for AK4641 codec
arch/arm/mach-pxa/: included linux/gpio.h twice
arch/arm/mach-mmp/: some files include some headers twice
ARM: pxa: fix error handling in pxa2xx_drv_pcmcia_probe
ARM: pxa: fix including linux/gpio.h twice
ARM: pxa: fix mixed declarations and code in sharpsl_pm
ARM: pxa: fix wrong parsing gpio event on spitz
ARM: OMAP2+: usb-host: fix compile warning
ARM: OMAP4: Move the barrier memboclk_steal() as part of reserve callback
...
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Build fixes for 3.3 from Jonas Bonn
* tag 'for-3.3' of git://openrisc.net/jonas/linux:
openrisc: Fix up audit_syscall_[entry|exit]() usage
openrisc: include export.h for EXPORT_SYMBOL
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git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
IOMMU fixes for Linux 3.3-rc5
All the fixes are for the OMAP IOMMU driver. The first patch is the
biggest one. It fixes the calls of the function omap_find_iovm_area() in
the omap-iommu-debug module which expects a 'struct device' parameter
since commit fabdbca instead of an omap_iommu handle. The
omap-iommu-debug code still passed the handle to the function which
caused a crash.
The second patch fixes a NULL pointer dereference in the OMAP code and
the third patch makes sure that the omap-iommu is initialized before the
omap-isp driver, which relies on the iommu. The last patch is only a
workaround until defered probing is implemented.
* tag 'iommu-fixes-v3.3-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
ARM: OMAP: make iommu subsys_initcall to fix builtin omap3isp
iommu/omap: fix NULL pointer dereference
iommu/omap: fix erroneous omap-iommu-debug API calls
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The user may wish to set their own value (for real cross compiles). Since the
top level Makefile initialises CROSS_COMPILE to empty by default, we must
check it for being empty (rather than for being defined) before we override.
Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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