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master.kernel.org:/pub/scm/linux/kernel/git/mfleming/sh-2.6
* 'master' of master.kernel.org:/pub/scm/linux/kernel/git/mfleming/sh-2.6:
sh: Use correct mask when comparing PMB DATA array values
sh: Do not try merging two 128MB PMB mappings
sh: Fix zImage load address when CONFIG_32BIT=y
sh: Fix address to decompress at when CONFIG_32BIT=y
sh: Assembly friendly __pa and __va definitions
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Lists of DMA channels and slaves are not changed, make them constant. Besides,
SH7724 channel and slave configuration of both DMA controllers is identical,
remove the extra copy of the configuration data.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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As explained in commit 1c0fe6e3bd, we want to call the architecture independent
oom killer when getting an unexplained OOM from handle_mm_fault, rather than
simply killing current.
Cc: linux-sh@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: David Rientjes <rientjes@google.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Previously we were masking the PMB DATA array values with the value of
__MEMORY_START | PMB_V, which misses some PFN bits off the mask.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
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There is a logic error in pmb_merge() that means we will incorrectly try
to merge two 128MB PMB mappings into one mapping. However, 256MB isn't a
valid PMB map size and pmb_merge() will actually drop the second 128MB
mapping.
This patch allows my SDK7786 board to boot when configured with
CONFIG_MEMORY_SIZE=0x10000000.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
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We can't necessarily use the P1SEG region to access RAM when running in
32BIT mode, so use CONFIG_MEMORY_START as the base address.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
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When running in 32BIT mode the P1SEG region doesn't necessarily provide
a window onto RAM (it depends how the bootloader setup the PMB). The
correct location to place the decompressed kernel is the physical
address of _text.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
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This patch defines ___pa and ___va which return the physical and virtual
address of an address, respectively. These macros are suitable for
calling from assembly because they don't include the C casts required by
__pa and __va.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
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All of the regular CPU init path needs to be __cpuinit annotated for CPU
hotplug.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This does a detect_cpu_and_cache_system() -> cpu_probe() rename, tidies
up the unused return value, and stuffs it under __cpuinit in preparation
for CPU hotplug.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This follows the x86 change and kills off the unthrottle stub. As the x86
change killed off the generic callback it isn't used anymore anyways.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This zeroes out the number of cache aliases in the cache info descriptors
when hardware alias avoidance is enabled. This cuts down on the amount of
flushing taken care of by common code, and also permits coherency control
to be disabled for the single CPU and 4k page size case.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Previously the struct module definition was pulled in from other headers,
but we want the reference to be explicit. Fixes up randconfig build
issues.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This enables support for the hardware synonym avoidance handling on SH-X3
CPUs for the case where dcache aliases are possible. icache handling is
retained, but we flip on broadcasting of the block invalidations due to
the lack of coherency otherwise on SMP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This wires up power-off support for the SDK7786 board.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements support for hardware-managed IRQ balancing as implemented
by SH-X3 cores (presently only hooked up for SH7786, but can probably be
carried over to other SH-X3 cores, too).
CPUs need to specify their distribution register along with the mask
definitions, as these follow the same format. Peripheral IRQs that don't
opt out of balancing will be automatically distributed at the whim of the
hardware block, while each CPU needs to verify whether it is handling the
IRQ or not, especially before clearing the mask.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Make sure that the timer IRQs and IPIs aren't enabled for IRQ balancing.
IPIs are disabled as a result of being percpu while the timers simply
disable balancing outright.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds support for hardware-assisted userspace irq masking for
special priority levels. Due to the SR.IMASK interactivity, only some
platforms implement this in hardware (including but not limited to
SH-4A interrupt controllers, and ARM-based SH-Mobile CPUs). Each CPU
needs to wire this up on its own, for now only SH7786 is wired up as an
example.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Hook up DMAC0 on SH7786.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Presently address translation is default-enabled regardless of whether
CONFIG_MMU is set or not in the SH-4 case, this fixes it up, and also
makes the control init word a bit more readable in the process.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
sunxvr500: Ignore secondary output PCI devices.
sparc64: Implement perf_arch_fetch_caller_regs
sparc64: Update defconfig.
sparc64: Fix array size reported by vmemmap_populate()
sparc: Fix regset register window handling.
drivers/serial/sunsu.c: Correct use after free
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
perf: Always build the powerpc perf_arch_fetch_caller_regs version
perf: Always build the stub perf_arch_fetch_caller_regs version
perf, probe-finder: Build fix on Debian
perf/scripts: Tuple was set from long in both branches in python_process_event()
perf: Fix 'perf sched record' deadlock
perf, x86: Fix callgraphs of 32-bit processes on 64-bit kernels
perf, x86: Fix AMD hotplug & constraint initialization
x86: Move notify_cpu_starting() callback to a later stage
x86,kgdb: Always initialize the hw breakpoint attribute
perf: Use hot regs with software sched switch/migrate events
perf: Correctly align perf event tracing buffer
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We provide regs->tstate, regs->tpc, regs->tnpc and
regs->u_regs[UREG_FP].
regs->tstate is necessary for:
user_mode() (via perf_exclude_event())
perf_misc_flags() (via perf_prepare_sample())
regs->tpc is necessary for:
perf_instruction_pointer() (via perf_prepare_sample())
and regs->u_regs[UREG_FP] is necessary for:
perf_callchain() (via perf_prepare_sample())
The regs->tnpc value is provided just to be tidy.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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vmemmap_populate() attempts to report the used index and total size of
vmemmap_table, but it wrongly shifts the total size so that it is
always shown as 0.
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Now that software events use perf_arch_fetch_caller_regs() too, we
need the powerpc version to be always built.
Fixes the following build error:
(.text+0x3210): undefined reference to `perf_arch_fetch_caller_regs'
(.text+0x3324): undefined reference to `perf_arch_fetch_caller_regs'
(.text+0x33bc): undefined reference to `perf_arch_fetch_caller_regs'
(.text+0x33ec): undefined reference to `perf_arch_fetch_caller_regs'
(.text+0xd4a0): undefined reference to `perf_arch_fetch_caller_regs'
arch/powerpc/kernel/built-in.o:(.text+0xd528): more undefined references to `perf_arch_fetch_caller_regs' follow
make[1]: *** [.tmp_vmlinux1] Error 1
make: *** [sub-make] Error 2
Reported-by: Michael Ellerman <michael@ellerman.id.au>
Reported-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Paul Mackerras <paulus@samba.org>
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* master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: 5965/1: Fix soft lockup in at91 udc driver
ARM: 6006/1: ARM: Use the correct NOP size in memmove for Thumb-2 kernel builds
ARM: 6005/1: arm: kprobes: fix register corruption with jprobes
ARM: 6003/1: removing compilation warning from pl061.h
ARM: 6001/1: removing compilation warning comming from clkdev.h
ARM: 6000/1: removing compilation warning comming from <asm/irq.h>
ARM: 5999/1: Including device.h and resource.h header files in linux/amba/bus.h
ARM: 5997/1: ARM: Correct the VFPv3 detection
ARM: 5996/1: ARM: Change the mandatory barriers implementation (4/4)
ARM: 5995/1: ARM: Add L2x0 outer_sync() support (3/4)
ARM: 5994/1: ARM: Add outer_cache_fns.sync function pointer (2/4)
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4)
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* 'merge' of git://git.secretlab.ca/git/linux-2.6:
powerpc/5200: in lpbfifo, flag DMA irqs as enabled after requesting them
powerpc/fsl: add device tree binding for QE firmware
of/flattree: Fix unhandled OF_DT_NOP tag when unflattening the device tree
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When profiling a 32-bit process on a 64-bit kernel, callgraph tracing
stopped after the first function, because it has seen a garbage memory
address (tried to interpret the frame pointer, and return address as a
64-bit pointer).
Fix this by using a struct stack_frame with 32-bit pointers when the
TIF_IA32 flag is set.
Note that TIF_IA32 flag must be used, and not is_compat_task(), because
the latter is only set when the 32-bit process is executing a syscall,
which may not always be the case (when tracing page fault events for
example).
Signed-off-by: Török Edwin <edwintorok@gmail.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Frederic Weisbecker <fweisbec@gmail.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: x86@kernel.org
Cc: linux-kernel@vger.kernel.org
LKML-Reference: <1268820436-13145-1-git-send-email-edwintorok@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Commit 3f6da39 ("perf: Rework and fix the arch CPU-hotplug hooks") moved
the amd northbridge allocation from CPUS_ONLINE to CPUS_PREPARE_UP
however amd_nb_id() doesn't work yet on prepare so it would simply bail
basically reverting to a state where we do not properly track node wide
constraints - causing weird perf results.
Fix up the AMD NorthBridge initialization code by allocating from
CPU_UP_PREPARE and installing it from CPU_STARTING once we have the
proper nb_id. It also properly deals with the allocation failing.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
[ robustify using amd_has_nb() ]
Signed-off-by: Stephane Eranian <eranian@google.com>
LKML-Reference: <1269353485.5109.48.camel@twins>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Because we need to have cpu identification things done by the time we run
CPU_STARTING notifiers.
( This init ordering will be relied on by the next fix. )
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <1269353485.5109.48.camel@twins>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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git://git.kernel.org/pub/scm/linux/kernel/git/frederic/random-tracing into perf/urgent
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git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh/for-2.6.34' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
sh: Fix up the SH-3 build for recent TLB changes.
sh: export return_address() symbol.
sh: Enable the mmu in start_secondary()
sh: Fix FDPIC binary loader
arch/sh/kernel: Use set_cpus_allowed_ptr
sh: Update ecovec_defconfig
USB gadget r8a66597-udc.c: duplicated include
sh: update the TLB replacement counter for entry wiring.
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While the MMUCR.URB and ITLB/UTLB differentiation works fine for all SH-4
and later TLBs, these features are absent on SH-3. This splits out
local_flush_tlb_all() in to SH-4 and PTEAEX copies while restoring the
old SH-3 one, subsequently fixing up the build.
This will probably want some further reordering and tidying in the
future, but that's out of scope at present.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This is needed with some of the tracing code built as modules, so provide
the export.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Word copying is used only for aligned addresses.
Here is space for improving to use any better copying technique.
Look at memcpy implementation.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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If early printk console is not enabled then all messages
are written to log buffer.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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I forget to change register name in comments.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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TLB size was hardcoded in asm code. This patch brings ability
to change TLB size only in one place. (mmu.h).
Signed-off-by: Michal Simek <monstr@monstr.eu>
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I forget to remove pci Kconfig option.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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On the base on GCOV analytics is helpful to add likely/unlikely
macros.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Cachegrind analysis need this fix to be able to log asm functions.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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To be able to do trace TLB operations.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Sync labels.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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RESR and REAR uses the same regs in whole file.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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This change synchronize register usage in code.
ESR = R4
EAR = R3
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Any sync branch must follow mts instructions not mfs.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Disable debug option in asm code.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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