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This reverts commit 876c52cc046e00eaa2ffc5124dc187106ef57594.
Breaks !MIPS
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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This option enables the quirks of fujitsu disk on some old FuLoong-2F
series(6002, 6003), If you want to use the libata, this option must be enabled,
otherwise, the kernel will report "IRQ #14 nobody cared". but for the old IDE
driver, this option is not needed and for some new FuLoong-2F series(6004,
6005, 6014, 6015), this must be disabled to avoid the kernel hang on booting.
Note: a better method is determining it through the machtype, but
currently, the machtype only reflect the fuloong, yeeloong, not reflect
the model of them, for example, fuloong-6002, fuloong-6003, in the
future, this machtype should be improved.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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Without this patch, when copying data between the USB storage devices and the
hard disk, the USB device will disconnect regularly.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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The _rdmsr, _wrdmsr operation must be atomic to ensure accessing the
right msr address we want.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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This is a minimal defconfig of PREEMTP_RT for the yeeloong2f netbook.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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This patch annotates the irq dispatch functions as inline, this may not
be compiled with gcc 3.4.6, only tested with gcc 4.4.1.
And also, this patch tries to tune the order of the interrupts to
speedup the interrupts from northbright and sourthbrige.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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This patch un-thread all of the interrupts whose handler is no_action,
which can return quickly, and also, several other interrupts, such as
bus error interrupt, halt interrupt, for they are urgent to the system,
to un-thread them too.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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binutils 2.20.1
The -mfix-loongson2f-jump option provided by the binutils 2.20.1 have fixed the
Out-of-order Issue of Loongson-2F described in Chapter 15 of "Loongson2F User
Manual"[1,2], but introduced some problems.
The option changes all of the jumping target to "addr & 0xcfffffff" through the
at($1) register, but for the REBOOT address of loongson-2F: 0xbfc00000, this is
totally wrong, so, this patch try to avoid the problem via telling the
assembler not to use at($1) register.
[1] Loongson2F User Manual(Chinese Version)
http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source
Reported-and-tested-by: Liu Shiwei <liushiwei@gmail.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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As the "Fixups of Loongson2F" patch[1] to binutils have been applied
into binutils 2.20.1. It's time to enable the options provided by the
patch to compile the kernel.
Without these fixups, the system will hang unexpectedly for the bug of
processor.
To learn more about these fixups, please refer to the following
references.
[1] "Fixups of Loongson2F" patch for binutils(actually for gas)
http://sourceware.org/ml/binutils/2009-11/msg00387.html
[2] Chapter 15 of "Loongson2F User Manual"(Chinese Version)
http://www.loongson.cn/uploadfile/file/200808211
[3] English Version of the above chapter 15
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source
Signed-off-by: Zhang Le <r0bertz@gentoo.org>
Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
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As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
workaround the Issue of Loongson-2F，We need to do:
"When switching from user model to kernel model, you should flush the branch
target history such as BTB and RAS."
This patch did clear BTB(branch target buffer), forbid RAS(row address strobe)
via Loongson-2F's 64bit diagnostic register.
[1] Chinese Version: http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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There is a MFGPT timer in Lemote-2F family of machines, which have low
precision and not support oneshot mode, so, only let it be un-available
in PREEMTPT_RT for we have an MIPS-builtin high-resolution timer: r4k
timer.
For we disable it for PREEMPT_RT, there is no need to convert the
related lock to raw_ one.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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The cpufreq support will change the cpu frequency dynamically, and also
for most of the MIPS timer's frequency are relative to the cpu
frequency, for example, in Loongson, the MIPS timer is half of the cpu
frequency, if the cpu frequency changes all the time, the MIPS timer
will be mussy.
all of the above will make the whole system un-determinable, so, just
disable the cpufreq support when PREEMPT_RT is used.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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There are two cascade interrupts in Loongson machines, one for bonito
northbridge, another for the 8259A controller in the southbridge.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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There is a new __schedule() defined in the Preempt-rt patch, which
should be called between local_irq_disble and local_irq_enable.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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This patch un-threads the i8259A cascade interrupts, and convert the
related lock to raw_spinlock_t type.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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Kernel is going to die, the lock must be raw to ensure nobody can
preempt it at this urgent time.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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(v8 -> v9:
O Make it depends on 64BIT for the current mips_sched_clock() only
support 64bit currently.
v7 -> v8:
O Make it works with the exisiting clocksource_mips.mult,
clocksource_mips.shift and copes with the 64bit calculation's overflow
problem with the method introduced by David Daney in "MIPS: Octeon: Use
non-overflowing arithmetic in sched_clock".
To reduce the duplication, I have abstracted an inline
mips_sched_clock() function to arch/mips/include/asm/time.h from
arch/mips/cavium-octeon/csrc-octeon.c.
v6 -> v7:
O Make it depends on !CPU_FREQ and CPU_HAS_FIXED_C0_COUNT
This sched_clock() is only available with the processor has fixed cp0
MIPS count register or even has dynamic cp0 MIPS count register but
with CPU_FREQ disabled.
NOTE: If your processor has fixed c0 count, please select
CPU_HAS_FIXED_C0_COUNT for it and send a related patch to Ralf.
v5 -> v6:
o hard-codes the cycle2ns_scale_factor as 8 for 30(cs->shift) is too
big. With 30, the return value of sched_clock() will also overflow quickly.
o moves the sched_clock() back into csrc-r4k.c as David and Sergei
recommended.
o inits c0 count as zero for PRINTK_TIME=y.
o drops the HR_SCHED_CLCOK option for the current sched_clock() is stable
enough to replace the jiffies based one.
)
This patch adds a cnt32_to_63() and MIPS c0 count based sched_clock(),
which provides high resolution.
Without it, the Ftrace for MIPS will give useless timestamp information.
Because cnt32_to_63() needs to be called at least once per half period
to work properly, Differ from the old version, this v2 revision set up a
kernel timer to ensure the requirement of some MIPSs which have short c0
count period.
And also, we init the c0 count as ZERO(just as jiffies does) in
time_init() before plat_time_init(), without it, PRINTK_TIME=y will get
wrong timestamp information. (NOTE: some platforms have initiazlied c0
count as zero, but some not, this may introduce some duplication,
perhaps a new patch is needed to remove the initialized of c0 count in
the platforms later?)
This is originally from arch/arm/plat-orion/time.c
This revision works well for function graph tracer now, and also,
PRINTK_TIME=y will get normal timestamp informatin.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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The commit "MIPS: add a common mips_sched_clock()" have abstracted the
solution of the 64bit calculation's overflow problem into a common
mips_sched_clock() function in arch/mips/include/asm/time.h, This patch
just rewrites the sched_clock() for cavium-octeon on it.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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Because the high resolution sched_clock() for r4k has the same overflow
problem and solution mentioned in "MIPS: Octeon: Use non-overflowing
arithmetic in sched_clock".
"With typical mult and shift values, the calculation for Octeon's
sched_clock overflows when using 64-bit arithmetic. Use 128-bit
calculations instead."
To reduce the duplication, This patch abstracts the solution into an
inline funciton mips_sched_clock() into arch/mips/include/asm/time.h
from arch/mips/cavium-octeon/csrc-octeon.c.
Two patches for Cavium and R4K will be sent out respectively to use this
common function.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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As the X86 platform did in arch/x86/kernel/{process_32.c,process_64.c},
we also don't trace irqsoff for idle.
If "There's no useful work to be done", we don't care about the irqsoff
duration. If we trace for idle, the max duration of irqsoff will be
always as the idle time and eventually make the irqsoff tracer out of
action.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
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iomap_32 uses kmap_atomic_prot_pfn() for its maps, but on -rt we have
to use kmap() for such mappings, so teach kmap about pfn and prot
thingies.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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commit ff097ddd4 (x86/PCI: MMCONFIG: manage pci_mmcfg_region as
a list, not a table) introduced a nasty memory corruption when
pci_mmcfg_list is empty.
pci_mmcfg_check_end_bus_number() dereferences
pci_mmcfg_list.prev even when the list is empty. The following
write hits some variable near to pci_mmcfg_list.
Further down a similar problem exists, where cfg->list.next is
dereferenced unconditionally and a comparison with some variable
near to pci_mmcfg_list happens.
Add a check for the last element into the for_each_entry() loop
and remove all the other crappy logic which is just a leftover
of the old array based code which was replaced by the list
conversion.
Reported-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
LKML-Reference: <alpine.LFD.2.00.1002251638230.4245@localhost.localdomain>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Conflicts:
Makefile
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6
* 'urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6:
parisc: Set PCI CLS early in boot.
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git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] Fix broken sn2 build
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Set the PCI CLS early in the boot process to prevent
device failures. In pcibios_set_master use the new
pci_cache_line_size instead of a hard-coded value.
Signed-off-by: Carlos O'Donell <carlos@codesourcery.com>
Reviewed-by: Grant Grundler <grundler@google.com>
Signed-off-by: Kyle McMartin <kyle@redhat.com>
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This restores the deferred VCPU kicking before 956f97cf. We need this
over -rt as wake_up* requires non-atomic context in this configuration.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Avi Kivity <avi@redhat.com>
Cc: Gleb Natapov <gleb@redhat.com>
LKML-Reference: <4B84F466.2080009@siemens.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Trailing semicolon causes compilation involving out_le32() to fail.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
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I create wrong asm code but none test shows that this part of code is wrong.
I am not convinces that were good idea to create asm optimized macros
for caches. The reason is that there is not optimization with previous code
that's why make sense to add old code and do some benchmarking which
functions are faster.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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There is no reason to convert the lock protecting rwsems (the
ownerless variant) to a sleeping spinlock on -rt. Convert it to raw.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Revert the change made to arch/ia64/sn/kernel/setup.c by commit
204fba4aa303ea4a7bb726a539bf4a5b9e3203d0 as it breaks the build.
Fixing the build the b94b08081fcecf83fa690d6c5664f6316fe72208 way
breaks xpc because genksyms then fails to generate an CRC for
per_cpu____sn_cnodeid_to_nasid because of limitations in the
generic genksyms code.
Signed-off-by: Hedi Berriche <hedi@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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ssh://master.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into rt/head
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* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
MIPS: BCM47xx: Fix 128MB RAM support
MIPS: Highmem: Fix build error
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git://git.kernel.org/pub/scm/linux/kernel/git/frob/linux-2.6-roland
* 'parisc/tracehook' of git://git.kernel.org/pub/scm/linux/kernel/git/frob/linux-2.6-roland:
Revert "parisc: HAVE_ARCH_TRACEHOOK"
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Ignoring the last page when ddr size is 128M. Cached accesses to last page
is causing the processor to prefetch using address above 128M stepping out
of the DDR address space.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/981/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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arch/mips/mm/highmem.c: In function 'kmap_init':
arch/mips/mm/highmem.c:130: error: 'init_mm' undeclared (first use in this function)
arch/mips/mm/highmem.c:130: error: (Each undeclared identifier is reported only once
arch/mips/mm/highmem.c:130: error: for each function it appears in.)
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/980/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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This reverts commit 81bf550d9cdfe0325eb1504b06c9f6511b442c1a.
HAVE_ARCH_TRACEHOOK requires defining the user_regset interfaces,
including task_user_regset_view(). parisc doesn't do that yet,
so don't lie about it.
Signed-off-by: Roland McGrath <roland@redhat.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
perf probe: Init struct probe_point and set counter correctly
hw-breakpoint: Keep track of dr7 local enable bits
hw-breakpoints: Accept breakpoints on NULL address
perf_events: Fix FORK events
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* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
sparc32: Fix struct stat uid/gid types.
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Commit 085219f79cad89291699bd2bfb21c9fdabafe65f
("sparc32: use proper types in struct stat")
Accidently changed the struct stat uid/gid members
to uid_t and gid_t, but those get set to
__kernel_uid32_t and __kernel_gid32_t respectively.
Those are of type 'int' but the structure is meant
to have 'short'. So use uid16_t and gid16_t to
correct this.
Reported-by: Rob Landley <rob@landley.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Merge branch 'linus' into rt/head with a pile of conflicts.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
omap: Remove DEBUG_FS dependency for mux name checking
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* master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: allow alignment fault mode to be configured at kernel boot
ARM: Update mach-types
ARM: 5951/1: ARM: fix documentation of the PrimeCell bus
ARM: 5950/1: ARM: Fix build error for arm1026ej-s processor
MAINTAINERS: fix my e-mail and status for Gemini and FA526
Gemini: wrong registers used to set reg_level in gpio_set_irq_type()
ARM: 5944/1: scsi: fix timer setup in fas216.c
ARM: 5938/1: ARM: L2: export outer_cache_fns
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Some glibc versions intentionally create lots of alignment faults in
their gconv code, which if not fixed up, results in segfaults during
boot. This can prevent systems booting properly.
There is no clear hard-configurable default for this; the desired
default depends on the nature of the userspace which is going to be
booted.
So, provide a way for the alignment fault handler to be configured via
the kernel command line.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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