Age | Commit message (Expand) | Author |
---|---|---|
2019-11-05 | riscv: abstract out CSR names for supervisor vs machine mode | Christoph Hellwig |
2019-10-28 | riscv: for C functions called only from assembly, mark with __visible | Paul Walmsley |
2019-05-16 | RISC-V: Add interrupt related SCAUSE defines in asm/csr.h | Anup Patel |
2019-04-25 | riscv: print the unexpected interrupt cause | Christoph Hellwig |
2018-10-22 | RISC-V: Show IPI stats | Anup Patel |
2018-10-22 | RISC-V: No need to pass scause as arg to do_IRQ() | Anup Patel |
2018-08-13 | clocksource: new RISC-V SBI timer driver | Palmer Dabbelt |
2018-08-13 | RISC-V: implement low-level interrupt handling | Christoph Hellwig |
2018-07-04 | RISC-V: Don't include irq-riscv-intc.h | Palmer Dabbelt |
2018-03-14 | RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler | Palmer Dabbelt |
2017-09-26 | RISC-V: Init and Halt Code | Palmer Dabbelt |