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Author
2023-05-15
riscv: Switch to hotplug core state synchronization
Thomas Gleixner
2023-04-08
RISC-V: Allow marking IPIs as suitable for remote FENCEs
Anup Patel
2023-04-08
RISC-V: Treat IPIs as normal Linux IRQs
Anup Patel
2022-11-29
riscv: kexec: Fixup crash_smp_send_stop without multi cores
Guo Ren
2022-07-19
riscv: smp: Add 64bit hartid support on RV64
Sunil V L
2022-01-20
RISC-V: Do not use cpumask data structure for hartid bitmap
Atish Patra
2022-01-09
RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=n
Sean Christopherson
2022-01-09
riscv: remove cpu_stop()
Jisheng Zhang
2021-04-26
riscv: Constify sbi_ipi_ops
Jisheng Zhang
2020-08-20
RISC-V: Add mechanism to provide custom IPI operations
Anup Patel
2020-08-04
RISC-V: Fix build warning for smpboot.c
Atish Patra
2020-06-09
RISC-V: self-contained IPI handling routine
Anup Patel
2020-03-31
RISC-V: Support cpu hotplug
Atish Patra
2020-03-31
RISC-V: Implement new SBI v0.2 extensions
Atish Patra
2019-09-05
riscv: cleanup riscv_cpuid_to_hartid_mask
Christoph Hellwig
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
Thomas Gleixner
2019-03-04
RISC-V: Move cpuid to hartid mapping to SMP.
Atish Patra
2018-10-22
RISC-V: Show IPI stats
Anup Patel
2018-10-22
RISC-V: Add logical CPU indexing for RISC-V
Atish Patra
2018-10-22
RISC-V: Provide a cleaner raw_smp_processor_id()
Palmer Dabbelt
2018-08-13
clocksource: new RISC-V SBI timer driver
Palmer Dabbelt
2018-08-13
RISC-V: simplify software interrupt / IPI code
Christoph Hellwig
2017-09-26
RISC-V: Init and Halt Code
Palmer Dabbelt