Age | Commit message (Expand) | Author |
---|---|---|
2020-09-19 | RISC-V: Resurrect the MMIO timer implementation for M-mode systems | Palmer Dabbelt |
2020-08-20 | RISC-V: Remove CLINT related code from timer and arch | Anup Patel |
2020-08-20 | RISC-V: Add mechanism to provide custom IPI operations | Anup Patel |
2020-03-18 | riscv: fix the IPI missing issue in nommu mode | Greentime Hu |
2019-11-17 | riscv: provide native clint access for M-mode | Christoph Hellwig |