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2010-03-12Revert "Loongson: add a new option FUJITSU_QUIRKS"Thomas Gleixner
This reverts commit 876c52cc046e00eaa2ffc5124dc187106ef57594. Breaks !MIPS Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2010-03-11Loongson: add a new option FUJITSU_QUIRKSWu Zhangjin
This option enables the quirks of fujitsu disk on some old FuLoong-2F series(6002, 6003), If you want to use the libata, this option must be enabled, otherwise, the kernel will report "IRQ #14 nobody cared". but for the old IDE driver, this option is not needed and for some new FuLoong-2F series(6004, 6005, 6014, 6015), this must be disabled to avoid the kernel hang on booting. Note: a better method is determining it through the machtype, but currently, the machtype only reflect the fuloong, yeeloong, not reflect the model of them, for example, fuloong-6002, fuloong-6003, in the future, this machtype should be improved. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-11Loongson: Lemote-2F: USB: Not Emulate Non-Posted WritesWu Zhangjin
Without this patch, when copying data between the USB storage devices and the hard disk, the USB device will disconnect regularly. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-11Loongson: Cleanup the comment of reset_cpu()Wu Zhangjin
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-11Loongson: make _rdmsr, _wrmsr be atomicWu Zhangjin
The _rdmsr, _wrdmsr operation must be atomic to ensure accessing the right msr address we want. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10RT: Loongson: add defconfig for YeeLoongWu Zhangjin
This is a minimal defconfig of PREEMTP_RT for the yeeloong2f netbook. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10RT: MIPS: Loongson: speedup the irq dispatchWu Zhangjin
This patch annotates the irq dispatch functions as inline, this may not be compiled with gcc 3.4.6, only tested with gcc 4.4.1. And also, this patch tries to tune the order of the interrupts to speedup the interrupts from northbright and sourthbrige. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10RT: MIPS: Un-thread several interruptsWu Zhangjin
This patch un-thread all of the interrupts whose handler is no_action, which can return quickly, and also, several other interrupts, such as bus error interrupt, halt interrupt, for they are urgent to the system, to un-thread them too. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10Loongson-2F: Fixup of problems introduced by -mfix-loongson2f-jump of ↵Wu Zhangjin
binutils 2.20.1 The -mfix-loongson2f-jump option provided by the binutils 2.20.1 have fixed the Out-of-order Issue of Loongson-2F described in Chapter 15 of "Loongson2F User Manual"[1,2], but introduced some problems. The option changes all of the jumping target to "addr & 0xcfffffff" through the at($1) register, but for the REBOOT address of loongson-2F: 0xbfc00000, this is totally wrong, so, this patch try to avoid the problem via telling the assembler not to use at($1) register. [1] Loongson2F User Manual(Chinese Version) http://www.loongson.cn/uploadfile/file/200808211 [2] English Version of Chapter 15: http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Reported-and-tested-by: Liu Shiwei <liushiwei@gmail.com> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10Loongson-2F: Enable fixups of binutils 2.20.1Wu Zhangjin
As the "Fixups of Loongson2F" patch[1] to binutils have been applied into binutils 2.20.1. It's time to enable the options provided by the patch to compile the kernel. Without these fixups, the system will hang unexpectedly for the bug of processor. To learn more about these fixups, please refer to the following references. [1] "Fixups of Loongson2F" patch for binutils(actually for gas) http://sourceware.org/ml/binutils/2009-11/msg00387.html [2] Chapter 15 of "Loongson2F User Manual"(Chinese Version) http://www.loongson.cn/uploadfile/file/200808211 [3] English Version of the above chapter 15 http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
2010-03-10Loongson-2F: Flush the branch target history such as BTB and RASWu Zhangjin
As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to workaround the Issue of Loongson-2F，We need to do: "When switching from user model to kernel model, you should flush the branch target history such as BTB and RAS." This patch did clear BTB(branch target buffer), forbid RAS(row address strobe) via Loongson-2F's 64bit diagnostic register. [1] Chinese Version: http://www.loongson.cn/uploadfile/file/200808211 [2] English Version of Chapter 15: http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10RT: MIPS: Loongson: make the MFGPT timer depends on !PREEMPT_RTWu Zhangjin
There is a MFGPT timer in Lemote-2F family of machines, which have low precision and not support oneshot mode, so, only let it be un-available in PREEMTPT_RT for we have an MIPS-builtin high-resolution timer: r4k timer. For we disable it for PREEMPT_RT, there is no need to convert the related lock to raw_ one. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10RT: MIPS: make cpufreq support depends on !PREEMTP_RTWu Zhangjin
The cpufreq support will change the cpu frequency dynamically, and also for most of the MIPS timer's frequency are relative to the cpu frequency, for example, in Loongson, the MIPS timer is half of the cpu frequency, if the cpu frequency changes all the time, the MIPS timer will be mussy. all of the above will make the whole system un-determinable, so, just disable the cpufreq support when PREEMPT_RT is used. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10RT: MIPS: Loongson: Un-thread cascade interruptsWu Zhangjin
There are two cascade interrupts in Loongson machines, one for bonito northbridge, another for the 8259A controller in the southbridge. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10RT: MIPS: check resched in do_signal()Wu Zhangjin
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10RT: MIPS: Convert the schedule to __scheduleWu Zhangjin
There is a new __schedule() defined in the Preempt-rt patch, which should be called between local_irq_disble and local_irq_enable. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10RT: MIPS: Un-thread i8259A cascade interruptWu Zhangjin
This patch un-threads the i8259A cascade interrupts, and convert the related lock to raw_spinlock_t type. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10RT: MIPS: Make the die_lock be rawWu Zhangjin
Kernel is going to die, the lock must be raw to ensure nobody can preempt it at this urgent time. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10MIPS: r4k: Add a high resolution sched_clock()Wu Zhangjin
(v8 -> v9: O Make it depends on 64BIT for the current mips_sched_clock() only support 64bit currently. v7 -> v8: O Make it works with the exisiting clocksource_mips.mult, clocksource_mips.shift and copes with the 64bit calculation's overflow problem with the method introduced by David Daney in "MIPS: Octeon: Use non-overflowing arithmetic in sched_clock". To reduce the duplication, I have abstracted an inline mips_sched_clock() function to arch/mips/include/asm/time.h from arch/mips/cavium-octeon/csrc-octeon.c. v6 -> v7: O Make it depends on !CPU_FREQ and CPU_HAS_FIXED_C0_COUNT This sched_clock() is only available with the processor has fixed cp0 MIPS count register or even has dynamic cp0 MIPS count register but with CPU_FREQ disabled. NOTE: If your processor has fixed c0 count, please select CPU_HAS_FIXED_C0_COUNT for it and send a related patch to Ralf. v5 -> v6: o hard-codes the cycle2ns_scale_factor as 8 for 30(cs->shift) is too big. With 30, the return value of sched_clock() will also overflow quickly. o moves the sched_clock() back into csrc-r4k.c as David and Sergei recommended. o inits c0 count as zero for PRINTK_TIME=y. o drops the HR_SCHED_CLCOK option for the current sched_clock() is stable enough to replace the jiffies based one. ) This patch adds a cnt32_to_63() and MIPS c0 count based sched_clock(), which provides high resolution. Without it, the Ftrace for MIPS will give useless timestamp information. Because cnt32_to_63() needs to be called at least once per half period to work properly, Differ from the old version, this v2 revision set up a kernel timer to ensure the requirement of some MIPSs which have short c0 count period. And also, we init the c0 count as ZERO(just as jiffies does) in time_init() before plat_time_init(), without it, PRINTK_TIME=y will get wrong timestamp information. (NOTE: some platforms have initiazlied c0 count as zero, but some not, this may introduce some duplication, perhaps a new patch is needed to remove the initialized of c0 count in the platforms later?) This is originally from arch/arm/plat-orion/time.c This revision works well for function graph tracer now, and also, PRINTK_TIME=y will get normal timestamp informatin. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10MIPS: cavium-octeon: rewrite the sched_clock() based on mips_sched_clock()Wu Zhangjin
The commit "MIPS: add a common mips_sched_clock()" have abstracted the solution of the 64bit calculation's overflow problem into a common mips_sched_clock() function in arch/mips/include/asm/time.h, This patch just rewrites the sched_clock() for cavium-octeon on it. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10MIPS: add a common mips_sched_clock()Wu Zhangjin
Because the high resolution sched_clock() for r4k has the same overflow problem and solution mentioned in "MIPS: Octeon: Use non-overflowing arithmetic in sched_clock". "With typical mult and shift values, the calculation for Octeon's sched_clock overflows when using 64-bit arithmetic. Use 128-bit calculations instead." To reduce the duplication, This patch abstracts the solution into an inline funciton mips_sched_clock() into arch/mips/include/asm/time.h from arch/mips/cavium-octeon/csrc-octeon.c. Two patches for Cavium and R4K will be sent out respectively to use this common function. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-03-10MIPS: Don't trace irqsoff for idleWu Zhangjin
As the X86 platform did in arch/x86/kernel/{process_32.c,process_64.c}, we also don't trace irqsoff for idle. If "There's no useful work to be done", we don't care about the irqsoff duration. If we trace for idle, the max duration of irqsoff will be always as the idle time and eventually make the irqsoff tracer out of action. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
2010-02-23Merge branch 'master' of ↵Thomas Gleixner
ssh://master.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into rt/head
2010-02-22MIPS: BCM47xx: Fix 128MB RAM supportHauke Mehrtens
Ignoring the last page when ddr size is 128M. Cached accesses to last page is causing the processor to prefetch using address above 128M stepping out of the DDR address space. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/981/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-22MIPS: Highmem: Fix build errorYoichi Yuasa
arch/mips/mm/highmem.c: In function 'kmap_init': arch/mips/mm/highmem.c:130: error: 'init_mm' undeclared (first use in this function) arch/mips/mm/highmem.c:130: error: (Each undeclared identifier is reported only once arch/mips/mm/highmem.c:130: error: for each function it appears in.) Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/980/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-21Forward to 2.6.33-rc8Thomas Gleixner
Merge branch 'linus' into rt/head with a pile of conflicts. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2010-02-10MIPS: Don't probe reserved EntryHi bits.David Daney
The patch that adds cpu_probe_vmbits is erroneously writing to reserved bit 12. Since we are really only probing high bits, don't write this bit with a one. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: Guenter Roeck <guenter.roeck@ericsson.com> Patchwork: http://patchwork.linux-mips.org/patch/949/ Acked-by: Guenter Roeck <guenter.roeck@ericsson.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-10MIPS: SNI: Correct NULL testJulia Lawall
Test the value that was just allocated rather than the previously tested one. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r@ expression *x; expression e; identifier l; @@ if (x == NULL || ...) { ... when forall return ...; } ... when != goto l; when != x = e when != &x *x == NULL // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> To: linux-mips@linux-mips.org To: linux-kernel@vger.kernel.org To: kernel-janitors@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/945/ Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-10MIPS: Fix __devinit __cpuinit confusion in cpu_cache_initDavid Daney
cpu_cache_init and the things it calls should all be __cpuinit instead of __devinit. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/938/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-10MIPS: IP27: Make defconfig useful again.Ralf Baechle
RTC support was rewritten but the defconfig files were not updated. Enable IPv6 support which for some folks already is a must have. Assign useful values to other new options. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-10MIPS: Fixup of the r4k timerWu Zhangjin
As reported by Maxime Bizon, the commit "MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs" have broken the r4k timer since it didn't initialize the cp0_compare_irq_shift variable used in c0_compare_int_pending() on the architectures whose cpu_has_mips_r2 is false. This patch fixes it via initializing the cp0_compare_irq_shift as the cp0_compare_irq used in the old c0_compare_int_pending(). Reported-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: David VomLehn <dvomlehn@cisco.com> Cc: mbizon@freebox.fr Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/922/ Tested-by: Shane McDonald <mcdonald.shane@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-02Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: MIPS: 64-bit: Detect virtual memory size MIPS: AR7: Fix USB slave mem range typo MIPS: Alchemy: Fix dbdma ring destruction memory debugcheck.
2010-02-02MIPS: 64-bit: Detect virtual memory sizeGuenter Roeck
Linux kernel 2.6.32 and later allocate address space from the top of the kernel virtual memory address space. This patch implements virtual memory size detection for 64 bit MIPS CPUs to avoid resulting crashes. Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/935/ Reviewed-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-01MIPS: AR7: Fix USB slave mem range typoAlexander Clouter
Signed-off-by: Alexander Clouter <alex@digriz.org.uk> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/919/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-01MIPS: Alchemy: Fix dbdma ring destruction memory debugcheck.Manuel Lauss
DBDMA descriptors need to be located at 32-byte aligned addresses; however kmalloc in conjunction with the SLAB allocator and CONFIG_DEBUG_SLUB enabled doesn't deliver any. The dbdma code works around that by allocating a larger area and realigning the start address within it. When freeing a channel however this adjustment is not taken into account which results in an oops: Kernel bug detected[#1]: [...] Call Trace: [<80186010>] cache_free_debugcheck+0x284/0x318 [<801869d8>] kfree+0xe8/0x2a0 [<8010b31c>] au1xxx_dbdma_chan_free+0x2c/0x7c [<80388dc8>] au1x_pcm_dbdma_free+0x34/0x4c [<80388fa8>] au1xpsc_pcm_close+0x28/0x38 [<80383cb8>] soc_codec_close+0x14c/0x1cc [<8036dbb4>] snd_pcm_release_substream+0x60/0xac [<8036dc40>] snd_pcm_release+0x40/0xa0 [<8018c7a8>] __fput+0x11c/0x228 [<80188f60>] filp_close+0x7c/0x98 [<80189018>] sys_close+0x9c/0xe4 [<801022a0>] stack_done+0x20/0x3c Fix this by recording the address delivered by kmalloc() and using it as parameter to kfree(). This fix is only necessary with the SLAB allocator and CONFIG_DEBUG_SLAB enabled; non-debug SLAB, SLUB do return nicely aligned addresses, debug-enabled SLUB currently panics early in the boot process. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Manuel Lauss <manuel.lauss@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/878/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-28MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQsDavid VomLehn
The MIPS processor is limited to 64 external interrupt sources. Using a greater number without IRQ sharing requires reading platform-specific registers. On such platforms, reading the IntCtl register to determine which interrupt corresponds to a timer interrupt will not work. On MIPSR2 systems there is a solution - the TI bit in the Cause register, specifically indicates that a timer interrupt has occured. This patch uses that bit to detect interrupts for MIPSR2 processors, which may be expected to work regardless of how the timer interrupt may be routed in the hardware. Signed-off-by: David VomLehn (dvomlehn@cisco.com) To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/804/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-28MIPS: PowerTV: Streamline access to platform device registersDavid VomLehn
Pre-compute addresses for the basic ASIC registers. This speeds up access and allows memory for unused configurations to be freed. In addition, uninitialized register addresses will be returned as NULL to catch bad usage quickly. Signed-off-by: David VomLehn <dvomlehn@cisco.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/806/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-28MIPS: Fix vmlinuz build for 32bit-only math shellsAlexander Clouter
POSIX requires $((<expression>)) arithmetic in sh only to have long arithmetic so on 32-bit sh binaries might do only 32-bit arithmetic but the arithmetic done in arch/mips/boot/compressed/Makefile needs 64-bit. I play with the AR7 platform, so VMLINUX_LOAD_ADDRESS is 0xffffffff94100000, and for an example 4MiB kernel VMLINUZ_LOAD_ADDRESS is made out to be: ---- alex@berk:~$ bash -c 'printf "%x\n" $((0xffffffff94100000 + 0x400000))' ffffffff94500000 alex@berk:~$ dash -c 'printf "%x\n" $((0xffffffff94100000 + 0x400000))' 80000000003fffff ---- The former is obviously correct whilst the later breaks things royally. Fortunately working with only the lower 32bit's works for both bash and dash: ---- $ bash -c 'printf "%x\n" $((0x94100000 + 0x400000))' 94500000 $ dash -c 'printf "%x\n" $((0x94100000 + 0x400000))' 94500000 ---- So, we can split the original 64bit string to two parts, and only calculate the low 32bit part, which is big enough (1GiB kernel sizes anyone?) for a normal Linux kernel image file, now, we calculate the VMLINUZ_LOAD_ADDRESS like this: 1. if present, append top 32bit of VMLINUX_LOAD_ADDRESS" as a prefix 2. get the sum of the low 32bit of VMLINUX_LOAD_ADDRESS + VMLINUX_SIZE This patch fixes vmlinuz kernel builds on systems where only a 32bit-only math shell is available. Patch Changelog: Version 2 - simplified method by using 'expr' for 'substr' and making it work with dash once again Version 1 - Revert the removals of '-n "$(VMLINUX_SIZE)"' to avoid the error of "make clean" - Consider more cases of the VMLINUX_LOAD_ADDRESS Version 0 - initial release Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Acked-by: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/861/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-28MIPS: Add support of LZO-compressed kernelsWu Zhangjin
The necessary changes to the x86 Kconfig and boot/compressed to allow the use of this new compression method. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Patchwork: http://patchwork.linux-mips.org/patch/857/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: Ignore vmlinux.*Yoichi Yuasa
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/795/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: Move vmlinux.ecoff to arch/mips/bootYoichi Yuasa
It moves to the same directory as the boot files in other formats. Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/796/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: cpumask_of_node() should handle -1 as a nodeAnton Blanchard
pcibus_to_node can return -1 if we cannot determine which node a pci bus is on. If passed -1, cpumask_of_node will negatively index the lookup array and pull in random data: # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus 00000000,00000003,00000000,00000000 # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist 64-65 Change cpumask_of_node to check for -1 and return cpu_all_mask in this case: # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus ffffffff,ffffffff,ffffffff,ffffffff # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist 0-127 Signed-off-by: Anton Blanchard <anton@samba.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Andrew Morton <akpm@linux-foundation.org> Patchwork: http://patchwork.linux-mips.org/patch/831/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: Octeon: Use non-overflowing arithmetic in sched_clockDavid Daney
With typical mult and shift values, the calculation for Octeon's sched_clock overflows when using 64-bit arithmetic. Use 128-bit calculations instead. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/849/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: Malta, PowerTV: Remove unnecessary "Linux started"Yoichi Yuasa
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/813/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: BCM63xx: Remove duplicate CONFIG_CMDLINE.Yoichi Yuasa
Builtin cmdline is copied by arch_mem_init(). Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/812/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: AR7: Remove unused prom_getchar()Yoichi Yuasa
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/811/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: PowerTV: Remove extra r4k_clockevent_init() callDavid VomLehn
A call to r4k_clocksource_init() was added to plat_time_init(), but when init_mips_clock_source() calls the same function, boot fails in clockevents_register_device(). This patch removes the extraneous call. Signed-off-by: David VomLehn <dvomlehn@cisco.com> Patchwork: http://patchwork.linux-mips.org/patch/803/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: Cobalt use strlcat() for the command line argumentsYoichi Yuasa
Tested with CoLo v1.22 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/807/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: Octeon: Add sched_clock() to csrc-octeon.cDavid Daney
With the advent of function graph tracing on MIPS, Octeon needs a high precision sched_clock() implementation. Without it, most timing numbers are reported as 0.000. This new sched_clock just uses the 64-bit cycle counter appropriately scaled. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/805/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12MIPS: TXx9: Cleanup builtin-cmdline processingAtsushi Nemoto
Since commit 898d357b5262f9e26bc2418e01f8676e80d9867e (lmo) / 6acc7d485c24c00e111c61b2e6dff9180faebcae (kernel.org) ("Fix and enhance built-in kernel command line") arcs_cmdline[] does not contain built-in command line. The commit introduce CONFIG_CMDLINE_BOOL and CONFIG_CMDLINE_OVERRIDE to control built-in command line, and now we can use them instead of platform-specific built-in command line processing. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Patchwork: http://patchwork.linux-mips.org/patch/802/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>