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path: root/arch/mips/include/asm/mipsregs.h
AgeCommit message (Expand)Author
2016-01-24MIPS: Update trap codesJames Hogan
2016-01-24MIPS: Move Cause.ExcCode trap codes to mipsregs.hJames Hogan
2016-01-24MIPS: Move definition of DC bit to mipsregs.hJames Hogan
2015-11-11MIPS: Tidy EntryLo bit definitions, add PFNPaul Burton
2015-11-11MIPS: CPS: Early debug using an ns16550-compatible UARTPaul Burton
2015-11-11MIPS: Fix duplicate CP0_* definitions.James Hogan
2015-09-22MIPS: cpu-features: Add cpu_has_ftlbJames Hogan
2015-09-03MIPS: Rearrange ENTRYLO field definitionsJames Hogan
2015-09-03MIPS: Treat CP1 control registers as unsigned ints.Ralf Baechle
2015-09-03MIPS: Use unsigned int when reading CP0 registersChris Packham
2015-08-26MIPS: Set up FTLB probability for I6400Markos Chandras
2015-06-21MIPS: R12000: Enable branch prediction global historyJoshua Kinard
2015-06-21MIPS: mipsregs.h: Add EntryLo bit definitionsJames Hogan
2015-04-08MIPS: math-emu: Define IEEE 754-2008 feature control bitsMaciej W. Rozycki
2015-04-08MIPS: math-emu: Implement the FCCR, FEXR and FENR registersMaciej W. Rozycki
2015-04-08MIPS: mipsregs.h: Reindent CP0 Cause macrosMaciej W. Rozycki
2015-04-08MIPS: mipsregs.h: Move TX39 macros out of the wayMaciej W. Rozycki
2015-04-08MIPS: mipsregs.h: Reorder CP1 macro definitionsMaciej W. Rozycki
2015-04-08MIPS: mipsregs.h: Remove broken commentsMaciej W. Rozycki
2015-03-31MIPS: Add architectural FDC IRQ fieldsJames Hogan
2015-03-31MIPS: Add arch CDMM definitions and probingJames Hogan
2015-02-21Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds
2015-02-20MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill
2015-02-17MIPS: asm: mipsregs: Add support for the LLADDR registerMarkos Chandras
2015-02-17MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras
2015-01-30MIPS: mipsregs.h: Add write_32bit_cp1_register()James Hogan
2014-12-11Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds
2014-11-24MIPS: Add CP0 macros for extended EntryLo registersSteven J. Hill
2014-11-24MIPS: define bits introduced for hybrid FPRsPaul Burton
2014-11-24MIPS: cpu-probe: Set the FTLB probability bit on supported coresMarkos Chandras
2014-11-07MIPS: Fix build with binutils 2.24.51+Manuel Lauss
2014-08-02MIPS: mipsreg: remove duplicate MIPS_CONF4_FTLBSETS_SHIFTDan Carpenter
2014-08-02MIPS: define MAAR register accessors & bitsPaul Burton
2014-08-02MIPS: kernel: cpu-probe: Detect unique RI/XI exceptionsLeonid Yegoshin
2014-08-02MIPS: asm: Add register definitions for Hardware Table WalkerMarkos Chandras
2014-05-30MIPS: Add function get_ebase_cpunumDavid Daney
2014-05-24MIPS: MT: Remove SMTC supportRalf Baechle
2014-05-23MIPS: Disable MIPS16/microMIPS crap for platforms not supporting these ASEs.Ralf Baechle
2014-03-26MIPS: Add MSA register definitions & accessPaul Burton
2014-03-06MIPS: Add CP0 CMGCRBase definitions & accessorPaul Burton
2014-03-06MIPS: Define Config1 cache field shifts & sizesPaul Burton
2014-03-06MIPS: mm: c-r4k: Detect instruction cache aliasesMarkos Chandras
2014-01-23MIPS: include linux/types.hQais Yousef
2014-01-22MIPS: Add support for FTLBsLeonid Yegoshin
2014-01-22MIPS: Add function for flushing the TLB using the TLBINV instructionLeonid Yegoshin
2014-01-22MIPS: features: Add initial support for Segmentation Control registersSteven J. Hill
2014-01-22MIPS: Add missing bits for Config registersLeonid Yegoshin
2013-09-19MIPS: Add MIPS R5 config5 register.Ralf Baechle
2013-07-01MIPS: microMIPS: Fix improper definition of ISA exception bit.Steven J. Hill
2013-05-09MIPS: microMIPS: Add support for exception handling.Steven J. Hill