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Author
2020-07-28
Merge branch 'kvm-arm64/misc-5.9' into kvmarm-master/next-WIP
Marc Zyngier
2020-07-28
Merge branch 'kvm-arm64/target-table-no-more' into kvmarm-master/next-WIP
Marc Zyngier
2020-07-28
Merge branch 'kvm-arm64/ptrauth-nvhe' into kvmarm-master/next-WIP
Marc Zyngier
2020-07-28
Merge branch 'kvm-arm64/pre-nv-5.9' into kvmarm-master/next-WIP
Marc Zyngier
2020-07-28
KVM: arm64: Substitute RANDOMIZE_BASE for HARDEN_EL2_VECTORS
David Brazdil
2020-07-28
KVM: arm64: Prevent vcpu_has_ptrauth from generating OOL functions
Marc Zyngier
2020-07-25
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
David S. Miller
2020-07-24
arm64/vdso: Add time namespace page
Andrei Vagin
2020-07-24
arm64: Reserve HWCAP2_MTE as (1 << 18)
Catalin Marinas
2020-07-22
arm64: s/AMEVTYPE/AMEVTYPER
Vladimir Murzin
2020-07-22
arch_topology, sched/core: Cleanup thermal pressure definition
Valentin Schneider
2020-07-21
arm64: perf: Expose some new events via sysfs
Shaokun Zhang
2020-07-21
arm64: Reduce the number of header files pulled into vmlinux.lds.S
Will Deacon
2020-07-21
asm/rwonce: Don't pull <asm/barrier.h> into 'asm-generic/rwonce.h'
Will Deacon
2020-07-19
net: remove compat_sys_{get,set}sockopt
Christoph Hellwig
2020-07-17
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm6...
Linus Torvalds
2020-07-16
arm64: compat: Ensure upper 32 bits of x0 are zero on syscall return
Will Deacon
2020-07-16
arm64: ptrace: Override SPSR.SS when single-stepping is enabled
Will Deacon
2020-07-16
arm64: ptrace: Consistently use pseudo-singlestep exceptions
Will Deacon
2020-07-15
arm64: tlb: Use the TLBI RANGE feature in arm64
Zhenyu Ye
2020-07-15
arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature
Zhenyu Ye
2020-07-15
arm64/hugetlb: Reserve CMA areas for gigantic pages on 16K and 64K configs
Anshuman Khandual
2020-07-14
arm64/acpi: disallow AML memory opregions to access kernel memory
Ard Biesheuvel
2020-07-10
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm6...
Linus Torvalds
2020-07-10
arm64: tlb: don't set the ttl value in flush_tlb_page_nosync
Zhenyu Ye
2020-07-10
KVM: arm64: clean up redundant 'kvm_run' parameters
Tianjia Zhang
2020-07-09
KVM: arm64: Use common KVM implementation of MMU memory caches
Sean Christopherson
2020-07-09
KVM: arm64: Use common code's approach for __GFP_ZERO with memory caches
Sean Christopherson
2020-07-09
KVM: Move x86's version of struct kvm_mmu_memory_cache to common code
Sean Christopherson
2020-07-08
arm64: arch_timer: Allow an workaround descriptor to disable compat vdso
Marc Zyngier
2020-07-08
arm64: Introduce a way to disable the 32bit vdso
Marc Zyngier
2020-07-08
KVM: arm64: Fix definition of PAGE_HYP_DEVICE
Will Deacon
2020-07-07
KVM: arm64: Don't use has_vhe() for CHOOSE_HYP_SYM()
Marc Zyngier
2020-07-07
arm64: Shift the __tlbi_level() indentation left
Catalin Marinas
2020-07-07
arm64: tlb: Set the TTL field in flush_*_tlb_range
Zhenyu Ye
2020-07-07
arm64: tlb: Set the TTL field in flush_tlb_range
Zhenyu Ye
2020-07-07
arm64: Add tlbi_user_level TLB invalidation helper
Zhenyu Ye
2020-07-07
KVM: arm64: timers: Move timer registers to the sys_regs file
Marc Zyngier
2020-07-07
KVM: arm64: Move SPSR_EL1 to the system register array
Marc Zyngier
2020-07-07
KVM: arm64: Disintegrate SPSR array
Marc Zyngier
2020-07-07
KVM: arm64: Move SP_EL1 to the system register array
Marc Zyngier
2020-07-07
KVM: arm64: Move ELR_EL1 to the system register array
Marc Zyngier
2020-07-07
KVM: arm64: Make struct kvm_regs userspace-only
Marc Zyngier
2020-07-07
KVM: arm64: hyp: Use ctxt_sys_reg/__vcpu_sys_reg instead of raw sys_regs access
Marc Zyngier
2020-07-07
KVM: arm64: Introduce accessor for ctxt->sys_reg
Marc Zyngier
2020-07-07
KVM: arm64: Use TTL hint in when invalidating stage-2 translations
Marc Zyngier
2020-07-07
KVM: arm64: Factor out stage 2 page table data from struct kvm
Christoffer Dall
2020-07-07
Merge branch 'kvm-arm64/ttl-for-arm64' into HEAD
Marc Zyngier
2020-07-07
arm64: Add level-hinted TLB invalidation helper
Marc Zyngier
2020-07-07
arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors
Marc Zyngier
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