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2011-10-17ARM: 7123/1: smp: Add an IPI handler callable from C codeShawn Guo
In order to be able to handle IPI directly from C code instead of assembly code, introduce handle_IPI(), which is modeled after handle_IRQ(). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17ARM: 7060/1: smp: populate logical CPU mapping during bootWill Deacon
To allow booting Linux on a CPU with physical ID != 0, we need to provide a mapping from the logical CPU number to the physical CPU number. This patch adds such a mapping and populates it during boot. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17ARM: 7011/1: Add ARM cpu topology definitionVincent Guittot
The affinity between ARM processors is defined in the MPIDR register. We can identify which processors are in the same cluster, and which ones have performance interdependency. We can define the cpu topology of ARM platform, that is then used by sched_mc and sched_smt. The default state of sched_mc and sched_smt config is disable. When enabled, the behavior of the scheduler can be modified with sched_mc_power_savings and sched_smt_power_savings sysfs interfaces. Changes since v4 : * Remove unnecessary parentheses and blank lines Changes since v3 : * Update the format of printk message * Remove blank line Changes since v2 : * Update the commit message and some comments Changes since v1 : * Update the commit message * Add read_cpuid_mpidr in arch/arm/include/asm/cputype.h * Modify header of arch/arm/kernel/topology.c * Modify tests and manipulation of MPIDR's bitfields * Modify the place and dependancy of the config * Modify Noop functions Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-15ARM: 7122/1: localtimer: add header linux/errno.h explicitlyShawn Guo
Per the text in Documentation/SubmitChecklist as below, we should explicitly have header linux/errno.h in localtimer.h for ENXIO reference. 1: If you use a facility then #include the file that defines/declares that facility. Don't depend on other header files pulling in ones that you use. Otherwise, we may run into some compiling error like the following one, if any file includes localtimer.h without CONFIG_LOCAL_TIMERS defined. arch/arm/include/asm/localtimer.h: In function ‘local_timer_setup’: arch/arm/include/asm/localtimer.h:53:10: error: ‘ENXIO’ undeclared (first use in this function) Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-13ARM: switch from NO_MACH_MEMORY_H to NEED_MACH_MEMORY_HNicolas Pitre
Given that we want the default to not have any <mach/memory.h> and given that there are now fewer cases where it is still provided than the cases where it is not at this point, this makes sense to invert the logic and just identify the exception cases. The word "need" instead of "have" was chosen to construct the config symbol so not to suggest that having a mach/memory.h file is actually a feature that one should aim for. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-10-08Merge branch 'depends/rmk/devel-stable' into next/cleanupArnd Bergmann
2011-10-08ARM: pxa: use correct __iomem annotationsArnd Bergmann
This tries to clear up the confusion between integers and iomem pointers in the marvell pxa platform. MMIO addresses are supposed to be __iomem* values, in order to let the Linux type checking work correctly. This patch moves the cast to __iomem as far back as possible, to the place where the MMIO virtual address windows are defined. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2011-10-06ARM: 7077/1: LPAE: Use a mask for physical addresses in page table entriesCatalin Marinas
With LPAE, the physical address mask is 40-bit while the page table entry is 64-bit. This patch introduces PHYS_MASK for the 2-level page table format, defined as ~0UL. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-06ARM: 7076/1: LPAE: Add (pte|pmd)val_t type definitions as u32Catalin Marinas
This patch defines the (pte|pmd)val_t as u32 and changes the page table types to be based on these. The PMD bits are converted to the corresponding type using the _AT macro. The flush_pmd_entry/clean_pmd_entry argument was changed to (void *) to allow them to be used with both PGD and PMD pointers and avoid code duplication. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-06ARM: 7075/1: LPAE: Factor out 2-level page table definitions into separate filesCatalin Marinas
This patch moves page table definitions from asm/page.h, asm/pgtable.h and asm/ptgable-hwdef.h into corresponding *-2level* files. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-04Merge branches 'cleanup-part3', 'voltage', 'dmtimer' and 'l3' into dt-baseTony Lindgren
2011-10-01ARM: add io{read,write}{16,32}be functionsArnd Bergmann
These functions are used in some PCI drivers with big-endian MMIO space, and they are trivial to add here. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-09-27doc: fix broken referencesPaul Bolle
There are numerous broken references to Documentation files (in other Documentation files, in comments, etc.). These broken references are caused by typo's in the references, and by renames or removals of the Documentation files. Some broken references are simply odd. Fix these broken references, sometimes by dropping the irrelevant text they were part of. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-09-26ARM: prepare for removal of a bunch of <mach/memory.h> filesNicolas Pitre
When the CONFIG_NO_MACH_MEMORY_H symbol is selected by a particular machine class, the machine specific memory.h include file is no longer used and can be removed. In that case the equivalent information can be obtained dynamically at runtime by enabling CONFIG_ARM_PATCH_PHYS_VIRT or by specifying the physical memory address at kernel configuration time. If/when all instances of mach/memory.h are removed then this symbol could be removed. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-09-26ARM: 7099/1: futex: preserve oldval in SMP __futex_atomic_opWill Deacon
The SMP implementation of __futex_atomic_op clobbers oldval with the status flag from the exclusive store. This causes it to always read as zero when performing the FUTEX_OP_CMP_* operation. This patch updates the ARM __futex_atomic_op implementations to take a tmp argument, allowing us to store the strex status flag without overwriting the register containing oldval. Cc: stable@kernel.org Reported-by: Minho Ban <mhban@samsung.com> Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-26Merge branch 'for_3_2/for-rmk/arm_cpu_pm' of ↵Russell King
git://gitorious.org/omap-sw-develoment/linux-omap-dev into devel-stable
2011-09-23ARM: mm: Add strongly ordered descriptor support.Santosh Shilimkar
On certain architectures, there might be a need to mark certain addresses with strongly ordered memory attributes to avoid ordering issues at the interconnect level. On OMAP4, the asynchronous bridge buffers can only be drained with strongly ordered accesses and hence the need to mark the memory strongly ordered. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Woodruff Richard <r-woodruff2@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
2011-09-23ARM: gic: Use cpu pm notifiers to save gic stateColin Cross
When the cpu is powered down in a low power mode, the gic cpu interface may be reset, and when the cpu cluster is powered down, the gic distributor may also be reset. This patch uses CPU_PM_ENTER and CPU_PM_EXIT notifiers to save and restore the gic cpu interface registers, and the CPU_CLUSTER_PM_ENTER and CPU_CLUSTER_PM_EXIT notifiers to save and restore the gic distributor registers. Original-author: Gary King <gking@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
2011-09-22Merge branch 'pm' into devel-stableRussell King
2011-09-21ARM: 7082/1: platform_device: pdev_archdata: add omap_device pointerKevin Hilman
Add omap_device pointer to the ARM-specific arch data in the platform_device. This will be used to attach OMAP-specific device-data to the platform device with device lifetime. Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-21Merge branch 'kprobes-test' of git://git.yxit.co.uk/linux into devel-stableRussell King
2011-09-20ARM: pm: convert some assembly to CRussell King
Convert some of the sleep.S guts to C code, which makes it easier to use our macros and to add L2 cache handling. We provide a helper function, __cpu_suspend_save(), which deals with saving the common state, setting up for resume, and flushing caches. The remainder left as assembly code is the saving of the CPU general purpose registers, and allocating space on the stack to save the CPU specific registers and resume state. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-20ARM: pm: preallocate a page table for suspend/resumeRussell King
Preallocate a page table and setup an identity mapping for the MMU enable code. This means we don't have to "borrow" a page table to do this, avoiding complexities with L2 cache coherency. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-17ARM: nommu: fix warning with checksyscalls.shRussell King
CALL scripts/checksyscalls.sh <stdin>:46:1: warning: "__IGNORE_migrate_pages" redefined In file included from <stdin>:2: arch/arm/include/asm/unistd.h:482:1: warning: this is the location of the previous definition This is caused because we define __IGNORE_migrate_pages to be 1, but in the case of nommu, it's defined to be empty. Fix this by just defining the __IGNORE_ symbols to be empty. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-16Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6-wd into devel-stableRussell King
Conflicts: arch/arm/mach-imx/mach-cpuimx27.c
2011-09-13locking, ARM: Annotate low level hw locks as rawThomas Gleixner
Annotate the low level hardware locks which must not be preempted. In mainline this change documents the low level nature of the lock - otherwise there's no functional difference. Lockdep and Sparse checking will work as usual. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-09-07ARM: 7080/1: l2x0: make sure I&D are not locked down on initLinus Walleij
Fighting unfixed U-Boots and other beasts that may the cache in a locked-down state when starting the kernel, we make sure to disable all cache lock-down when initializing the l2x0 so we are in a known state. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Adrian Bunk <adrian.bunk@movial.com> Cc: Rob Herring <robherring2@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: Jan Rinze <janrinze@gmail.com> Tested-by: Robert Marklund <robert.marklund@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-31Merge branches 'hwbreak', 'perf/updates' and 'perf/system-pmus' into for-rmkWill Deacon
2011-08-31ARM: perf: move arm_pmu into <asm/pmu.h>Mark Rutland
Currently, struct arm_pmu and related functions are only visible to {,arch/arm/}/kernel/perf_event.c. This prevents new drivers from using the framework. This patch moves declarations to asm/pmu.h, allowing new PMU drivers to use the framework. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Ashwin Chaugule <ashwinc@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-31ARM: hw_breakpoint: add support for multiple watchpointsWill Deacon
ARM debug architecture 7.1 mandates that the DFAR is updated on a watchpoint debug exception to contain the faulting virtual address of the memory access. This allows us to determine which watchpoints have fired and therefore report useful information to userspace. This patch adds support for using the DFAR in the watchpoint handler, which allows us to support multiple watchpoints on CPUs implementing the new debug architecture. Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-31ARM: hw_breakpoint: add initial Cortex-A15 (debug v7.1) supportWill Deacon
This patch adds initial support for Cortex-A15 (debug architecture v7.1) to the hw_breakpoint ARM backend. Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-31ARM: PMU: move CPU PMU platform device handling and init into perfWill Deacon
Once upon a time, OProfile and Perf fought hard over who could play with the PMU. To stop all hell from breaking loose, pmu.c offered an internal reserve/release API and took care of parsing PMU platform data passed in from board support code. Now that Perf has ingested OProfile, let's move the platform device handling into the Perf driver and out of the PMU locking code. Unfortunately, the lock has to remain to prevent Perf being bitten by out-of-tree modules such as LTTng, which still claim a right to the PMU when Perf isn't looking. Acked-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-29Merge the enabling by default of ARM_PATCH_PHYS_VIRTNicolas Pitre
Conflicts: arch/arm/mach-msm/board-msm7x30.c
2011-08-25ARM: asm/pl080.h: Protect against multiple inclusion of header fileViresh Kumar
<asm/hardware/pl080.h> doesn't have protection to deal with multiple inclusion. And so we get compilation errors in cases where this file is included more than once. This patch adds #ifdefs at the top of file to protect it against multiple inclusions. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2011-08-23ARM: 7058/1: LPAE: Cast the dma_addr_t argument to unsigned long in dma_to_virtCatalin Marinas
This is to avoid a compiler warning when invoking the __bus_to_virt() macro. The dma_to_virt() function gets addresses within the 32-bit range. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-23Merge branch 'atag_offset' of git://git.linaro.org/people/nico/linux into ↵Russell King
devel-stable
2011-08-22ARM: Add init_consistent_dma_size()Jon Medhurst
This function can be called during boot to increase the size of the consistent DMA region above it's default value of 2MB. It must be called before the memory allocator is initialised, i.e. before any core_initcall. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-08-21ARM: remove boot_params from struct machine_descNicolas Pitre
Now that there is no more users, we can remove it from the kernel. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-08-21ARM: introduce atag_offset to replace boot_paramsNicolas Pitre
The boot_params member of the mdesc structure is used to provide a default physical address for the ATAG list. Since this value is fixed at compile time and sometimes based on constants such as ARCH_PHYS_OFFSET, it gets in the way of runtime PHYS_OFFSET and CONFIG_ARM_PATCH_PHYS_VIRT usage. Let's introduce atag_offset which should contains only the relative offset from PHYS_OFFSET instead of an absolute value, in preparation to move all instance of boot_params over to it. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: Petr Štetiar <ynezz@true.cz> Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-08-17ARM: io: add a default IO_SPACE_LIMIT definitionRussell King
Add a default IO_SPACE_LIMIT definition. Explain the chosen value and suggest why platforms would want to make it larger. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-17ARM: io: ecard: move ioaddr() inside __ecard_addressRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-15ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation.Srinivas Kandagatla
This patch fixes L2 Cache size calculations for L2C-210, L2C-310 and PL310, by changing the L2X0_AUX_CTRL_WAY_SIZE_MASK from 2 bits to 3 bits. The Auxiliary Control Register for L2C-210, L2C-310 and PL310 has 3bits [19:17] for Way size, however the existing code only uses 2 bits to get this value. This results in incorrect cachesize calculations. It also results in performing operations on the whole cache when we erroneously decide that the range is big enough (due to l2x0_size being too small) and also prints incorrect cachesize. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: stable@kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-13ARM: 7013/1: P2V: Remove ARM_PATCH_PHYS_VIRT_16BITNicolas Pitre
This code can be removed now that MSM targets no longer need the 16-bit offsets for P2V. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-12ARM: perf: make name of arm_pmu_type consistentMark Rutland
Commit f12482c9 ("ARM: 6974/1: pmu: refactor reservation") changed {release,reserve}_pmu to take an enum arm_pmu_type as a parameter, but inconsistently named the parameter `type' or `device'. It would be nice if these were consistent. This patch makes use of enum arm_pmu_type consistent, always using `type'. Related printks are updated, explicitly mentioning `type' also. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-12ARM: perf: fix prototype of release_pmuMark Rutland
Commit f12482c9 ("ARM: 6974/1: pmu: refactor reservation") changed the prototype of release_pmu, but missed the stub for when CONFIG_CPU_HAS_PMU is not selected by the platform. This patch changes the prototype of the stub, preventing possible build failures when CONFIG_CPU_HAS_PMU is not selected. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-12ARM: gpio: make trivial GPIOLIB implementation the defaultRussell King
Rather than marking the mach/gpio.h header files which want to use the trivial GPIOLIB implementation, mark those which do not want to use it instead. This means that by default, you get the trivial implementation and only have to do something extra if you need to. This should encourage the use of the trivial default implementation. As an additional bonus, several gpio.h header files become empty. Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-12ARM: gpio: consolidate gpio_to_irqRussell King
Many of the gpio_to_irq implementations use the gpiolib version of this function. Provide the standard gpiolib gpio_to_irq() for everyone, but allow platforms to override it if they wish. Add the neccessary overrides for those platforms which do not use the standard definition. Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-12ARM: gpio: consolidate trivial gpiolib implementationsRussell King
Consolidate 24 trivial gpiolib implementions out of mach/gpio.h into asm/gpio.h. This is basically the include of asm-generic/gpio.h and the definition of gpio_get_value, gpio_set_value, and gpio_cansleep as described in Documentation/gpio.txt Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: David Brown <davidb@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-29Merge branch 'linux-next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI: remove printks about disabled bridge windows PCI: fold pci_calc_resource_flags() into decode_bar() PCI: treat mem BAR type "11" (reserved) as 32-bit, not 64-bit, BAR PCI: correct pcie_set_readrq write size PCI: pciehp: change wait time for valid configuration access x86/PCI: Preserve existing pci=bfsort whitelist for Dell systems PCI: ARI is a PCIe v2 feature x86/PCI: quirks: Use pci_dev->revision PCI: Make the struct pci_dev * argument of pci_fixup_irqs const. PCI hotplug: cpqphp: use pci_dev->vendor PCI hotplug: cpqphp: use pci_dev->subsystem_{vendor|device} x86/PCI: config space accessor functions should not ignore the segment argument PCI: Assign values to 'pci_obff_signal_type' enumeration constants x86/PCI: reduce severity of host bridge window conflict warnings PCI: enumerate the PCI device only removed out PCI hieratchy of OS when re-scanning PCI PCI: PCIe AER: add aer_recover_queue x86/PCI: select direct access mode for mmconfig option PCI hotplug: Rename is_ejectable which also exists in dock.c
2011-07-28Merge branch 'imx/dt' into next/dtArnd Bergmann