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path: root/drivers/pci/controller/dwc/pcie-designware-debugfs.c
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Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware-debugfs.c')
-rw-r--r--drivers/pci/controller/dwc/pcie-designware-debugfs.c73
1 files changed, 63 insertions, 10 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-debugfs.c b/drivers/pci/controller/dwc/pcie-designware-debugfs.c
index 0d1340c9b364..d0884253be97 100644
--- a/drivers/pci/controller/dwc/pcie-designware-debugfs.c
+++ b/drivers/pci/controller/dwc/pcie-designware-debugfs.c
@@ -131,13 +131,16 @@ static const u32 err_inj_type_mask[] = {
* supported in DWC RAS DES
* @name: Name of the error counter
* @group_no: Group number that the event belongs to. The value can range
- * from 0 to 4
+ * from 0 to 7
* @event_no: Event number of the particular event. The value ranges are:
* Group 0: 0 - 10
* Group 1: 5 - 13
* Group 2: 0 - 7
* Group 3: 0 - 5
* Group 4: 0 - 1
+ * Group 5: 0 - 13
+ * Group 6: 0 - 6
+ * Group 7: 0 - 25
*/
struct dwc_pcie_event_counter {
const char *name;
@@ -181,6 +184,53 @@ static const struct dwc_pcie_event_counter event_list[] = {
{"completion_timeout", 0x3, 0x5},
{"ebuf_skp_add", 0x4, 0x0},
{"ebuf_skp_del", 0x4, 0x1},
+ {"l0_to_recovery_entry", 0x5, 0x0},
+ {"l1_to_recovery_entry", 0x5, 0x1},
+ {"tx_l0s_entry", 0x5, 0x2},
+ {"rx_l0s_entry", 0x5, 0x3},
+ {"aspm_l1_reject", 0x5, 0x4},
+ {"l1_entry", 0x5, 0x5},
+ {"l1_cpm", 0x5, 0x6},
+ {"l1.1_entry", 0x5, 0x7},
+ {"l1.2_entry", 0x5, 0x8},
+ {"l1_short_duration", 0x5, 0x9},
+ {"l1.2_abort", 0x5, 0xa},
+ {"l2_entry", 0x5, 0xb},
+ {"speed_change", 0x5, 0xc},
+ {"link_width_change", 0x5, 0xd},
+ {"tx_ack_dllp", 0x6, 0x0},
+ {"tx_update_fc_dllp", 0x6, 0x1},
+ {"rx_ack_dllp", 0x6, 0x2},
+ {"rx_update_fc_dllp", 0x6, 0x3},
+ {"rx_nullified_tlp", 0x6, 0x4},
+ {"tx_nullified_tlp", 0x6, 0x5},
+ {"rx_duplicate_tlp", 0x6, 0x6},
+ {"tx_memory_write", 0x7, 0x0},
+ {"tx_memory_read", 0x7, 0x1},
+ {"tx_configuration_write", 0x7, 0x2},
+ {"tx_configuration_read", 0x7, 0x3},
+ {"tx_io_write", 0x7, 0x4},
+ {"tx_io_read", 0x7, 0x5},
+ {"tx_completion_without_data", 0x7, 0x6},
+ {"tx_completion_w_data", 0x7, 0x7},
+ {"tx_message_tlp_pcie_vc_only", 0x7, 0x8},
+ {"tx_atomic", 0x7, 0x9},
+ {"tx_tlp_with_prefix", 0x7, 0xa},
+ {"rx_memory_write", 0x7, 0xb},
+ {"rx_memory_read", 0x7, 0xc},
+ {"rx_configuration_write", 0x7, 0xd},
+ {"rx_configuration_read", 0x7, 0xe},
+ {"rx_io_write", 0x7, 0xf},
+ {"rx_io_read", 0x7, 0x10},
+ {"rx_completion_without_data", 0x7, 0x11},
+ {"rx_completion_w_data", 0x7, 0x12},
+ {"rx_message_tlp_pcie_vc_only", 0x7, 0x13},
+ {"rx_atomic", 0x7, 0x14},
+ {"rx_tlp_with_prefix", 0x7, 0x15},
+ {"tx_ccix_tlp", 0x7, 0x16},
+ {"rx_ccix_tlp", 0x7, 0x17},
+ {"tx_deferrable_memory_write_tlp", 0x7, 0x18},
+ {"rx_deferrable_memory_write_tlp", 0x7, 0x19},
};
static ssize_t lane_detect_read(struct file *file, char __user *buf,
@@ -208,10 +258,11 @@ static ssize_t lane_detect_write(struct file *file, const char __user *buf,
struct dw_pcie *pci = file->private_data;
struct dwc_pcie_rasdes_info *rinfo = pci->debugfs->rasdes_info;
u32 lane, val;
+ int ret;
- val = kstrtou32_from_user(buf, count, 0, &lane);
- if (val)
- return val;
+ ret = kstrtou32_from_user(buf, count, 0, &lane);
+ if (ret)
+ return ret;
val = dw_pcie_readl_dbi(pci, rinfo->ras_cap_offset + SD_STATUS_L1LANE_REG);
val &= ~(LANE_SELECT);
@@ -347,10 +398,11 @@ static ssize_t counter_enable_write(struct file *file, const char __user *buf,
struct dw_pcie *pci = pdata->pci;
struct dwc_pcie_rasdes_info *rinfo = pci->debugfs->rasdes_info;
u32 val, enable;
+ int ret;
- val = kstrtou32_from_user(buf, count, 0, &enable);
- if (val)
- return val;
+ ret = kstrtou32_from_user(buf, count, 0, &enable);
+ if (ret)
+ return ret;
mutex_lock(&rinfo->reg_event_lock);
set_event_number(pdata, pci, rinfo);
@@ -408,10 +460,11 @@ static ssize_t counter_lane_write(struct file *file, const char __user *buf,
struct dw_pcie *pci = pdata->pci;
struct dwc_pcie_rasdes_info *rinfo = pci->debugfs->rasdes_info;
u32 val, lane;
+ int ret;
- val = kstrtou32_from_user(buf, count, 0, &lane);
- if (val)
- return val;
+ ret = kstrtou32_from_user(buf, count, 0, &lane);
+ if (ret)
+ return ret;
mutex_lock(&rinfo->reg_event_lock);
set_event_number(pdata, pci, rinfo);