diff options
Diffstat (limited to 'drivers/mtd/spi-nor/micron-st.c')
| -rw-r--r-- | drivers/mtd/spi-nor/micron-st.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c index b63f1e9b97d0..3c6499fdb712 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -209,10 +209,30 @@ static int st_nor_four_die_late_init(struct spi_nor *nor) return spi_nor_set_4byte_addr_mode(nor, true); } +static int st_nor_two_die_late_init(struct spi_nor *nor) +{ + struct spi_nor_flash_parameter *params = nor->params; + + params->die_erase_opcode = SPINOR_OP_MT_DIE_ERASE; + params->n_dice = 2; + + /* + * Unfortunately the die erase opcode does not have a 4-byte opcode + * correspondent for these flashes. The SFDP 4BAIT table fails to + * consider the die erase too. We're forced to enter in the 4 byte + * address mode in order to benefit of the die erase. + */ + return spi_nor_set_4byte_addr_mode(nor, true); +} + static struct spi_nor_fixups n25q00_fixups = { .late_init = st_nor_four_die_late_init, }; +static struct spi_nor_fixups mt25q01_fixups = { + .late_init = st_nor_two_die_late_init, +}; + static struct spi_nor_fixups mt25q02_fixups = { .late_init = st_nor_four_die_late_init, }; @@ -456,6 +476,11 @@ static const struct flash_info st_nor_parts[] = { .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ, .mfr_flags = USE_FSR, }, { + .id = SNOR_ID(0x20, 0xbb, 0x21, 0x10, 0x44, 0x00), + .name = "mt25qu01g", + .mfr_flags = USE_FSR, + .fixups = &mt25q01_fixups, + }, { .id = SNOR_ID(0x20, 0xbb, 0x21), .name = "n25q00a", .size = SZ_128M, |