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-rw-r--r--arch/arm/mach-kirkwood/Kconfig12
-rw-r--r--arch/arm/mach-kirkwood/Makefile4
-rw-r--r--arch/arm/mach-kirkwood/common.c111
-rw-r--r--arch/arm/mach-kirkwood/common.h7
-rw-r--r--arch/arm/mach-kirkwood/db88f6281-bp-setup.c67
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h3
-rw-r--r--arch/arm/mach-kirkwood/include/mach/system.h2
-rw-r--r--arch/arm/mach-kirkwood/mpp.c97
-rw-r--r--arch/arm/mach-kirkwood/mpp.h303
-rw-r--r--arch/arm/mach-kirkwood/rd88f6192-nas-setup.c9
-rw-r--r--arch/arm/mach-kirkwood/rd88f6281-setup.c32
-rw-r--r--arch/arm/mach-kirkwood/sheevaplug-setup.c136
-rw-r--r--arch/arm/mach-kirkwood/ts219-setup.c220
13 files changed, 966 insertions, 37 deletions
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 3600cd9f0519..b5421cccd7e1 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -20,6 +20,18 @@ config MACH_RD88F6281
Say 'Y' here if you want your kernel to support the
Marvell RD-88F6281 Reference Board.
+config MACH_SHEEVAPLUG
+ bool "Marvell SheevaPlug Reference Board"
+ help
+ Say 'Y' here if you want your kernel to support the
+ Marvell SheevaPlug Reference Board.
+
+config MACH_TS219
+ bool "QNAP TS-119 and TS-219 Turbo NAS"
+ help
+ Say 'Y' here if you want your kernel to support the
+ QNAP TS-119 and TS-219 Turbo NAS devices.
+
endmenu
endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index b96c55dad343..8f03c9b9bdd9 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -1,5 +1,7 @@
-obj-y += common.o addr-map.o irq.o pcie.o
+obj-y += common.o addr-map.o irq.o pcie.o mpp.o
obj-$(CONFIG_MACH_DB88F6281_BP) += db88f6281-bp-setup.o
obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o
obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o
+obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o
+obj-$(CONFIG_MACH_TS219) += ts219-setup.o
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index b3404b7775b3..16dc9ea08393 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -14,6 +14,7 @@
#include <linux/serial_8250.h>
#include <linux/mbus.h>
#include <linux/mv643xx_eth.h>
+#include <linux/mv643xx_i2c.h>
#include <linux/ata_platform.h>
#include <linux/spi/orion_spi.h>
#include <net/dsa.h>
@@ -24,6 +25,7 @@
#include <mach/kirkwood.h>
#include <plat/cache-feroceon-l2.h>
#include <plat/ehci-orion.h>
+#include <plat/mvsdio.h>
#include <plat/mv_xor.h>
#include <plat/orion_nand.h>
#include <plat/time.h>
@@ -231,14 +233,17 @@ static struct platform_device kirkwood_switch_device = {
void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
{
+ int i;
+
if (irq != NO_IRQ) {
kirkwood_switch_resources[0].start = irq;
kirkwood_switch_resources[0].end = irq;
kirkwood_switch_device.num_resources = 1;
}
- d->mii_bus = &kirkwood_ge00_shared.dev;
d->netdev = &kirkwood_ge00.dev;
+ for (i = 0; i < d->nr_chips; i++)
+ d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
kirkwood_switch_device.dev.platform_data = d;
platform_device_register(&kirkwood_switch_device);
@@ -254,7 +259,7 @@ static struct resource kirkwood_rtc_resource = {
.flags = IORESOURCE_MEM,
};
-void __init kirkwood_rtc_init(void)
+static void __init kirkwood_rtc_init(void)
{
platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
}
@@ -296,6 +301,50 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
/*****************************************************************************
+ * SD/SDIO/MMC
+ ****************************************************************************/
+static struct resource mvsdio_resources[] = {
+ [0] = {
+ .start = SDIO_PHYS_BASE,
+ .end = SDIO_PHYS_BASE + SZ_1K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_KIRKWOOD_SDIO,
+ .end = IRQ_KIRKWOOD_SDIO,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 mvsdio_dmamask = 0xffffffffUL;
+
+static struct platform_device kirkwood_sdio = {
+ .name = "mvsdio",
+ .id = -1,
+ .dev = {
+ .dma_mask = &mvsdio_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(mvsdio_resources),
+ .resource = mvsdio_resources,
+};
+
+void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
+{
+ u32 dev, rev;
+
+ kirkwood_pcie_id(&dev, &rev);
+ if (rev == 0) /* catch all Kirkwood Z0's */
+ mvsdio_data->clock = 100000000;
+ else
+ mvsdio_data->clock = 200000000;
+ mvsdio_data->dram = &kirkwood_mbus_dram_info;
+ kirkwood_sdio.dev.platform_data = mvsdio_data;
+ platform_device_register(&kirkwood_sdio);
+}
+
+
+/*****************************************************************************
* SPI
****************************************************************************/
static struct orion_spi_info kirkwood_spi_plat_data = {
@@ -326,6 +375,45 @@ void __init kirkwood_spi_init()
/*****************************************************************************
+ * I2C
+ ****************************************************************************/
+static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
+ .freq_m = 8, /* assumes 166 MHz TCLK */
+ .freq_n = 3,
+ .timeout = 1000, /* Default timeout of 1 second */
+};
+
+static struct resource kirkwood_i2c_resources[] = {
+ {
+ .name = "i2c",
+ .start = I2C_PHYS_BASE,
+ .end = I2C_PHYS_BASE + 0x1f,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .name = "i2c",
+ .start = IRQ_KIRKWOOD_TWSI,
+ .end = IRQ_KIRKWOOD_TWSI,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device kirkwood_i2c = {
+ .name = MV64XXX_I2C_CTLR_NAME,
+ .id = 0,
+ .num_resources = ARRAY_SIZE(kirkwood_i2c_resources),
+ .resource = kirkwood_i2c_resources,
+ .dev = {
+ .platform_data = &kirkwood_i2c_pdata,
+ },
+};
+
+void __init kirkwood_i2c_init(void)
+{
+ platform_device_register(&kirkwood_i2c);
+}
+
+
+/*****************************************************************************
* UART0
****************************************************************************/
static struct plat_serial8250_port kirkwood_uart0_data[] = {
@@ -420,7 +508,7 @@ static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
.dram = &kirkwood_mbus_dram_info,
};
-static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK;
+static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
/*****************************************************************************
@@ -471,7 +559,7 @@ static struct platform_device kirkwood_xor00_channel = {
.resource = kirkwood_xor00_resources,
.dev = {
.dma_mask = &kirkwood_xor_dmamask,
- .coherent_dma_mask = DMA_64BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(64),
.platform_data = (void *)&kirkwood_xor00_data,
},
};
@@ -497,12 +585,12 @@ static struct platform_device kirkwood_xor01_channel = {
.resource = kirkwood_xor01_resources,
.dev = {
.dma_mask = &kirkwood_xor_dmamask,
- .coherent_dma_mask = DMA_64BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(64),
.platform_data = (void *)&kirkwood_xor01_data,
},
};
-void __init kirkwood_xor0_init(void)
+static void __init kirkwood_xor0_init(void)
{
platform_device_register(&kirkwood_xor0_shared);
@@ -569,7 +657,7 @@ static struct platform_device kirkwood_xor10_channel = {
.resource = kirkwood_xor10_resources,
.dev = {
.dma_mask = &kirkwood_xor_dmamask,
- .coherent_dma_mask = DMA_64BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(64),
.platform_data = (void *)&kirkwood_xor10_data,
},
};
@@ -595,12 +683,12 @@ static struct platform_device kirkwood_xor11_channel = {
.resource = kirkwood_xor11_resources,
.dev = {
.dma_mask = &kirkwood_xor_dmamask,
- .coherent_dma_mask = DMA_64BIT_MASK,
+ .coherent_dma_mask = DMA_BIT_MASK(64),
.platform_data = (void *)&kirkwood_xor11_data,
},
};
-void __init kirkwood_xor1_init(void)
+static void __init kirkwood_xor1_init(void)
{
platform_device_register(&kirkwood_xor1_shared);
@@ -708,4 +796,9 @@ void __init kirkwood_init(void)
#ifdef CONFIG_CACHE_FEROCEON_L2
kirkwood_l2_init();
#endif
+
+ /* internal devices that every board has */
+ kirkwood_rtc_init();
+ kirkwood_xor0_init();
+ kirkwood_xor1_init();
}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index fe367c18e722..6ee88406f381 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -14,6 +14,7 @@
struct dsa_platform_data;
struct mv643xx_eth_platform_data;
struct mv_sata_platform_data;
+struct mvsdio_platform_data;
/*
* Basic Kirkwood init functions used early by machine-setup.
@@ -33,14 +34,14 @@ void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data);
void kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data);
void kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq);
void kirkwood_pcie_init(void);
-void kirkwood_rtc_init(void);
void kirkwood_sata_init(struct mv_sata_platform_data *sata_data);
+void kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data);
void kirkwood_spi_init(void);
+void kirkwood_i2c_init(void);
void kirkwood_uart0_init(void);
void kirkwood_uart1_init(void);
-void kirkwood_xor0_init(void);
-void kirkwood_xor1_init(void);
+extern int kirkwood_tclk;
extern struct sys_timer kirkwood_timer;
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index a14c2948c62a..5505d5837752 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -11,18 +11,59 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
-#include <linux/timer.h>
+#include <linux/mtd/partitions.h>
#include <linux/ata_platform.h>
#include <linux/mv643xx_eth.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
#include <mach/kirkwood.h>
+#include <plat/orion_nand.h>
+#include <plat/mvsdio.h>
#include "common.h"
+#include "mpp.h"
+
+static struct mtd_partition db88f6281_nand_parts[] = {
+ {
+ .name = "u-boot",
+ .offset = 0,
+ .size = SZ_1M
+ }, {
+ .name = "uImage",
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = SZ_4M
+ }, {
+ .name = "root",
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = MTDPART_SIZ_FULL
+ },
+};
+
+static struct resource db88f6281_nand_resource = {
+ .flags = IORESOURCE_MEM,
+ .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
+ .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
+ KIRKWOOD_NAND_MEM_SIZE - 1,
+};
+
+static struct orion_nand_data db88f6281_nand_data = {
+ .parts = db88f6281_nand_parts,
+ .nr_parts = ARRAY_SIZE(db88f6281_nand_parts),
+ .cle = 0,
+ .ale = 1,
+ .width = 8,
+ .chip_delay = 25,
+};
+
+static struct platform_device db88f6281_nand_flash = {
+ .name = "orion_nand",
+ .id = -1,
+ .dev = {
+ .platform_data = &db88f6281_nand_data,
+ },
+ .resource = &db88f6281_nand_resource,
+ .num_resources = 1,
+};
static struct mv643xx_eth_platform_data db88f6281_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
@@ -32,18 +73,32 @@ static struct mv_sata_platform_data db88f6281_sata_data = {
.n_ports = 2,
};
+static struct mvsdio_platform_data db88f6281_mvsdio_data = {
+ .gpio_write_protect = 37,
+ .gpio_card_detect = 38,
+};
+
+static unsigned int db88f6281_mpp_config[] __initdata = {
+ MPP37_GPIO,
+ MPP38_GPIO,
+ 0
+};
+
static void __init db88f6281_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_init();
+ kirkwood_mpp_conf(db88f6281_mpp_config);
kirkwood_ehci_init();
kirkwood_ge00_init(&db88f6281_ge00_data);
- kirkwood_rtc_init();
kirkwood_sata_init(&db88f6281_sata_data);
kirkwood_uart0_init();
+ kirkwood_sdio_init(&db88f6281_mvsdio_data);
+
+ platform_device_register(&db88f6281_nand_flash);
}
static int __init db88f6281_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index ada480c0e197..38c986853590 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -93,6 +93,7 @@
#define DEVICE_ID (DEV_BUS_VIRT_BASE | 0x0034)
#define RTC_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x0300)
#define SPI_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x0600)
+#define I2C_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1000)
#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000)
#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000)
#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100)
@@ -116,5 +117,7 @@
#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000)
+#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
+
#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h
index 8510f6cfdabf..23a1914c1da8 100644
--- a/arch/arm/mach-kirkwood/include/mach/system.h
+++ b/arch/arm/mach-kirkwood/include/mach/system.h
@@ -17,7 +17,7 @@ static inline void arch_idle(void)
cpu_do_idle();
}
-static inline void arch_reset(char mode)
+static inline void arch_reset(char mode, const char *cmd)
{
/*
* Enable soft reset to assert RSTOUTn.
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
new file mode 100644
index 000000000000..63c44934391a
--- /dev/null
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -0,0 +1,97 @@
+/*
+ * arch/arm/mach-kirkwood/mpp.c
+ *
+ * MPP functions for Marvell Kirkwood SoCs
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mbus.h>
+#include <linux/io.h>
+#include <asm/gpio.h>
+#include <mach/hardware.h>
+#include "common.h"
+#include "mpp.h"
+
+static unsigned int __init kirkwood_variant(void)
+{
+ u32 dev, rev;
+
+ kirkwood_pcie_id(&dev, &rev);
+
+ if (dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0)
+ return MPP_F6281_MASK;
+ if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0)
+ return MPP_F6192_MASK;
+ if (dev == MV88F6180_DEV_ID)
+ return MPP_F6180_MASK;
+
+ printk(KERN_ERR "MPP setup: unknown kirkwood variant "
+ "(dev %#x rev %#x)\n", dev, rev);
+ return 0;
+}
+
+#define MPP_CTRL(i) (DEV_BUS_VIRT_BASE + (i) * 4)
+#define MPP_NR_REGS (1 + MPP_MAX/8)
+
+void __init kirkwood_mpp_conf(unsigned int *mpp_list)
+{
+ u32 mpp_ctrl[MPP_NR_REGS];
+ unsigned int variant_mask;
+ int i;
+
+ variant_mask = kirkwood_variant();
+ if (!variant_mask)
+ return;
+
+ printk(KERN_DEBUG "initial MPP regs:");
+ for (i = 0; i < MPP_NR_REGS; i++) {
+ mpp_ctrl[i] = readl(MPP_CTRL(i));
+ printk(" %08x", mpp_ctrl[i]);
+ }
+ printk("\n");
+
+ while (*mpp_list) {
+ unsigned int num = MPP_NUM(*mpp_list);
+ unsigned int sel = MPP_SEL(*mpp_list);
+ int shift, gpio_mode;
+
+ if (num > MPP_MAX) {
+ printk(KERN_ERR "kirkwood_mpp_conf: invalid MPP "
+ "number (%u)\n", num);
+ continue;
+ }
+ if (!(*mpp_list & variant_mask)) {
+ printk(KERN_WARNING
+ "kirkwood_mpp_conf: requested MPP%u config "
+ "unavailable on this hardware\n", num);
+ continue;
+ }
+
+ shift = (num & 7) << 2;
+ mpp_ctrl[num / 8] &= ~(0xf << shift);
+ mpp_ctrl[num / 8] |= sel << shift;
+
+ gpio_mode = 0;
+ if (*mpp_list & MPP_INPUT_MASK)
+ gpio_mode |= GPIO_INPUT_OK;
+ if (*mpp_list & MPP_OUTPUT_MASK)
+ gpio_mode |= GPIO_OUTPUT_OK;
+ if (sel != 0)
+ gpio_mode = 0;
+ orion_gpio_set_valid(num, gpio_mode);
+
+ mpp_list++;
+ }
+
+ printk(KERN_DEBUG " final MPP regs:");
+ for (i = 0; i < MPP_NR_REGS; i++) {
+ writel(mpp_ctrl[i], MPP_CTRL(i));
+ printk(" %08x", mpp_ctrl[i]);
+ }
+ printk("\n");
+}
diff --git a/arch/arm/mach-kirkwood/mpp.h b/arch/arm/mach-kirkwood/mpp.h
new file mode 100644
index 000000000000..e021a80c2caf
--- /dev/null
+++ b/arch/arm/mach-kirkwood/mpp.h
@@ -0,0 +1,303 @@
+/*
+ * linux/arch/arm/mach-kirkwood/mpp.h -- Multi Purpose Pins
+ *
+ * Copyright 2009: Marvell Technology Group Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __KIRKWOOD_MPP_H
+#define __KIRKWOOD_MPP_H
+
+#define MPP(_num, _sel, _in, _out, _F6180, _F6190, _F6192, _F6281) ( \
+ /* MPP number */ ((_num) & 0xff) | \
+ /* MPP select value */ (((_sel) & 0xf) << 8) | \
+ /* may be input signal */ ((!!(_in)) << 12) | \
+ /* may be output signal */ ((!!(_out)) << 13) | \
+ /* available on F6180 */ ((!!(_F6180)) << 14) | \
+ /* available on F6190 */ ((!!(_F6190)) << 15) | \
+ /* available on F6192 */ ((!!(_F6192)) << 16) | \
+ /* available on F6281 */ ((!!(_F6281)) << 17))
+
+#define MPP_NUM(x) ((x) & 0xff)
+#define MPP_SEL(x) (((x) >> 8) & 0xf)
+
+ /* num sel i o 6180 6190 6192 6281 */
+
+#define MPP_INPUT_MASK MPP( 0, 0x0, 1, 0, 0, 0, 0, 0 )
+#define MPP_OUTPUT_MASK MPP( 0, 0x0, 0, 1, 0, 0, 0, 0 )
+
+#define MPP_F6180_MASK MPP( 0, 0x0, 0, 0, 1, 0, 0, 0 )
+#define MPP_F6190_MASK MPP( 0, 0x0, 0, 0, 0, 1, 0, 0 )
+#define MPP_F6192_MASK MPP( 0, 0x0, 0, 0, 0, 0, 1, 0 )
+#define MPP_F6281_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 1 )
+
+#define MPP0_GPIO MPP( 0, 0x0, 1, 1, 1, 1, 1, 1 )
+#define MPP0_NF_IO2 MPP( 0, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP0_SPI_SCn MPP( 0, 0x2, 0, 1, 1, 1, 1, 1 )
+
+#define MPP1_GPO MPP( 1, 0x0, 0, 1, 1, 1, 1, 1 )
+#define MPP1_NF_IO3 MPP( 1, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 1, 1, 1, 1, 1 )
+
+#define MPP2_GPO MPP( 2, 0x0, 0, 1, 1, 1, 1, 1 )
+#define MPP2_NF_IO4 MPP( 2, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP2_SPI_SCK MPP( 2, 0x2, 0, 1, 1, 1, 1, 1 )
+
+#define MPP3_GPO MPP( 3, 0x0, 0, 1, 1, 1, 1, 1 )
+#define MPP3_NF_IO5 MPP( 3, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP3_SPI_MISO MPP( 3, 0x2, 1, 0, 1, 1, 1, 1 )
+
+#define MPP4_GPIO MPP( 4, 0x0, 1, 1, 1, 1, 1, 1 )
+#define MPP4_NF_IO6 MPP( 4, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP4_UART0_RXD MPP( 4, 0x2, 1, 0, 1, 1, 1, 1 )
+#define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 1, 0, 0, 1, 1 )
+#define MPP4_PTP_CLK MPP( 4, 0xd, 1, 0, 1, 1, 1, 1 )
+
+#define MPP5_GPO MPP( 5, 0x0, 0, 1, 1, 1, 1, 1 )
+#define MPP5_NF_IO7 MPP( 5, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP5_UART0_TXD MPP( 5, 0x2, 0, 1, 1, 1, 1, 1 )
+#define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 1, 1, 1, 1, 1 )
+#define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 1, 0, 1, 1, 1 )
+
+#define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 1, 1, 1, 1, 1 )
+#define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 1, 1, 1, 1, 1 )
+#define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 1, 1, 1, 1, 1 )
+
+#define MPP7_GPO MPP( 7, 0x0, 0, 1, 1, 1, 1, 1 )
+#define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 1, 1, 1, 1, 1 )
+#define MPP7_SPI_SCn MPP( 7, 0x2, 0, 1, 1, 1, 1, 1 )
+#define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 1, 1, 1, 1, 1 )
+
+#define MPP8_GPIO MPP( 8, 0x0, 1, 1, 1, 1, 1, 1 )
+#define MPP8_TW_SDA MPP( 8, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP8_UART0_RTS MPP( 8, 0x2, 0, 1, 1, 1, 1, 1 )
+#define MPP8_UART1_RTS MPP( 8, 0x3, 0, 1, 1, 1, 1, 1 )
+#define MPP8_MII0_RXERR MPP( 8, 0x4, 1, 0, 0, 1, 1, 1 )
+#define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 1, 0, 0, 1, 1 )
+#define MPP8_PTP_CLK MPP( 8, 0xc, 1, 0, 1, 1, 1, 1 )
+#define MPP8_MII0_COL MPP( 8, 0xd, 1, 0, 1, 1, 1, 1 )
+
+#define MPP9_GPIO MPP( 9, 0x0, 1, 1, 1, 1, 1, 1 )
+#define MPP9_TW_SCK MPP( 9, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP9_UART0_CTS MPP( 9, 0x2, 1, 0, 1, 1, 1, 1 )
+#define MPP9_UART1_CTS MPP( 9, 0x3, 1, 0, 1, 1, 1, 1 )
+#define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 1, 0, 1, 1, 1 )
+#define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 1, 0, 1, 1, 1, 1 )
+#define MPP9_MII0_CRS MPP( 9, 0xd, 1, 0, 1, 1, 1, 1 )
+
+#define MPP10_GPO MPP( 10, 0x0, 0, 1, 1, 1, 1, 1 )
+#define MPP10_SPI_SCK MPP( 10, 0x2, 0, 1, 1, 1, 1, 1 )
+#define MPP10_UART0_TXD MPP( 10, 0X3, 0, 1, 1, 1, 1, 1 )
+#define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 1, 0, 0, 1, 1 )
+#define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 1, 1, 1, 1, 1 )
+
+#define MPP11_GPIO MPP( 11, 0x0, 1, 1, 1, 1, 1, 1 )
+#define MPP11_SPI_MISO MPP( 11, 0x2, 1, 0, 1, 1, 1, 1 )
+#define MPP11_UART0_RXD MPP( 11, 0x3, 1, 0, 1, 1, 1, 1 )
+#define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 1, 0, 1, 1, 1, 1 )
+#define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 1, 1, 1, 1, 1 )
+#define MPP11_PTP_CLK MPP( 11, 0xd, 1, 0, 1, 1, 1, 1 )
+#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 1, 0, 1, 1, 1 )
+
+#define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1 )
+#define MPP12_SD_CLK MPP( 12, 0x1, 0, 1, 1, 1, 1, 1 )
+
+#define MPP13_GPIO MPP( 13, 0x0, 1, 1, 1, 1, 1, 1 )
+#define MPP13_SD_CMD MPP( 13, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP13_UART1_TXD MPP( 13, 0x3, 0, 1, 1, 1, 1, 1 )
+
+#define MPP14_GPIO MPP( 14, 0x0, 1, 1, 1, 1, 1, 1 )
+#define MPP14_SD_D0 MPP( 14, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP14_UART1_RXD MPP( 14, 0x3, 1, 0, 1, 1, 1, 1 )
+#define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 1, 0, 0, 1, 1 )
+#define MPP14_MII0_COL MPP( 14, 0xd, 1, 0, 1, 1, 1, 1 )
+
+#define MPP15_GPIO MPP( 15, 0x0, 1, 1, 1, 1, 1, 1 )
+#define MPP15_SD_D1 MPP( 15, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP15_UART0_RTS MPP( 15, 0x2, 0, 1, 1, 1, 1, 1 )
+#define MPP15_UART1_TXD MPP( 15, 0x3, 0, 1, 1, 1, 1, 1 )
+#define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 1, 0, 1, 1, 1 )
+
+#define MPP16_GPIO MPP( 16, 0x0, 1, 1, 1, 1, 1, 1 )
+#define MPP16_SD_D2 MPP( 16, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP16_UART0_CTS MPP( 16, 0x2, 1, 0, 1, 1, 1, 1 )
+#define MPP16_UART1_RXD MPP( 16, 0x3, 1, 0, 1, 1, 1, 1 )
+#define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 1, 0, 0, 1, 1 )
+#define MPP16_MII0_CRS MPP( 16, 0xd, 1, 0, 1, 1, 1, 1 )
+
+#define MPP17_GPIO MPP( 17, 0x0, 1, 1, 1, 1, 1, 1 )
+#define MPP17_SD_D3 MPP( 17, 0x1, 1, 1, 1, 1, 1, 1 )
+#define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 1, 0, 1, 1, 1 )
+
+#define MPP18_GPO MPP( 18, 0x0, 0, 1, 1, 1, 1, 1 )
+#define MPP18_NF_IO0 MPP( 18, 0x1, 1, 1, 1, 1, 1, 1 )
+
+#define MPP19_GPO MPP( 19, 0x0, 0, 1, 1, 1, 1, 1 )
+#define MPP19_NF_IO1 MPP( 19, 0x1, 1, 1, 1, 1, 1, 1 )
+
+#define MPP20_GPIO MPP( 20, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP20_TSMP0 MPP( 20, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 1, 0, 0, 1, 1 )
+#define MPP20_GE1_0 MPP( 20, 0x3, 0, 0, 0, 1, 1, 1 )
+#define MPP20_AUDIO_SPDIFI MPP( 20, 0x4, 1, 0, 0, 0, 1, 1 )
+#define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 1, 0, 0, 1, 1 )
+
+#define MPP21_GPIO MPP( 21, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP21_TSMP1 MPP( 21, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 1, 0, 0, 1, 1 )
+#define MPP21_GE1_1 MPP( 21, 0x3, 0, 0, 0, 1, 1, 1 )
+#define MPP21_AUDIO_SPDIFO MPP( 21, 0x4, 0, 1, 0, 0, 1, 1 )
+#define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 1, 0, 1, 1, 1 )
+
+#define MPP22_GPIO MPP( 22, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP22_TSMP2 MPP( 22, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 1, 0, 0, 1, 1 )
+#define MPP22_GE1_2 MPP( 22, 0x3, 0, 0, 0, 1, 1, 1 )
+#define MPP22_AUDIO_SPDIFRMKCLK MPP( 22, 0x4, 0, 1, 0, 0, 1, 1 )
+#define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 1, 0, 0, 1, 1 )
+
+#define MPP23_GPIO MPP( 23, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP23_TSMP3 MPP( 23, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 1, 0, 0, 0, 1, 1 )
+#define MPP23_GE1_3 MPP( 23, 0x3, 0, 0, 0, 1, 1, 1 )
+#define MPP23_AUDIO_I2SBCLK MPP( 23, 0x4, 0, 1, 0, 0, 1, 1 )
+#define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 1, 0, 1, 1, 1 )
+
+#define MPP24_GPIO MPP( 24, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP24_TSMP4 MPP( 24, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP24_TDM_SPI_CS0 DEV( 24, 0x2, 0, 1, 0, 0, 1, 1 )
+#define MPP24_GE1_4 MPP( 24, 0x3, 0, 0, 0, 1, 1, 1 )
+#define MPP24_AUDIO_I2SDO MPP( 24, 0x4, 0, 1, 0, 0, 1, 1 )
+
+#define MPP25_GPIO MPP( 25, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP25_TSMP5 MPP( 25, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 1, 0, 0, 1, 1 )
+#define MPP25_GE1_5 MPP( 25, 0x3, 0, 0, 0, 1, 1, 1 )
+#define MPP25_AUDIO_I2SLRCLK MPP( 25, 0x4, 0, 1, 0, 0, 1, 1 )
+
+#define MPP26_GPIO MPP( 26, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP26_TSMP6 MPP( 26, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 1, 0, 0, 0, 1, 1 )
+#define MPP26_GE1_6 MPP( 26, 0x3, 0, 0, 0, 1, 1, 1 )
+#define MPP26_AUDIO_I2SMCLK MPP( 26, 0x4, 0, 1, 0, 0, 1, 1 )
+
+#define MPP27_GPIO MPP( 27, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP27_TSMP7 MPP( 27, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 1, 0, 0, 1, 1 )
+#define MPP27_GE1_7 MPP( 27, 0x3, 0, 0, 0, 1, 1, 1 )
+#define MPP27_AUDIO_I2SDI MPP( 27, 0x4, 1, 0, 0, 0, 1, 1 )
+
+#define MPP28_GPIO MPP( 28, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP28_TSMP8 MPP( 28, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP28_TDM_CODEC_INTn MPP( 28, 0x2, 0, 0, 0, 0, 1, 1 )
+#define MPP28_GE1_8 MPP( 28, 0x3, 0, 0, 0, 1, 1, 1 )
+#define MPP28_AUDIO_EXTCLK MPP( 28, 0x4, 1, 0, 0, 0, 1, 1 )
+
+#define MPP29_GPIO MPP( 29, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP29_TSMP9 MPP( 29, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP29_TDM_CODEC_RSTn MPP( 29, 0x2, 0, 0, 0, 0, 1, 1 )
+#define MPP29_GE1_9 MPP( 29, 0x3, 0, 0, 0, 1, 1, 1 )
+
+#define MPP30_GPIO MPP( 30, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP30_TSMP10 MPP( 30, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP30_TDM_PCLK MPP( 30, 0x2, 1, 1, 0, 0, 1, 1 )
+#define MPP30_GE1_10 MPP( 30, 0x3, 0, 0, 0, 1, 1, 1 )
+
+#define MPP31_GPIO MPP( 31, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP31_TSMP11 MPP( 31, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP31_TDM_FS MPP( 31, 0x2, 1, 1, 0, 0, 1, 1 )
+#define MPP31_GE1_11 MPP( 31, 0x3, 0, 0, 0, 1, 1, 1 )
+
+#define MPP32_GPIO MPP( 32, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP32_TSMP12 MPP( 32, 0x1, 1, 1, 0, 0, 1, 1 )
+#define MPP32_TDM_DRX MPP( 32, 0x2, 1, 0, 0, 0, 1, 1 )
+#define MPP32_GE1_12 MPP( 32, 0x3, 0, 0, 0, 1, 1, 1 )
+
+#define MPP33_GPIO MPP( 33, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP33_TDM_DTX MPP( 33, 0x2, 0, 1, 0, 0, 1, 1 )
+#define MPP33_GE1_13 MPP( 33, 0x3, 0, 0, 0, 1, 1, 1 )
+
+#define MPP34_GPIO MPP( 34, 0x0, 1, 1, 0, 1, 1, 1 )
+#define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 1, 0, 0, 1, 1 )
+#define MPP34_GE1_14 MPP( 34, 0x3, 0, 0, 0, 1, 1, 1 )
+
+#define MPP35_GPIO MPP( 35, 0x0, 1, 1, 1, 1, 1, 1 )
+#define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 1, 0, 0, 1, 1 )
+#define MPP35_GE1_15 MPP( 35, 0x3, 0, 0, 0, 1, 1, 1 )
+#define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 1, 0, 1, 1, 1 )
+#define MPP35_MII0_RXERR MPP( 35, 0xc, 1, 0, 1, 1, 1, 1 )
+
+#define MPP36_GPIO MPP( 36, 0x0, 1, 1, 1, 0, 0, 1 )
+#define MPP36_TSMP0 MPP( 36, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 1, 0, 0, 0, 1 )
+#define MPP36_AUDIO_SPDIFI MPP( 36, 0x4, 1, 0, 1, 0, 0, 1 )
+
+#define MPP37_GPIO MPP( 37, 0x0, 1, 1, 1, 0, 0, 1 )
+#define MPP37_TSMP1 MPP( 37, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 1, 0, 0, 0, 1 )
+#define MPP37_AUDIO_SPDIFO MPP( 37, 0x4, 0, 1, 1, 0, 0, 1 )
+
+#define MPP38_GPIO MPP( 38, 0x0, 1, 1, 1, 0, 0, 1 )
+#define MPP38_TSMP2 MPP( 38, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 1, 0, 0, 0, 1 )
+#define MPP38_AUDIO_SPDIFRMLCLK MPP( 38, 0x4, 0, 1, 1, 0, 0, 1 )
+
+#define MPP39_GPIO MPP( 39, 0x0, 1, 1, 1, 0, 0, 1 )
+#define MPP39_TSMP3 MPP( 39, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 1, 0, 0, 0, 1 )
+#define MPP39_AUDIO_I2SBCLK MPP( 39, 0x4, 0, 1, 1, 0, 0, 1 )
+
+#define MPP40_GPIO MPP( 40, 0x0, 1, 1, 1, 0, 0, 1 )
+#define MPP40_TSMP4 MPP( 40, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 1, 0, 0, 0, 1 )
+#define MPP40_AUDIO_I2SDO MPP( 40, 0x4, 0, 1, 1, 0, 0, 1 )
+
+#define MPP41_GPIO MPP( 41, 0x0, 1, 1, 1, 0, 0, 1 )
+#define MPP41_TSMP5 MPP( 41, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 1, 0, 0, 0, 0, 1 )
+#define MPP41_AUDIO_I2SLRC MPP( 41, 0x4, 0, 1, 1, 0, 0, 1 )
+
+#define MPP42_GPIO MPP( 42, 0x0, 1, 1, 1, 0, 0, 1 )
+#define MPP42_TSMP6 MPP( 42, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 1, 0, 0, 0, 1 )
+#define MPP42_AUDIO_I2SMCLK MPP( 42, 0x4, 0, 1, 1, 0, 0, 1 )
+
+#define MPP43_GPIO MPP( 43, 0x0, 1, 1, 1, 0, 0, 1 )
+#define MPP43_TSMP7 MPP( 43, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP43_TDM_CODEC_INTn MPP( 43, 0x2, 0, 0, 0, 0, 0, 1 )
+#define MPP43_AUDIO_I2SDI MPP( 43, 0x4, 1, 0, 1, 0, 0, 1 )
+
+#define MPP44_GPIO MPP( 44, 0x0, 1, 1, 1, 0, 0, 1 )
+#define MPP44_TSMP8 MPP( 44, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP44_TDM_CODEC_RSTn MPP( 44, 0x2, 0, 0, 0, 0, 0, 1 )
+#define MPP44_AUDIO_EXTCLK MPP( 44, 0x4, 1, 0, 1, 0, 0, 1 )
+
+#define MPP45_GPIO MPP( 45, 0x0, 1, 1, 0, 0, 0, 1 )
+#define MPP45_TSMP9 MPP( 45, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP45_TDM_PCLK MPP( 45, 0x2, 1, 1, 0, 0, 0, 1 )
+
+#define MPP46_GPIO MPP( 46, 0x0, 1, 1, 0, 0, 0, 1 )
+#define MPP46_TSMP10 MPP( 46, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP46_TDM_FS MPP( 46, 0x2, 1, 1, 0, 0, 0, 1 )
+
+#define MPP47_GPIO MPP( 47, 0x0, 1, 1, 0, 0, 0, 1 )
+#define MPP47_TSMP11 MPP( 47, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP47_TDM_DRX MPP( 47, 0x2, 1, 0, 0, 0, 0, 1 )
+
+#define MPP48_GPIO MPP( 48, 0x0, 1, 1, 0, 0, 0, 1 )
+#define MPP48_TSMP12 MPP( 48, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP48_TDM_DTX MPP( 48. 0x2, 0, 1, 0, 0, 0, 1 )
+
+#define MPP49_GPIO MPP( 49, 0x0, 1, 1, 0, 0, 0, 1 )
+#define MPP49_TSMP9 MPP( 49, 0x1, 1, 1, 0, 0, 0, 1 )
+#define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 1, 0, 0, 0, 1 )
+#define MPP49_PTP_CLK MPP( 49, 0x5, 1, 0, 0, 0, 0, 1 )
+
+#define MPP_MAX 49
+
+void kirkwood_mpp_conf(unsigned int *mpp_list);
+
+#endif
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
index b1d1a87a6821..2f0e4ef3db0f 100644
--- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
@@ -11,11 +11,8 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
-#include <linux/timer.h>
+#include <linux/mtd/partitions.h>
#include <linux/ata_platform.h>
#include <linux/mv643xx_eth.h>
#include <linux/spi/flash.h>
@@ -23,7 +20,6 @@
#include <linux/spi/orion_spi.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
#include <mach/kirkwood.h>
#include "common.h"
@@ -61,14 +57,11 @@ static void __init rd88f6192_init(void)
kirkwood_ehci_init();
kirkwood_ge00_init(&rd88f6192_ge00_data);
- kirkwood_rtc_init();
kirkwood_sata_init(&rd88f6192_sata_data);
spi_register_board_info(rd88F6192_spi_slave_info,
ARRAY_SIZE(rd88F6192_spi_slave_info));
kirkwood_spi_init();
kirkwood_uart0_init();
- kirkwood_xor0_init();
- kirkwood_xor1_init();
}
static int __init rd88f6192_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 9a0e905d10cd..31e996d65fc4 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -11,21 +11,20 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
-#include <linux/pci.h>
#include <linux/irq.h>
-#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
-#include <linux/timer.h>
+#include <linux/mtd/partitions.h>
#include <linux/ata_platform.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <net/dsa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
#include <mach/kirkwood.h>
+#include <plat/mvsdio.h>
#include <plat/orion_nand.h>
#include "common.h"
+#include "mpp.h"
static struct mtd_partition rd88f6281_nand_parts[] = {
{
@@ -75,7 +74,7 @@ static struct mv643xx_eth_platform_data rd88f6281_ge00_data = {
.duplex = DUPLEX_FULL,
};
-static struct dsa_platform_data rd88f6281_switch_data = {
+static struct dsa_chip_data rd88f6281_switch_chip_data = {
.port_names[0] = "lan1",
.port_names[1] = "lan2",
.port_names[2] = "lan3",
@@ -83,6 +82,11 @@ static struct dsa_platform_data rd88f6281_switch_data = {
.port_names[5] = "cpu",
};
+static struct dsa_platform_data rd88f6281_switch_plat_data = {
+ .nr_chips = 1,
+ .chip = &rd88f6281_switch_chip_data,
+};
+
static struct mv643xx_eth_platform_data rd88f6281_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(11),
};
@@ -91,6 +95,15 @@ static struct mv_sata_platform_data rd88f6281_sata_data = {
.n_ports = 2,
};
+static struct mvsdio_platform_data rd88f6281_mvsdio_data = {
+ .gpio_card_detect = 28,
+};
+
+static unsigned int rd88f6281_mpp_config[] __initdata = {
+ MPP28_GPIO,
+ 0
+};
+
static void __init rd88f6281_init(void)
{
u32 dev, rev;
@@ -99,21 +112,22 @@ static void __init rd88f6281_init(void)
* Basic setup. Needs to be called early.
*/
kirkwood_init();
+ kirkwood_mpp_conf(rd88f6281_mpp_config);
kirkwood_ehci_init();
kirkwood_ge00_init(&rd88f6281_ge00_data);
kirkwood_pcie_id(&dev, &rev);
if (rev == MV88F6281_REV_A0) {
- rd88f6281_switch_data.sw_addr = 10;
+ rd88f6281_switch_chip_data.sw_addr = 10;
kirkwood_ge01_init(&rd88f6281_ge01_data);
} else {
- rd88f6281_switch_data.port_names[4] = "wan";
+ rd88f6281_switch_chip_data.port_names[4] = "wan";
}
- kirkwood_ge00_switch_init(&rd88f6281_switch_data, NO_IRQ);
+ kirkwood_ge00_switch_init(&rd88f6281_switch_plat_data, NO_IRQ);
- kirkwood_rtc_init();
kirkwood_sata_init(&rd88f6281_sata_data);
+ kirkwood_sdio_init(&rd88f6281_mvsdio_data);
kirkwood_uart0_init();
platform_device_register(&rd88f6281_nand_flash);
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
new file mode 100644
index 000000000000..831e4a56cae1
--- /dev/null
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -0,0 +1,136 @@
+/*
+ * arch/arm/mach-kirkwood/sheevaplug-setup.c
+ *
+ * Marvell SheevaPlug Reference Board Setup
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/gpio.h>
+#include <linux/leds.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/kirkwood.h>
+#include <plat/mvsdio.h>
+#include <plat/orion_nand.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mtd_partition sheevaplug_nand_parts[] = {
+ {
+ .name = "u-boot",
+ .offset = 0,
+ .size = SZ_1M
+ }, {
+ .name = "uImage",
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = SZ_4M
+ }, {
+ .name = "root",
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = MTDPART_SIZ_FULL
+ },
+};
+
+static struct resource sheevaplug_nand_resource = {
+ .flags = IORESOURCE_MEM,
+ .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
+ .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
+ KIRKWOOD_NAND_MEM_SIZE - 1,
+};
+
+static struct orion_nand_data sheevaplug_nand_data = {
+ .parts = sheevaplug_nand_parts,
+ .nr_parts = ARRAY_SIZE(sheevaplug_nand_parts),
+ .cle = 0,
+ .ale = 1,
+ .width = 8,
+ .chip_delay = 25,
+};
+
+static struct platform_device sheevaplug_nand_flash = {
+ .name = "orion_nand",
+ .id = -1,
+ .dev = {
+ .platform_data = &sheevaplug_nand_data,
+ },
+ .resource = &sheevaplug_nand_resource,
+ .num_resources = 1,
+};
+
+static struct mv643xx_eth_platform_data sheevaplug_ge00_data = {
+ .phy_addr = MV643XX_ETH_PHY_ADDR(0),
+};
+
+static struct mvsdio_platform_data sheevaplug_mvsdio_data = {
+ // unfortunately the CD signal has not been connected */
+};
+
+static struct gpio_led sheevaplug_led_pins[] = {
+ {
+ .name = "plug:green:health",
+ .default_trigger = "default-on",
+ .gpio = 49,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_led_platform_data sheevaplug_led_data = {
+ .leds = sheevaplug_led_pins,
+ .num_leds = ARRAY_SIZE(sheevaplug_led_pins),
+};
+
+static struct platform_device sheevaplug_leds = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &sheevaplug_led_data,
+ }
+};
+
+static unsigned int sheevaplug_mpp_config[] __initdata = {
+ MPP29_GPIO, /* USB Power Enable */
+ MPP49_GPIO, /* LED */
+ 0
+};
+
+static void __init sheevaplug_init(void)
+{
+ /*
+ * Basic setup. Needs to be called early.
+ */
+ kirkwood_init();
+ kirkwood_mpp_conf(sheevaplug_mpp_config);
+
+ kirkwood_uart0_init();
+
+ if (gpio_request(29, "USB Power Enable") != 0 ||
+ gpio_direction_output(29, 1) != 0)
+ printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n");
+ kirkwood_ehci_init();
+
+ kirkwood_ge00_init(&sheevaplug_ge00_data);
+ kirkwood_sdio_init(&sheevaplug_mvsdio_data);
+
+ platform_device_register(&sheevaplug_nand_flash);
+ platform_device_register(&sheevaplug_leds);
+}
+
+MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
+ /* Maintainer: shadi Ammouri <shadi@marvell.com> */
+ .phys_io = KIRKWOOD_REGS_PHYS_BASE,
+ .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+ .boot_params = 0x00000100,
+ .init_machine = sheevaplug_init,
+ .map_io = kirkwood_map_io,
+ .init_irq = kirkwood_init_irq,
+ .timer = &kirkwood_timer,
+MACHINE_END
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c
new file mode 100644
index 000000000000..dda5743cf3e0
--- /dev/null
+++ b/arch/arm/mach-kirkwood/ts219-setup.c
@@ -0,0 +1,220 @@
+/*
+ *
+ * QNAP TS-119/TS-219 Turbo NAS Board Setup
+ *
+ * Copyright (C) 2009 Martin Michlmayr <tbm@cyrius.com>
+ * Copyright (C) 2008 Byron Bradley <byron.bbradley@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/physmap.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/orion_spi.h>
+#include <linux/i2c.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/ata_platform.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/timex.h>
+#include <linux/serial_reg.h>
+#include <linux/pci.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/kirkwood.h>
+#include "common.h"
+#include "mpp.h"
+
+/****************************************************************************
+ * 16 MiB NOR flash. The struct mtd_partition is not in the same order as the
+ * partitions on the device because we want to keep compatability with
+ * the QNAP firmware.
+ * Layout as used by QNAP:
+ * 0x00000000-0x00080000 : "U-Boot"
+ * 0x00200000-0x00400000 : "Kernel"
+ * 0x00400000-0x00d00000 : "RootFS"
+ * 0x00d00000-0x01000000 : "RootFS2"
+ * 0x00080000-0x000c0000 : "U-Boot Config"
+ * 0x000c0000-0x00200000 : "NAS Config"
+ *
+ * We'll use "RootFS1" instead of "RootFS" to stay compatible with the layout
+ * used by the QNAP TS-109/TS-209.
+ *
+ ***************************************************************************/
+
+static struct mtd_partition qnap_ts219_partitions[] = {
+ {
+ .name = "U-Boot",
+ .size = 0x00080000,
+ .offset = 0,
+ .mask_flags = MTD_WRITEABLE,
+ }, {
+ .name = "Kernel",
+ .size = 0x00200000,
+ .offset = 0x00200000,
+ }, {
+ .name = "RootFS1",
+ .size = 0x00900000,
+ .offset = 0x00400000,
+ }, {
+ .name = "RootFS2",
+ .size = 0x00300000,
+ .offset = 0x00d00000,
+ }, {
+ .name = "U-Boot Config",
+ .size = 0x00040000,
+ .offset = 0x00080000,
+ }, {
+ .name = "NAS Config",
+ .size = 0x00140000,
+ .offset = 0x000c0000,
+ },
+};
+
+static const struct flash_platform_data qnap_ts219_flash = {
+ .type = "m25p128",
+ .name = "spi_flash",
+ .parts = qnap_ts219_partitions,
+ .nr_parts = ARRAY_SIZE(qnap_ts219_partitions),
+};
+
+static struct spi_board_info __initdata qnap_ts219_spi_slave_info[] = {
+ {
+ .modalias = "m25p80",
+ .platform_data = &qnap_ts219_flash,
+ .irq = -1,
+ .max_speed_hz = 20000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ },
+};
+
+static struct i2c_board_info __initdata qnap_ts219_i2c_rtc = {
+ I2C_BOARD_INFO("s35390a", 0x30),
+};
+
+static struct mv643xx_eth_platform_data qnap_ts219_ge00_data = {
+ .phy_addr = MV643XX_ETH_PHY_ADDR(8),
+};
+
+static struct mv_sata_platform_data qnap_ts219_sata_data = {
+ .n_ports = 2,
+};
+
+static struct gpio_keys_button qnap_ts219_buttons[] = {
+ {
+ .code = KEY_COPY,
+ .gpio = 15,
+ .desc = "USB Copy",
+ .active_low = 1,
+ },
+ {
+ .code = KEY_RESTART,
+ .gpio = 16,
+ .desc = "Reset",
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_platform_data qnap_ts219_button_data = {
+ .buttons = qnap_ts219_buttons,
+ .nbuttons = ARRAY_SIZE(qnap_ts219_buttons),
+};
+
+static struct platform_device qnap_ts219_button_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .num_resources = 0,
+ .dev = {
+ .platform_data = &qnap_ts219_button_data,
+ }
+};
+
+static unsigned int qnap_ts219_mpp_config[] __initdata = {
+ MPP0_SPI_SCn,
+ MPP1_SPI_MOSI,
+ MPP2_SPI_SCK,
+ MPP3_SPI_MISO,
+ MPP8_TW_SDA,
+ MPP9_TW_SCK,
+ MPP10_UART0_TXD,
+ MPP11_UART0_RXD,
+ MPP13_UART1_TXD, /* PIC controller */
+ MPP14_UART1_RXD, /* PIC controller */
+ MPP15_GPIO, /* USB Copy button */
+ MPP16_GPIO, /* Reset button */
+ MPP20_SATA1_ACTn,
+ MPP21_SATA0_ACTn,
+ MPP22_SATA1_PRESENTn,
+ MPP23_SATA0_PRESENTn,
+ 0
+};
+
+
+/*****************************************************************************
+ * QNAP TS-x19 specific power off method via UART1-attached PIC
+ ****************************************************************************/
+
+#define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2))
+
+void qnap_ts219_power_off(void)
+{
+ /* 19200 baud divisor */
+ const unsigned divisor = ((kirkwood_tclk + (8 * 19200)) / (16 * 19200));
+
+ pr_info("%s: triggering power-off...\n", __func__);
+
+ /* hijack UART1 and reset into sane state (19200,8n1) */
+ writel(0x83, UART1_REG(LCR));
+ writel(divisor & 0xff, UART1_REG(DLL));
+ writel((divisor >> 8) & 0xff, UART1_REG(DLM));
+ writel(0x03, UART1_REG(LCR));
+ writel(0x00, UART1_REG(IER));
+ writel(0x00, UART1_REG(FCR));
+ writel(0x00, UART1_REG(MCR));
+
+ /* send the power-off command 'A' to PIC */
+ writel('A', UART1_REG(TX));
+}
+
+static void __init qnap_ts219_init(void)
+{
+ /*
+ * Basic setup. Needs to be called early.
+ */
+ kirkwood_init();
+ kirkwood_mpp_conf(qnap_ts219_mpp_config);
+
+ kirkwood_uart0_init();
+ kirkwood_uart1_init(); /* A PIC controller is connected here. */
+ spi_register_board_info(qnap_ts219_spi_slave_info,
+ ARRAY_SIZE(qnap_ts219_spi_slave_info));
+ kirkwood_spi_init();
+ kirkwood_i2c_init();
+ i2c_register_board_info(0, &qnap_ts219_i2c_rtc, 1);
+ kirkwood_ge00_init(&qnap_ts219_ge00_data);
+ kirkwood_sata_init(&qnap_ts219_sata_data);
+ kirkwood_ehci_init();
+ platform_device_register(&qnap_ts219_button_device);
+
+ pm_power_off = qnap_ts219_power_off;
+
+}
+
+MACHINE_START(TS219, "QNAP TS-119/TS-219")
+ /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */
+ .phys_io = KIRKWOOD_REGS_PHYS_BASE,
+ .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+ .boot_params = 0x00000100,
+ .init_machine = qnap_ts219_init,
+ .map_io = kirkwood_map_io,
+ .init_irq = kirkwood_init_irq,
+ .timer = &kirkwood_timer,
+MACHINE_END