diff options
| -rw-r--r-- | arch/arm/mach-s3c/iotiming-s3c2410.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-s3c/pm-s3c64xx.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-s3c/s3c24xx.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-s3c/iotiming-s3c2410.c b/arch/arm/mach-s3c/iotiming-s3c2410.c index 28d9f473e24a..09f388d8f824 100644 --- a/arch/arm/mach-s3c/iotiming-s3c2410.c +++ b/arch/arm/mach-s3c/iotiming-s3c2410.c @@ -259,7 +259,7 @@ static const unsigned int tacc_tab[] = { /** * get_tacc - turn tACC value into cycle time * @hclk_tns: The cycle time for HCLK, in 10ths of nanoseconds. - * @val: The bank timing register value, shifed down. + * @val: The bank timing register value, shifted down. */ static unsigned int get_tacc(unsigned long hclk_tns, unsigned long val) diff --git a/arch/arm/mach-s3c/pm-s3c64xx.c b/arch/arm/mach-s3c/pm-s3c64xx.c index 4f1778123dee..2529f21736ff 100644 --- a/arch/arm/mach-s3c/pm-s3c64xx.c +++ b/arch/arm/mach-s3c/pm-s3c64xx.c @@ -323,7 +323,7 @@ void s3c_pm_arch_update_uart(void __iomem *regs, struct pm_uart_save *save) /* S3C64XX UART blocks only support level interrupts, so ensure that * when we restore unused UART blocks we force the level interrupt - * settigs. */ + * settings. */ save->ucon |= S3C2410_UCON_TXILEVEL | S3C2410_UCON_RXILEVEL; /* We have a constraint on changing the clock type of the UART diff --git a/arch/arm/mach-s3c/s3c24xx.c b/arch/arm/mach-s3c/s3c24xx.c index ccfed48c98aa..37eaf9480da7 100644 --- a/arch/arm/mach-s3c/s3c24xx.c +++ b/arch/arm/mach-s3c/s3c24xx.c @@ -146,7 +146,7 @@ static struct map_desc s3c_iodesc[] __initdata __maybe_unused = { IODESC_ENT(UART) }; -/* read cpu identificaiton code */ +/* read cpu identification code */ static unsigned long s3c24xx_read_idcode_v5(void) { |