diff options
| -rw-r--r-- | arch/arm/boot/dts/sun8i-h3.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 4 |
3 files changed, 18 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 7e6031768401..d50dbd5a7ffa 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -227,3 +227,7 @@ &pio { compatible = "allwinner,sun8i-h3-pinctrl"; }; + +&rtc { + compatible = "allwinner,sun8i-h3-rtc"; +}; diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index f63a5ef527be..464fe36c721d 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -95,15 +95,7 @@ compatible = "fixed-clock"; clock-frequency = <32768>; clock-accuracy = <50000>; - clock-output-names = "osc32k"; - }; - - iosc: internal-osc-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <16000000>; - clock-accuracy = <300000000>; - clock-output-names = "iosc"; + clock-output-names = "ext_osc32k"; }; }; @@ -377,7 +369,7 @@ ccu: clock@1c20000 { /* compatible is in per SoC .dtsi file */ reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&osc32k>; + clocks = <&osc24M>, <&rtc 0>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -388,7 +380,7 @@ reg = <0x01c20800 0x400>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -791,17 +783,19 @@ }; rtc: rtc@1f00000 { - compatible = "allwinner,sun6i-a31-rtc"; - reg = <0x01f00000 0x54>; + /* compatible is in per SoC .dtsi file */ + reg = <0x01f00000 0x400>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + clock-output-names = "osc32k", "osc32k-out", "iosc"; + clocks = <&osc32k>; + #clock-cells = <1>; }; r_ccu: clock@1f01400 { compatible = "allwinner,sun8i-h3-r-ccu"; reg = <0x01f01400 0x100>; - clocks = <&osc24M>, <&osc32k>, <&iosc>, - <&ccu 9>; + clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, <&ccu 9>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; #reset-cells = <1>; @@ -839,7 +833,7 @@ compatible = "allwinner,sun8i-h3-r-pinctrl"; reg = <0x01f02c00 0x400>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; + clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index b41dc1aab67d..fe731b35f761 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -172,3 +172,7 @@ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; compatible = "allwinner,sun50i-h5-pinctrl"; }; + +&rtc { + compatible = "allwinner,sun50i-h5-rtc"; +}; |