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author | Josh Triplett <josh@joshtriplett.org> | 2013-08-20 17:20:14 -0700 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-02-13 13:50:13 -0800 |
commit | ac7b8b31436d5c86e4c5da354d3faf83a96b44f5 (patch) | |
tree | 278edb2efcdd95ec9a50ec23431e4bc3db17a676 /tools | |
parent | f5b6d821e80b7d2086a58e4954f2ac2c1bdc94d1 (diff) | |
download | lwn-ac7b8b31436d5c86e4c5da354d3faf83a96b44f5.tar.gz lwn-ac7b8b31436d5c86e4c5da354d3faf83a96b44f5.zip |
turbostat: Use GCC's CPUID functions to support PIC
commit 2b92865e648ce04a39fda4f903784a5d01ecb0dc upstream.
turbostat uses inline assembly to call cpuid. On 32-bit x86, on systems
that have certain security features enabled by default that make -fPIC
the default, this causes a build error:
turbostat.c: In function ‘check_cpuid’:
turbostat.c:1906:2: error: PIC register clobbered by ‘ebx’ in ‘asm’
asm("cpuid" : "=a" (fms), "=c" (ecx), "=d" (edx) : "a" (1) : "ebx");
^
GCC provides a header cpuid.h, containing a __get_cpuid function that
works with both PIC and non-PIC. (On PIC, it saves and restores ebx
around the cpuid instruction.) Use that instead.
Signed-off-by: Josh Triplett <josh@joshtriplett.org>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools')
-rw-r--r-- | tools/power/x86/turbostat/turbostat.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 5bf4a67fa4b4..6a7ee5f21c9b 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -35,6 +35,7 @@ #include <string.h> #include <ctype.h> #include <sched.h> +#include <cpuid.h> char *proc_stat = "/proc/stat"; unsigned int interval_sec = 5; /* set with -i interval_sec */ @@ -1894,7 +1895,7 @@ void check_cpuid() eax = ebx = ecx = edx = 0; - asm("cpuid" : "=a" (max_level), "=b" (ebx), "=c" (ecx), "=d" (edx) : "a" (0)); + __get_cpuid(0, &max_level, &ebx, &ecx, &edx); if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e) genuine_intel = 1; @@ -1903,7 +1904,7 @@ void check_cpuid() fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ", (char *)&ebx, (char *)&edx, (char *)&ecx); - asm("cpuid" : "=a" (fms), "=c" (ecx), "=d" (edx) : "a" (1) : "ebx"); + __get_cpuid(1, &fms, &ebx, &ecx, &edx); family = (fms >> 8) & 0xf; model = (fms >> 4) & 0xf; stepping = fms & 0xf; @@ -1925,7 +1926,7 @@ void check_cpuid() * This check is valid for both Intel and AMD. */ ebx = ecx = edx = 0; - asm("cpuid" : "=a" (max_level), "=b" (ebx), "=c" (ecx), "=d" (edx) : "a" (0x80000000)); + __get_cpuid(0x80000000, &max_level, &ebx, &ecx, &edx); if (max_level < 0x80000007) { fprintf(stderr, "CPUID: no invariant TSC (max_level 0x%x)\n", max_level); @@ -1936,7 +1937,7 @@ void check_cpuid() * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8 * this check is valid for both Intel and AMD */ - asm("cpuid" : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) : "a" (0x80000007)); + __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx); has_invariant_tsc = edx & (1 << 8); if (!has_invariant_tsc) { @@ -1949,7 +1950,7 @@ void check_cpuid() * this check is valid for both Intel and AMD */ - asm("cpuid" : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) : "a" (0x6)); + __get_cpuid(0x6, &eax, &ebx, &ecx, &edx); has_aperf = ecx & (1 << 0); do_dts = eax & (1 << 0); do_ptm = eax & (1 << 6); |