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| author | Dan Williams <dan.j.williams@intel.com> | 2022-01-23 16:31:51 -0800 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2022-02-08 22:57:33 -0800 |
| commit | f246abd67ff0dcb471ce2361a913b935d4c8ac11 (patch) | |
| tree | 5e6098037f068210a1ca1ac9bfd59111beeaa387 /tools/testing/cxl | |
| parent | 9b71e1c9c3aaae5079f5e267785b6f035c5f23da (diff) | |
| download | lwn-f246abd67ff0dcb471ce2361a913b935d4c8ac11.tar.gz lwn-f246abd67ff0dcb471ce2361a913b935d4c8ac11.zip | |
tools/testing/cxl: Mock dvsec_ranges()
For test purposes, pretend that that CXL DVSEC ranges are not in active
use and the device is ready CXL.mem operation.
Link: https://lore.kernel.org/r/164298431119.3018233.17175518196764977542.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/testing/cxl')
| -rw-r--r-- | tools/testing/cxl/test/mem.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c index 36ef337c775c..b6b726eff3e2 100644 --- a/tools/testing/cxl/test/mem.c +++ b/tools/testing/cxl/test/mem.c @@ -248,6 +248,14 @@ static void label_area_release(void *lsa) vfree(lsa); } +static void mock_validate_dvsec_ranges(struct cxl_dev_state *cxlds) +{ + struct cxl_endpoint_dvsec_info *info; + + info = &cxlds->info; + info->mem_enabled = true; +} + static int cxl_mock_mem_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -285,6 +293,8 @@ static int cxl_mock_mem_probe(struct platform_device *pdev) if (rc) return rc; + mock_validate_dvsec_ranges(cxlds); + cxlmd = devm_cxl_add_memdev(cxlds); if (IS_ERR(cxlmd)) return PTR_ERR(cxlmd); |