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| author | Thomas Renninger <trenn@suse.de> | 2013-06-28 15:34:32 +0200 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2013-07-05 01:52:19 +0200 |
| commit | 2aa1ca75c48f1da2c9bdc81ec4403eaf89a410d5 (patch) | |
| tree | 4ce7ae2958d2dbddacd026d0524c8b90b7ee5906 /tools/power/cpupower | |
| parent | c4f3610eba69321b9cf35779cd67e68b5138cc16 (diff) | |
| download | lwn-2aa1ca75c48f1da2c9bdc81ec4403eaf89a410d5.tar.gz lwn-2aa1ca75c48f1da2c9bdc81ec4403eaf89a410d5.zip | |
cpupower: Haswell also supports the C-states introduced with SandyBridge
Add Haswell model numbers to snb_register() as it also supports the
C-states introduced in SandyBridge processors.
[rjw: Changelog]
Signed-off-by: Thomas Renninger <trenn@suse.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'tools/power/cpupower')
| -rw-r--r-- | tools/power/cpupower/utils/idle_monitor/snb_idle.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/tools/power/cpupower/utils/idle_monitor/snb_idle.c b/tools/power/cpupower/utils/idle_monitor/snb_idle.c index a99b43b97d6d..efc8a69c9aba 100644 --- a/tools/power/cpupower/utils/idle_monitor/snb_idle.c +++ b/tools/power/cpupower/utils/idle_monitor/snb_idle.c @@ -155,6 +155,10 @@ static struct cpuidle_monitor *snb_register(void) case 0x2D: /* SNB Xeon */ case 0x3A: /* IVB */ case 0x3E: /* IVB Xeon */ + case 0x3C: /* HSW */ + case 0x3F: /* HSW */ + case 0x45: /* HSW */ + case 0x46: /* HSW */ break; default: return NULL; |