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author | Peter Zijlstra <peterz@infradead.org> | 2010-04-08 23:03:20 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2010-05-07 11:31:02 +0200 |
commit | ab608344bcbde4f55ec4cd911b686b0ce3eae076 (patch) | |
tree | ebd38efabfaab59d6de11a24143d70e1eec36fae /tools/perf/builtin-top.c | |
parent | 2b0b5c6fe9b383f3cf35a0a6371c9d577bd523ff (diff) | |
download | lwn-ab608344bcbde4f55ec4cd911b686b0ce3eae076.tar.gz lwn-ab608344bcbde4f55ec4cd911b686b0ce3eae076.zip |
perf, x86: Improve the PEBS ABI
Rename perf_event_attr::precise to perf_event_attr::precise_ip and
widen it to 2 bits. This new field describes the required precision of
the PERF_SAMPLE_IP field:
0 - SAMPLE_IP can have arbitrary skid
1 - SAMPLE_IP must have constant skid
2 - SAMPLE_IP requested to have 0 skid
3 - SAMPLE_IP must have 0 skid
And modify the Intel PEBS code accordingly. The PEBS implementation
now supports up to precise_ip == 2, where we perform the IP fixup.
Also s/PERF_RECORD_MISC_EXACT/&_IP/ to clarify its meaning, this bit
should be set for each PERF_SAMPLE_IP field known to match the actual
instruction triggering the event.
This new scheme allows for a PEBS mode that uses the buffer for more
than a single event.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Stephane Eranian <eranian@google.com>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'tools/perf/builtin-top.c')
-rw-r--r-- | tools/perf/builtin-top.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tools/perf/builtin-top.c b/tools/perf/builtin-top.c index 3de397764cb3..ed9b5b6905fa 100644 --- a/tools/perf/builtin-top.c +++ b/tools/perf/builtin-top.c @@ -1021,7 +1021,7 @@ static void event__process_sample(const event_t *self, return; } - if (self->header.misc & PERF_RECORD_MISC_EXACT) + if (self->header.misc & PERF_RECORD_MISC_EXACT_IP) exact_samples++; if (event__preprocess_sample(self, session, &al, symbol_filter) < 0 || |