diff options
| author | derek.fang <derek.fang@realtek.com> | 2020-06-12 13:15:23 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-06-15 20:58:37 +0100 |
| commit | d54348fbefcd006b2bf1db5c01159f2101b94a3f (patch) | |
| tree | e57a26872b761cd02124f8277ffa63f3b383a519 /sound/soc/codecs/rt5682.c | |
| parent | 8d8efecb28b8f622330ea3546cbdcc06e667f6b5 (diff) | |
| download | lwn-d54348fbefcd006b2bf1db5c01159f2101b94a3f.tar.gz lwn-d54348fbefcd006b2bf1db5c01159f2101b94a3f.zip | |
ASoC: rt5682: Let PLL2 support the freq conversion for 44100Hz sample rate
PLL2 of rt5682 only supports the freq conversion for 48000Hz
sample rate so far, this patch lets it support 44100Hz.
Signed-off-by: derek.fang <derek.fang@realtek.com>
Link: https://lore.kernel.org/r/1591938925-1070-3-git-send-email-derek.fang@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/rt5682.c')
| -rw-r--r-- | sound/soc/codecs/rt5682.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/sound/soc/codecs/rt5682.c b/sound/soc/codecs/rt5682.c index 3e9d2c6c51f9..8f4ab90207b5 100644 --- a/sound/soc/codecs/rt5682.c +++ b/sound/soc/codecs/rt5682.c @@ -2248,7 +2248,7 @@ static int rt5682_set_component_pll(struct snd_soc_component *component, { struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); struct rl6231_pll_code pll_code, pll2f_code, pll2b_code; - unsigned int pll2_fout1; + unsigned int pll2_fout1, pll2_ps_val; int ret; if (source == rt5682->pll_src[pll_id] && @@ -2317,8 +2317,15 @@ static int rt5682_set_component_pll(struct snd_soc_component *component, pll2b_code.n_code); snd_soc_component_write(component, RT5682_PLL2_CTRL_3, pll2f_code.n_code << RT5682_PLL2F_N_SFT); + + if (freq_out == 22579200) + pll2_ps_val = 1 << RT5682_PLL2B_SEL_PS_SFT; + else + pll2_ps_val = 1 << RT5682_PLL2B_PS_BYP_SFT; snd_soc_component_update_bits(component, RT5682_PLL2_CTRL_4, + RT5682_PLL2B_SEL_PS_MASK | RT5682_PLL2B_PS_BYP_MASK | RT5682_PLL2B_M_BP_MASK | RT5682_PLL2F_M_BP_MASK | 0xf, + pll2_ps_val | (pll2b_code.m_bp ? 1 : 0) << RT5682_PLL2B_M_BP_SFT | (pll2f_code.m_bp ? 1 : 0) << RT5682_PLL2F_M_BP_SFT | 0xf); |