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| author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2023-08-08 12:12:16 +0100 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2023-08-09 13:08:09 -0700 |
| commit | 145622771d22a7ad5061278eb6fb16396c29d308 (patch) | |
| tree | a9a0d1bec268647a0a0a87b8bfbe05f9fb061049 /net/dsa | |
| parent | 832140804e3b3ad19d73adebd25f69ed98778c58 (diff) | |
| download | lwn-145622771d22a7ad5061278eb6fb16396c29d308.tar.gz lwn-145622771d22a7ad5061278eb6fb16396c29d308.zip | |
net: dsa: mark parsed interface mode for legacy switch drivers
If we successfully parsed an interface mode with a legacy switch
driver, populate that mode into phylink's supported interfaces rather
than defaulting to the internal and gmii interfaces.
This hasn't caused an issue so far, because when the interface doesn't
match a supported one, phylink_validate() doesn't clear the supported
mask, but instead returns -EINVAL. phylink_parse_fixedlink() doesn't
check this return value, and merely relies on the supported ethtool
link modes mask being cleared. Therefore, the fixed link settings end
up being allowed despite validation failing.
Before this causes a problem, arrange for DSA to more accurately
populate phylink's supported interfaces mask so validation can
correctly succeed.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Link: https://lore.kernel.org/r/E1qTKdM-003Cpx-Eh@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'net/dsa')
| -rw-r--r-- | net/dsa/port.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/net/dsa/port.c b/net/dsa/port.c index 24015e11255f..37ab238e8304 100644 --- a/net/dsa/port.c +++ b/net/dsa/port.c @@ -1690,10 +1690,14 @@ int dsa_port_phylink_create(struct dsa_port *dp) ds->ops->phylink_get_caps(ds, dp->index, &dp->pl_config); } else { /* For legacy drivers */ - __set_bit(PHY_INTERFACE_MODE_INTERNAL, - dp->pl_config.supported_interfaces); - __set_bit(PHY_INTERFACE_MODE_GMII, - dp->pl_config.supported_interfaces); + if (mode != PHY_INTERFACE_MODE_NA) { + __set_bit(mode, dp->pl_config.supported_interfaces); + } else { + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + dp->pl_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_GMII, + dp->pl_config.supported_interfaces); + } } pl = phylink_create(&dp->pl_config, of_fwnode_handle(dp->dn), |