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author | Dmitry Osipenko <digetx@gmail.com> | 2019-08-12 00:00:42 +0300 |
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committer | Thierry Reding <treding@nvidia.com> | 2019-11-11 14:55:27 +0100 |
commit | 141bef44e123c101c0da0443ab6b3cfa750f251a (patch) | |
tree | 8281a7eede6cc97cf7c7168b7541d82ddcde3a41 /mm | |
parent | 77b7182ff18dd5a83d938ab42772db5cb82c75b8 (diff) | |
download | lwn-141bef44e123c101c0da0443ab6b3cfa750f251a.tar.gz lwn-141bef44e123c101c0da0443ab6b3cfa750f251a.zip |
memory: tegra: Consolidate registers definition into common header
The Memory Controller registers definition is sparse and duplicated,
let's consolidate everything into a common place for consistency.
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'mm')
0 files changed, 0 insertions, 0 deletions